Memory leads the way to better computing

Microwave AC Resonance Induced Phase Change in Sb2Te3 Nanowires

Scaling information bits to ever smaller dimensions is a dominant drive for information technology (IT). Nanostructured phase change material emerges as a key player in the current green-IT endeavor with low power consumption, functional modularity, and promising scalability. In this work, we present the demonstration of microwave AC voltage induced phase change phenomenon at ∼3 GHz in single Sb₂Te₃ nanowires. The resistance change by a total of 6-7 orders of magnitude is evidenced by a transition from the crystalline metallic to the amorphous semiconducting phase, which is cross-examined by temperature dependent transport measurement and high-resolution electron microscopy analysis. This discovery could potentially tailor multistate information bit encoding and electrical addressability along a single nanowire, rendering technology advancement for neuro-inspired computing devices.

Tunable and nonvolatile multibit data storage memory based on MoTe2/boron nitride/graphene heterostructures through contact engineering

Heterostructures formed by stacking atomically thin two-dimensional materials are promising candidates for flash memory devices to achieve premium performances, due to the capability of effective carrier modulation and unique charge trapping behavior at the interfaces with atomic flatness. Here, we report a nonvolatile floating-gate flash memory based on MoTe₂/h-BN/graphene van der Waals heterostructure, which possesses increased data storage capacity per cell and versatile tunability. The decent memory behavior of the device is enabled by the carriers stored in the floating gate of graphene layer, which tunnel through the dielectric layer of h-BN from the channel layer of MoTe₂ under static-electrical field. Consequently, the developed memory device is capable to store 2 bits per cell by applying varied gate bias to implement multi-distinctive current levels. The device also exhibits remarkable erase/program current ratio of ∼10⁵ with 1 µs switch speed and stable retention with estimated ∼30% charge loss after 10 yr. Furthermore, the memory device can operate in both p- and n-type modes through contact engineering, offering wide adaptability for emerging applications in electronic technologies, such as neuromorphic computing, data-adaptive energy efficient memory, and complex digital circuits.

Chirality-Enriched Carbon Nanotubes for Next-Generation Computing

For the past half century, silicon has served as the primary material platform for integrated circuit technology. However, the recent proliferation of nontraditional electronics, such as wearables, embedded systems, and low-power portable devices, has led to increasingly complex mechanical and electrical performance requirements. Among emerging electronic materials, single-walled carbon nanotubes (SWCNTs) are promising candidates for next-generation computing as a result of their superlative electrical, optical, and mechanical properties. Moreover, their chirality-dependent properties enable a wide range of emerging electronic applications including sub-10 nm complementary field-effect transistors, optoelectronic integrated circuits, and enantiomer-recognition sensors. Here, recent progress in SWCNT-based computing devices is reviewed, with an emphasis on the relationship between chirality enrichment and electronic functionality. In particular, after highlighting chirality-dependent SWCNT properties and chirality enrichment methods, the range of computing applications that have been demonstrated using chirality-enriched SWCNTs are summarized. By identifying remaining challenges and opportunities, this work provides a roadmap for next-generation SWCNT-based computing.

Multi-level flash memory device based on stacked anisotropic ReS2-boron nitride-graphene heterostructures

Charge-trapping memory devices based on two-dimensional (2D) material heterostructures possess an atomically thin structure and excellent charge transport capability, making them promising candidates for next-generation flash memories to achieve miniaturized size, high storage capacity, fast switch speed, and low power consumption. Here, we report a nonvolatile floating-gate memory device based on an ReS₂/boron nitride/graphene heterostructure. The implemented ReS₂ memory device displays a large memory window exceeding 100 V, leading to an ultrahigh current ratio over 10⁸ between programming and erasing states. The ReS₂ memory device also exhibits an ultrafast switch speed of 1 μs. In addition, the device can endure hundreds of switching cycles and shows stable retention characteristics with ∼40% charge remaining after 10 years. More importantly, taking advantage of its anisotropic electrical properties, a single ReS₂ flake can achieve direction-sensitive multi-level data storage to enhance the data storage density. On the basis of these characteristics, the proposed ReS₂ memory device is potentially able to serve the entire memory device hierarchy, meeting the need for scalability, capacity, speed, retention, and endurance at each level.

Reactive ion etching of an ovonic threshold switch (OTS) material using hydrogen-based plasmas for non-volatile phase change memories

Etch characteristics of ovonic threshold switch (OTS) materials composed of Ge-As-Te for a phase-change random access memory (PCRAM) has been investigated using reactive ion etching via hydrogen-based gases such as H2, CH4, NH3, CH4 + H2, and CH4 + NH3. Among the investigated hydrogen-based gases, NH3 showed the highest etching rate of about 0.52 nm s-1, but the formation of nitride compounds and the increased roughness were observed on the OTS surface by nitrogen. The use of other hydrogen-based gases such as CH4 and CH4 + H2 showed the deposition and low OTS etch rate, respectively, due to the presence of carbon in CH4. Even though H2 showed the better etch characteristics due to the no surface residues or compounds on the OTS surface related to carbon or nitrogen in the etch gases, the best OTS etch characteristics such as the second highest etch rate of 0.45 nm s-1, the lowest surface roughness of 0.21 nm, and no surface residues or compounds were observed with CH4 + NH3 due to the removal of carbon and nitrogen on the surface by the formation of volatile CN compounds while maintaining a high hydrogen atomic concentration in the plasma.

Ultrahigh drive current and large selectivity in GeS selector

Selector devices are indispensable components of large-scale nonvolatile memory and neuromorphic array systems. Besides the conventional silicon transistor, two-terminal ovonic threshold switching device with much higher scalability is currently the most industrially favored selector technology. However, current ovonic threshold switching devices rely heavily on intricate control of material stoichiometry and generally suffer from toxic and complex dopants. Here, we report on a selector with a large drive current density of 34 MA cm-2 and a ~106 high nonlinearity, realized in an environment-friendly and earth-abundant sulfide binary semiconductor, GeS. Both experiments and first-principles calculations reveal Ge pyramid-dominated network and high density of near-valence band trap states in amorphous GeS. The high-drive current capacity is associated with the strong Ge-S covalency and the high nonlinearity could arise from the synergy of the mid-gap traps assisted electronic transition and local Ge-Ge chain growth as well as locally enhanced bond alignment under high electric field.

Biological receptor-inspired flexible artificial synapse based on ionic dynamics

The memristor has been regarded as a promising candidate for constructing a neuromorphic computing platform that is capable of confronting the bottleneck of the traditional von Neumann architecture. Here, inspired by the working mechanism of the G-protein-linked receptor of biological cells, a novel double-layer memristive device with reduced graphene oxide (rGO) nanosheets covered by chitosan (an ionic conductive polymer) as the channel material is constructed. The protons in chitosan and the functional groups in rGO nanosheets imitate the functions of the ligands and receptors of biological cells, respectively. Smooth changes in the response current depending on the historical applied voltages are observed, offering a promising pathway toward biorealistic synaptic emulation. The memristive behavior is mainly a result of the interaction between protons provided by chitosan and the defects and functional groups in the rGO nanosheets. The channel current is due to the hopping of protons through functional groups and is limited by the traps in the rGO nanosheets. The transition from short-term to long-term potentiation is achieved, and learning-forgetting behaviors of the memristor mimicking those of the human brain are demonstrated. Overall, the bioinspired memristor-type artificial synaptic device shows great potential in neuromorphic networks.

A New Approach to the Fabrication of Memristive Neuromorphic Devices: Compositionally Graded Films

Energy-efficient computing paradigms beyond conventional von-Neumann architecture, such as neuromorphic computing, require novel devices that enable information storage at nanoscale in an analogue way and in-memory computing. Memristive devices with long-/short-term synaptic plasticity are expected to provide a more capable neuromorphic system compared to traditional Si-based complementary metal-oxide-semiconductor circuits. Here, compositionally graded oxide films of Al-doped Mg_xZn_1−xO (g-Al:MgZnO) are studied to fabricate a memristive device, in which the composition of the film changes continuously through the film thickness. Compositional grading in the films should give rise to asymmetry of Schottky barrier heights at the film-electrode interfaces. The g-Al:MgZnO films are grown by using aerosol-assisted chemical vapor deposition. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the films show self-rectifying memristive behaviors which are dependent on maximum applied voltage and repeated application of electrical pulses. Endurance and retention performance tests of the device show stable bipolar resistance switching (BRS) with a short-term memory effect. The short-term memory effects are ascribed to the thermally activated release of the trapped electrons near/at the g-Al:MgZnO film-electrode interface of the device. The volatile resistive switching can be used as a potential selector device in a crossbar memory array and a short-term synapse in neuromorphic computing.

Electromagnetic Analysis of Vertical Resistive Memory with a Sub-nm Thick Electrode

Resistive random access memories (RRAMs) are a type of resistive memory with two metal electrodes and a semi-insulating switching material in-between. As the persistent technology node downscaling continues in transistor technologies, RRAM designers also face similar device scaling challenges in simple cross-point arrays. For this reason, a cost-effective 3D vertical RRAM (VRRAM) structure which requires a single pivotal lithography step is attracting significant attention from both the scientific community and the industry. Integrating an extremely thin plane electrode to such a structure is a difficult but necessary step to enable high memory density. In addition, experimentally verifying and modeling such devices is an important step to designing RRAM arrays with a high noise margin, low resistive-capacitive (RC) delays, and stable switching characteristics. In this work, we conducted an electromagnetic analysis on a 3D vertical RRAM with atomically thin graphene electrodes and compared it with the conventional metal electrode. Based on the experimental device measurement results, we derived a theoretical basis and models for each VRRAM design that can be further utilized in the estimation of graphene-based 3D memory at the circuit and architecture levels. We concluded that a 71% increase in electromagnetic field strength was observed in a 0.3 nm thick graphene electrode when compared to a 5 nm thick metal electrode. Such an increase in the field led to much lower energy consumption and fluctuation range during RRAM switching. Due to unique graphene properties resulting in improved programming behavior, the graphene-based VRRAM can be a strong candidate for stacked storage devices in new memory computing platforms.

Memory devices and applications for in-memory computing

Traditional von Neumann computing systems involve separate processing and memory units. However, data movement is costly in terms of time and energy and this problem is aggravated by the recent explosive growth in highly data-centric applications related to artificial intelligence. This calls for a radical departure from the traditional systems and one such non-von Neumann computational approach is in-memory computing. Hereby certain computational tasks are performed in place in the memory itself by exploiting the physical attributes of the memory devices. Both charge-based and resistance-based memory devices are being explored for in-memory computing. In this Review, we provide a broad overview of the key computational primitives enabled by these memory devices as well as their applications spanning scientific computing, signal processing, optimization, machine learning, deep learning and stochastic computing.

Cluster-Type Filaments Induced by Doping in Low-Operation-Current Conductive Bridge Random Access Memory

Conductive bridge random access memory (CBRAM) is one of the most representative emerging nonvolatile memories in virtue of its excellent performance on speed, high-density integration, and power efficiency. Resistive switching behaviors in CBRAM involving the formation/rupture of metallic conductive filaments are dominated by cation migration and redox processes. It is all in the pursuit to decrease the operation current for low-power consumption and to enhance the current compliance-dependent reliability. Here, we propose a novel structure of Pt/TaO_x:Ag/TaO_x/Pt with nonvolatile switching at ∼1 μA and achieve a five-resistance-state multilevel cell operation under different compliance currents. Different from the nanocone-shaped filaments reported in traditional Ag top electrode devices, cluster-type filaments were captured in our memory devices, explaining the low-operation current-resistive switching behaviors. Meanwhile, Cu-doped counterpart devices also display similar operations. Such memory devices are more inclined to achieve low-power consumption and offer feasibility to large-scale memory crossbar integration.

Ultralow Voltage Manipulation of Ferromagnetism

Spintronic elements based on spin transfer torque have emerged with potential for on-chip memory, but they suffer from large energy dissipation due to the large current densities required. In contrast, an electric-field-driven magneto-electric storage element can operate with capacitive displacement charge and potentially reach 1-10 µJ cm^-2 switching operation. Here, magneto-electric switching of a magnetoresistive element is shown, operating at or below 200 mV, with a pathway to get down to 100 mV. A combination of phase detuning is utilized via isovalent La substitution and thickness scaling in multiferroic BiFeO₃ to scale the switching energy density to ≈10 µJ cm^-2 . This work provides a template to achieve attojoule-class nonvolatile memories.

Recent Advances in Flexible and Stretchable Sensing Systems: From the Perspective of System Integration

Biological signals generated during various biological processes are critically important for providing insight into the human physiological status. Recently, there have been many great efforts in developing flexible and stretchable sensing systems to provide biological signal monitoring platforms with intimate integration with biological surfaces. Here, this review summarizes the recent advances in flexible and stretchable sensing systems from the perspective of electronic system integration. A comprehensive general sensing system architecture is described, which consists of sensors, sensor interface circuits, memories, and digital processing units. The subsequent content focuses on the integration requirements and highlights some advanced progress for each component. Next, representative examples of flexible and stretchable sensing systems for electrophysiological, physical, and chemical information monitoring are introduced. This review concludes with an outlook on the remaining challenges and opportunities for future fully flexible or stretchable sensing systems.

Protonic solid-state electrochemical synapse for physical neural networks

Physical neural networks made of analog resistive switching processors are promising platforms for analog computing. State-of-the-art resistive switches rely on either conductive filament formation or phase change. These processes suffer from poor reproducibility or high energy consumption, respectively. Herein, we demonstrate the behavior of an alternative synapse design that relies on a deterministic charge-controlled mechanism, modulated electrochemically in solid-state. The device operates by shuffling the smallest cation, the proton, in a three-terminal configuration. It has a channel of active material, WO3. A solid proton reservoir layer, PdHx, also serves as the gate terminal. A proton conducting solid electrolyte separates the channel and the reservoir. By protonation/deprotonation, we modulate the electronic conductivity of the channel over seven orders of magnitude, obtaining a continuum of resistance states. Proton intercalation increases the electronic conductivity of WO3 by increasing both the carrier density and mobility. This switching mechanism offers low energy dissipation, good reversibility, and high symmetry in programming.

Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

In this work, the measured electrical characteristics of a fully depleted silicon-on-insulator (FDSOI) device and fin-shaped field-effect transistor (FinFET), whose gate electrode is connected in series to the bottom electrode of a ferroelectric capacitor (FE-FDSOI/FE-FinFET), are experimentally studied. The hysteretic property in input transfer characteristic of those devices is desirable for memory device applications, so that the understanding and modulating the hysteresis window is a key knob in designing the devices. It is experimentally observed that the hysteresis window of FE-FDSOI/FE-FinFET is decreased with (i) increasing the area of the ferroelectric capacitor and/or (ii) decreasing the gate area of baseline FET. The way how to control the hysteresis window of FE-FDSOI/FE-FinFET is proposed and discussed in detail.

Memristive and Synaptic Characteristics of Nitride-Based Heterostructures on Si Substrate

Brain-inspired artificial synaptic devices and neurons have the potential for application in future neuromorphic computing as they consume low energy. In this study, the memristive switching characteristics of a nitride-based device with two amorphous layers (SiN/BN) is investigated. We demonstrate the coexistence of filamentary (abrupt) and interface (homogeneous) switching of Ni/SiN/BN/n⁺⁺-Si devices. A better gradual conductance modulation is achieved for interface-type switching as compared with filamentary switching for an artificial synaptic device using appropriate voltage pulse stimulations. The improved classification accuracy for the interface switching (85.6%) is confirmed and compared to the accuracy of the filamentary switching mode (75.1%) by a three-layer neural network (784 × 128 × 10). Furthermore, the spike-timing-dependent plasticity characteristics of the synaptic device are also demonstrated. The results indicate the possibility of achieving an artificial synapse with a bilayer SiN/BN structure.

Microscopic Mechanism of Carbon-Dopant Manipulating Device Performance in CGeSbTe-Based Phase Change Random Access Memory

Carbon (C)-doped Ge₂Sb₂Te₅ material is a potential candidate in phase change random access memory (PCRAM) because of its superb thermal stability and ultrahigh cycle endurance. Unfortunately, the role and distribution evolution of C-dopant is still not fully understood, especially in practical industrial devices. In this report, with the aid of advanced spherical aberration corrected transmission electron microscopy, the mechanism of microstructure evolution manipulated by C-dopant is clearly defined. The grain-inner C atoms distinctly increase cationic migration energy barriers, which is the fundamental reason for promoting the thermal stability of metastable face-centered-cubic phase and postponing its transition to the hexagonal structure. By current pulses stimulation, the stochastic grain-outer C clusters tend to aggregate in the active area by breaking C-Ge bonding; thus, grain growth and elemental segregation are effectively suppressed to improve device reliability, for example, lower SET resistance, shorter SET time, and enlarged RESET/SET ratio. In short, the visual distribution variations of C-dopant can manipulate the performance of the PCRAM device, having much broader implications for optimizing its microstructure transition and understanding C-doped material system.

Mixed-Precision Deep Learning Based on Computational Memory

Deep neural networks (DNNs) have revolutionized the field of artificial intelligence and have achieved unprecedented success in cognitive tasks such as image and speech recognition. Training of large DNNs, however, is computationally intensive and this has motivated the search for novel computing architectures targeting this application. A computational memory unit with nanoscale resistive memory devices organized in crossbar arrays could store the synaptic weights in their conductance states and perform the expensive weighted summations in place in a non-von Neumann manner. However, updating the conductance states in a reliable manner during the weight update process is a fundamental challenge that limits the training accuracy of such an implementation. Here, we propose a mixed-precision architecture that combines a computational memory unit performing the weighted summations and imprecise conductance updates with a digital processing unit that accumulates the weight updates in high precision. A combined hardware/software training experiment of a multilayer perceptron based on the proposed architecture using a phase-change memory (PCM) array achieves 97.73% test accuracy on the task of classifying handwritten digits (based on the MNIST dataset), within 0.6% of the software baseline. The architecture is further evaluated using accurate behavioral models of PCM on a wide class of networks, namely convolutional neural networks, long-short-term-memory networks, and generative-adversarial networks. Accuracies comparable to those of floating-point implementations are achieved without being constrained by the non-idealities associated with the PCM devices. A system-level study demonstrates 172 × improvement in energy efficiency of the architecture when used for training a multilayer perceptron compared with a dedicated fully digital 32-bit implementation.

Y-Doped Sb2Te3 Phase-Change Materials: Toward a Universal Memory

The disadvantages of high power consumption and slow operating speed hinder the application of phase-change materials (PCMs) for a universal memory. In this work, based on a rigorous experimental scheme, we synthesized a series of Y_xSb_2-xTe₃ (0 ≤ x ≤ 0.333) PCMs and demonstrated that Y_0.25Sb_1.75Te₃ (YST) is an excellent candidate material for the universal phase-change memory. This YST PCM, even being integrated into a conventional T-shaped device, exhibits an ultralow reset power consumption of 1.3 pJ and a competitive fast set speed of 6 ns. The ultralow power consumption is attributed to the Y-reduced thermal and electrical conductivity, while the maintained crystal structure of Sb₂Te₃ and the grain refinement provide the competitive fast crystallization speed. This work highlights a novel way to obtain new PCMs with lower power consumption and competitive fast speed toward a universal memory.

Understanding of Polarization-Induced Threshold Voltage Shift in Ferroelectric-Gated Field Effect Transistor for Neuromorphic Applications

A ferroelectric-gated fin-shaped field effect transistor (Fe-FinFET) is fabricated by connecting a Pb(Zr0.2Ti0.8)O3-based ferroelectric capacitor into the gate electrode of FinFET. The ferroelectric capacitor shows coercive voltages of approximately −1.5 V and 2.25 V. The polarization-induced threshold voltage shift in the Fe-FinFET is investigated by regulating the gate voltage sweep range. When the maximum positive gate to source voltage is varied from 4 V to 2 V with a fixed starting negative gate to source voltage, the threshold voltage during the backward sweep is increased from approximately −0.60 V to 1.04 V. In the case of starting negative gate to source voltage variation from −4 V to −0.5 V with a fixed maximum positive gate to source voltage of 4 V, the threshold voltage during the forward sweep is decreased from 1.66 V to 0.87 V. Those results can be elucidated with polarization domain states. Lastly, it is observed that the threshold voltage is mostly increased/decreased when the positive/negative gate voltage sweep range is smaller/larger than the positive/negative coercive voltage, respectively.

Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications

In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.

Back-End, CMOS-Compatible Ferroelectric Field-Effect Transistor for Synaptic Weights

Neuromorphic computing architectures enable the dense colocation of memory and processing elements within a single circuit. This colocation removes the communication bottleneck of transferring data between separate memory and computing units as in standard von Neuman architectures for data-critical applications including machine learning. The essential building blocks of neuromorphic systems are nonvolatile synaptic elements such as memristors. Key memristor properties include a suitable nonvolatile resistance range, continuous linear resistance modulation, and symmetric switching. In this work, we demonstrate voltage-controlled, symmetric and analog potentiation and depression of a ferroelectric Hf_0.57Zr_0.43O₂ (HZO) field-effect transistor (FeFET) with good linearity. Our FeFET operates with low writing energy (fJ) and fast programming time (40 ns). Retention measurements have been performed over 4 bit depth with low noise (1%) in the tungsten oxide (WO_x) readout channel. By adjusting the channel thickness from 15 to 8 nm, the on/off ratio of the FeFET can be engineered from 1 to 200% with an on-resistance ideally >100 kΩ, depending on the channel geometry. The device concept is using earth-abundant materials and is compatible with a back end of line (BEOL) integration into complementary metal-oxide-semiconductor (CMOS) processes. It has therefore a great potential for the fabrication of high-density, large-scale integrated arrays of artificial analog synapses.

A highly CMOS compatible hafnia-based ferroelectric diode

Memory devices with high speed and high density are highly desired to address the ‘memory wall’ issue. Here we demonstrated a highly scalable, three-dimensional stackable ferroelectric diode, with its rectifying polarity modulated by the polarization reversal of Hf_0.5Zr_0.5O₂ films. By visualizing the hafnium/zirconium lattice order and oxygen lattice order with atomic-resolution spherical aberration-corrected STEM, we revealed the correlation between the spontaneous polarization of Hf_0.5Zr_0.5O₂ film and the displacement of oxygen atom, thus unambiguously identified the non-centrosymmetric Pca2₁ orthorhombic phase in Hf_0.5Zr_0.5O₂ film. We further implemented this ferroelectric diode in an 8 layers 3D array. Operation speed as high as 20 ns and robust endurance of more than 10⁹ were demonstrated. The built-in nonlinearity of more than 100 guarantees its self-selective property that eliminates the need for external selectors to suppress the leakage current in large array. This work opens up new opportunities for future memory hierarchy evolution.

Designing reliable, scalable and high speed computing systems remains a challenge. Here, the authors identify noncentrosymmetric orthorhombic phase in HZO film and demonstrate a CMOS compatible 3D Vertical HZO-based ferroelectric diode array with self-selective property and 20 ns of speed operation.

Resistive Switching in Nonperovskite-Phase CsPbI3 Film-Based Memory Devices

Because of their attractive photoelectrical properties, perovskite-phase, CsPbX₃ (X = I, Br, or Cl) materials have recently gained attention for their applications in resistive switching (RS) memories. However, phase transition of the CsPbI₃ from perovskite (cubic phase) to nonperovskite (orthorhombic phase) at room temperature is problematic; it remains a challenge to apply nonperovskite CsPbI₃ in RS memories. In the present work, a polymethylmethacrylate (PMMA)-assisted deposition method for nonperovskite CsPbI₃ is introduced to fabricate a composite film of CsPbI₃ with PMMA (PMMA@CsPbI₃) with a smooth surface morphology on fluorine-doped tin oxide (FTO) substrates. Devices with a Ag/PMMA@CsPbI₃/FTO architecture show nonvolatile RS characteristics with an ON/OFF ratio around 10², endurance over 500 cycles, and a retention time of 10³ s. Analyses suggested that a Schottky barrier at the Ag/PMMA@CsPbI₃ interface and a bias-induced migration of Ag ions within the composite films are responsible for the RS operation. This is the first record for RS devices based on nonperovskite CsPbI₃, and it may bring the future research on nonperovskite CsPbI₃ applied in RS memory devices some new inspiration..

High Performance All Nonmetal SiNx Resistive Random Access Memory with Strong Process Dependence

All-nonmetal resistive random access memory (RRAM) with a N+-Si/SiNx/P+-Si structure was investigated in this study. The device performance of SiNx developed using physical vapor deposition (PVD) was significantly better than that of a device fabricated using plasma-enhanced chemical vapor deposition (PECVD). The SiNx RRAM device developed using PVD has a large resistance window that is larger than 104 and exhibits good endurance to 105 cycles under switching pulses of 1 μs and a retention time of 104 s at 85 °C. Moreover, the SiNx RRAM device developed using PVD had tighter device-to-device distribution of set and reset voltages than those developed using PECVD. Such tight distribution is crucial to realise a large-size cross-point array and integrate with complementary metal-oxide-semiconductor technology to realise electronic neurons. The high performance of the SiNx RRAM device developed using PVD is attributed to the abundant defects in the PVD dielectric that was supported by the analysed conduction mechanisms obtained from the measured current-voltage characteristics.

SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

von Neumann architecture based computers isolate computation and storage (i.e. data is shuttled between computation blocks (processor) and memory blocks). The to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the Memory wall. Logic in-Memory (LIM)/In-Memory Computing (IMC) approaches aim to address this bottleneck by directly computing inside memory units thereby eliminating energy-intensive and time-consuming data movement. Several recent works in literature, propose realization of logic function(s) directly using arrays of emerging resistive memory devices (example- memristors, RRAM/ReRAM, PCM, CBRAM, OxRAM, STT-MRAM etc.), rather than using conventional transistors for computing. The logic/embedded-side of digital systems (like processors, micro-controllers) can greatly benefit from such LIM realizations. However, the pure storage-side of digital systems (example SSDs, enterprise storage etc.) will not benefit much from such LIM approaches as when memory arrays are used for logic they lose their core functionality of storage. Thus, there is the need for an approach complementary to existing LIM techniques, that’s more beneficial for the storage-side of digital systems; one that gives compute capability to memory arrays not at the cost of their existing stored states. Fundamentally, this would require memory nanodevice arrays that are capable of storing and computing simultaneously. In this paper, we propose a novel ‘Simultaneous Logic in-Memory’ (SLIM) methodology which is complementary to existing LIM approaches in literature. Through extensive experiments we demonstrate novel SLIM bitcells (1T-1R/2T-1R) comprising non-filamentary bilayer analog OxRAM devices with NMOS transistors. Proposed bitcells are capable of implementing both Memory and Logic operations simultaneously. Detailed programming scheme, array level implementation, and controller architecture are also proposed. Furthermore, to study the impact of proposed SLIM approach for real-world implementations, we performed analysis for two applications: (i) Sobel Edge Detection, and (ii) Binary Neural Network- Multi layer Perceptron (BNN-MLP). By performing all computations in SLIM bitcell array, huge Energy Delay Product (EDP) savings of ≈75× for 1T-1R (≈40× for 2T-1R) SLIM bitcell were observed for edge-detection application while EDP savings of ≈3.5× for 1T-1R (≈1.6× for 2T-1R) SLIM bitcell were observed for BNN-MLP application respectively, in comparison to conventional computing. EDP savings owing to reduction in data transfer between CPU ↔ memory is observed to be ≈780× (for both SLIM bitcells).

Ambipolar Resistive Switching in an Ultrathin Surface-Supported Metal-Organic Framework Vertical Heterojunction

Memristors (MRs) are considered promising devices with the enormous potential to replace complementary metal-oxide-semiconductor (CMOS) technology, which approaches the scale limit. Efforts to fabricate MRs-based hybrid materials may result in suitable operating parameters coupled to high mechanical flexibility and low cost. Metal-organic frameworks (MOFs) arise as a favorable candidate to cover such demands. The step-by-step growth of MOFs structures on functionalized surfaces, called surface-supported metal-organic frameworks (SURMOFs), opens the possibility for designing new applications in strategic fields such as electronics, optoelectronics, and energy harvesting. However, considering the MRs architecture, the typical high porosity of these hybrid materials may lead to short-circuited devices easily. In this sense, here, it is reported for the first time the integration of SURMOF films in rolled-up scalable-functional devices. A freestanding metallic nanomembrane provides a robust and self-adjusted top mechanical contact on the SURMOF layer. The electrical characterization reveals an ambipolar resistive switching mediated by the humidity level with low-power consumption. The electronic properties are investigated with density functional theory (DFT) calculations. Furthermore, the device concept is versatile, compatible with the current parallelism demands of integration, and transcends the challenge in contacting SURMOF films for scalable-functional devices.

Silver Nanofilament Formation Dynamics in a Polymer-Ionic Liquid Thin Film by Direct-Write

Silver nanofilament formation dynamics are reported for an ionic liquid (IL)-filled solid polymer electrolyte prepared by a direct-write process using a conductive atomic force microscope (C-AFM). Filaments are electrochemically formed at hundreds of xy locations on a ^~40 nm thick polymer electrolyte, polyethylene glycol diacrylate (PEGDA)/[BMIM]PF₆. Although the formation time generally decreases with increasing bias from 0.7 to 3.0 V, an unexpected non-monotonic maximum is observed ^~ 2.0 V. At voltages approaching this region of inverted kinetics, IL electric double layers (EDLs) becomes detectable; thus, the increased nanofilament formation time can be attributed to electric field screening which hinders silver electro-migration and deposition. Scanning electron microscopy confirms that nanofilaments formed in this inverted region have significantly more lateral and diffuse features. Time-dependent formation currents reveal two types of nanofilament growth dynamics: abrupt, where the resistance decreases sharply over as little as a few ms, and gradual where it decreases more slowly over hundreds of ms. Whether the resistance change is abrupt or gradual depends on the extent to which the EDL screens the electric field. Tuning the formation time and growth dynamics using an IL opens the range of accessible resistance states, which is useful for neuromorphic applications.

Flexible Quasi-2D Perovskite/IGZO Phototransistors for Ultrasensitive and Broadband Photodetection

Organic-inorganic hybrid perovskites (PVKs) have recently emerged as attractive materials for photodetectors. However, the poor stability and low electrical conductivity still restrict their practical utilization. Owing to the quantum-well feature of two-dimensional (2D) Ruddlesden-Popper PVKs (2D PVKs), a promising quasi-2D PVK/indium gallium zinc oxide (IGZO) heterostructure phototransistor can be designed. By using a simple ligand-exchange spin-coating method, quasi-2D PVK fabricated on flexible substrates exhibits a desirable type-II energy band alignment, which facilitates effective spatial separation of photoexcited carriers. The device exhibits excellent photoresponsivity values of >10⁵ A W^-1 at 457 nm, and broadband photoresponse (457-1064 nm). By operating the device in the depletion regime, the specific detectivity is found to be 5.1 × 10¹⁶ Jones, which is the record high value among all PVK-based photodetectors reported to date. Due to the resistive hopping barrier in the quasi-2D PVK, the device can also work as an optoelectronic memory for near-infrared information storage. More importantly, the easy manufacturing process is highly beneficial, enabling large-scale and uniform quasi-2D PVK/IGZO hybrid films for detector arrays with outstanding ambient and operation stabilities. All these findings demonstrate the device architecture here provides a rational avenue to the design of next-generation flexible photodetectors with unprecedented sensitivity.

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

Neuromorphic computing based on spikes offers great potential in highly efficient computing paradigms. Recently, several hardware implementations of spiking neural networks based on traditional complementary metal-oxide semiconductor technology or memristors have been developed. However, an interface (called an afferent nerve in biology) with the environment, which converts the analog signal from sensors into spikes in spiking neural networks, is yet to be demonstrated. Here we propose and experimentally demonstrate an artificial spiking afferent nerve based on highly reliable NbO_x Mott memristors for the first time. The spiking frequency of the afferent nerve is proportional to the stimuli intensity before encountering noxiously high stimuli, and then starts to reduce the spiking frequency at an inflection point. Using this afferent nerve, we further build a power-free spiking mechanoreceptor system with a passive piezoelectric device as the tactile sensor. The experimental results indicate that our afferent nerve is promising for constructing self-aware neurorobotics in the future.

Though artificial sensory systems based on electronic devices have been realized, further transformation of data into spikes is required for neural network optimization. Here, based on NbO_x Mott memristors, the authors report artificial spiking afferent nerves for accessing spiking systems and demonstrate spiking mechanoreceptor systems.

Memristive and CMOS Devices for Neuromorphic Computing

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

Towards spike-based machine intelligence with neuromorphic computing

Guided by brain-like 'spiking' computational frameworks, neuromorphic computing-brain-inspired computing for machine intelligence-promises to realize artificial intelligence while reducing the energy requirements of computing platforms. This interdisciplinary field began with the implementation of silicon circuits for biological neural routines, but has evolved to encompass the hardware implementation of algorithms with spike-based encoding and event-driven representations. Here we provide an overview of the developments in neuromorphic computing for both algorithms and hardware and highlight the fundamentals of learning and hardware frameworks. We discuss the main challenges and the future prospects of neuromorphic computing, with emphasis on algorithm-hardware codesign.

Graphene-Edge Electrode on a Cu-Based Chalcogenide Selector for 3D Vertical Memristor Cells

Resistive memristors are considered to be key components in the hardware implementation of complex neuromorphic networks because of their simplicity, compactness, and manageable power dissipation. However, breakthroughs with respect to both the selector material technology and the bit-cost-effective three-dimensional (3D) device architecture are necessary to provide sufficient device density while maintaining the advantages of a two-terminal device. Despite substantial progress in the scaling of the memristor devices, the scaling potential of the selector materials remains unclear. A majority of the selector materials are unlikely to form conductive filaments, and the effect of the highly concentrated electrical fields on such materials is not well understood. In this study, the atomically thin graphene edge in a 3D vertical memory architecture is utilized to study the effect of highly focused electrical fields on a CuGeS chalcogenide selector layer. We demonstrate that additional interface resistance can improve the nonlinearity and reduce leakage current by almost three orders of magnitude; however, even a relatively low Cu⁺ ion density can adversely affect leakage because of the highly asymmetric electrode configuration. This study presents a meaningful step toward understanding the characteristics of mobile ions in solid chalcogenide electrolytes and the potential for ultrascaled selector devices.

Stateful Three-Input Logic with Memristive Switches

Memristive switches are able to act as both storage and computing elements, which make them an excellent candidate for beyond-CMOS computing. In this paper, multi-input memristive switch logic is proposed, which enables the function X OR (Y NOR Z) to be performed in a single-step with three memristive switches. This ORNOR logic gate increases the capabilities of memristive switches, improving the overall system efficiency of a memristive switch-based computing architecture. Additionally, a computing system architecture and clocking scheme are proposed to further utilize memristive switching for computation. The system architecture is based on a design where multiple computational function blocks are interconnected and controlled by a master clock that synchronizes system data processing and transfer. The clocking steps to perform a full adder with the ORNOR gate are presented along with simulation results using a physics-based model. The full adder function block is integrated into the system architecture to realize a 64-bit full adder, which is also demonstrated through simulation.

Graphene and two-dimensional materials for silicon technology

The development of silicon semiconductor technology has produced breakthroughs in electronics-from the microprocessor in the late 1960s to early 1970s, to automation, computers and smartphones-by downscaling the physical size of devices and wires to the nanometre regime. Now, graphene and related two-dimensional (2D) materials offer prospects of unprecedented advances in device performance at the atomic limit, and a synergistic combination of 2D materials with silicon chips promises a heterogeneous platform to deliver massively enhanced potential based on silicon technology. Integration is achieved via three-dimensional monolithic construction of multifunctional high-rise 2D silicon chips, enabling enhanced performance by exploiting the vertical direction and the functional diversification of the silicon platform for applications in opto-electronics and sensing. Here we review the opportunities, progress and challenges of integrating atomically thin materials with silicon-based nanosystems, and also consider the prospects for computational and non-computational applications.

Composition-Controlled Atomic Layer Deposition of Phase-Change Memories and Ovonic Threshold Switches with High Performance

Chalcogenide compounds are the main characters in a revolution in electronic memories. These materials are used to produce ultrafast ovonic threshold switches (OTSs) with good selectivity and moderate leakage current and phase-change memories (PCMs) with excellent endurance and short read/write times when compared with state-of-the-art flash-NANDs. The combination of these two electrical elements is used to fabricate nonvolatile memory arrays with a write/access time orders of magnitude shorter than that of state-of-the-art flash-NANDs. These devices have a pivotal role for the advancement of fields such as artificial intelligence, machine learning, and big-data. Chalcogenide films, at the moment, are deposited by using physical vapor deposition (PVD) techniques that allow for fine control over the stoichiometry of solid solutions but fail in providing the conformality required for developing large-memory-capacity integrated 3D structures. Here we present conformal ALD chalcogenide films with control over the composition of germanium, antimony, and tellurium (GST). By developing a technique to grow elemental Te we demonstrate the ability to deposit conformal, smooth, composition-controlled GST films. We present a thorough physical and chemical characterization of the solids and an in-depth electrical test. We demonstrate the ability to produce both OTS and PCM materials. GeTe₄ OTSs exhibit fast switching times of ∼13 ns. Ge₂Sb₂Te₅ ALD PCMs exhibit a wide memory window exceeding two orders of magnitude, short write times (∼100 ns), and a reset current density as low as ∼10⁷ A/cm²-performance matching or improving upon state-of-the-art PVD PCM devices.

Room-temperature Operation of Low-voltage, Non-volatile, Compound-semiconductor Memory Cells

Whilst the different forms of conventional (charge-based) memories are well suited to their individual roles in computers and other electronic devices, flaws in their properties mean that intensive research into alternative, or emerging, memories continues. In particular, the goal of simultaneously achieving the contradictory requirements of non-volatility and fast, low-voltage (low-energy) switching has proved challenging. Here, we report an oxide-free, floating-gate memory cell based on III-V semiconductor heterostructures with a junctionless channel and non-destructive read of the stored data. Non-volatile data retention of at least 10⁴ s in combination with switching at ≤2.6 V is achieved by use of the extraordinary 2.1 eV conduction band offsets of InAs/AlSb and a triple-barrier resonant tunnelling structure. The combination of low-voltage operation and small capacitance implies intrinsic switching energy per unit area that is 100 and 1000 times smaller than dynamic random access memory and Flash respectively. The device may thus be considered as a new emerging memory with considerable potential.

Localised states and their capture characteristics in amorphous phase-change materials

As phase-change materials are poised to play a key role in next-generation computing systems, improving the current understanding of electrical transport in their amorphous phase can further strengthen their technological competitiveness. Even though the interaction of charge carriers with disorder-induced localised states largely affect the field-dependent conductivity, a clear link between electrical transport and specific features of the electronic density of states (DOS) could not be established yet due to a lack of knowledge of the capture characteristics of trap states. Here, we address this knowledge gap and employ modulated photocurrent spectroscopy (MPC) to investigate localised states in the frequently studied amorphous phase of Ge₂Sb₂Te₅. Additionally, we present results on the DOS in the bandgap of amorphous AgIn-doped Sb₂Te, which has not been subject to high-resolution DOS spectroscopy before. We find experimental evidence for clearly non-constant capture coefficients among a continuous spectrum of localised states in both studied materials. According to this observation especially in AgIn-doped Sb₂Te, where no pronounced defect can be detected as main channel for carrier emission, we point out the necessity of modifying the current Poole-Frenkel-based transport modelling.

All Nonmetal Resistive Random Access Memory

Traditional Resistive Random Access Memory (RRAM) is a metal-insulator-metal (MIM) structure, in which metal oxide is usually used as an insulator. The charge transport mechanism of traditional RRAM is attributed to a metallic filament inside the RRAM. In this paper, we demonstrated a novel RRAM device with no metal inside. The N⁺-Si/SiO_x/P⁺-Si combination forms a N⁺IP⁺ diode structure that is different from traditional MIM RRAM. A large high-resistance/low-resistance window of 1.9 × 10⁴ was measured at room temperature. A favorable retention memory window of 1.2 × 10³ was attained for 10⁴ s at 85 °C. The charge transport mechanism of virgin, high- and low-resistance states can be well modeled by the single Shklovskii-Efros percolation mechanism rather than the charge transport in metallic filament. X-ray photoelectron spectroscopy demonstrated that the value of x in SiO_x was 0.62, which provided sufficient oxygen vacancies for set/reset RRAM functions.

Solid-State Electrochemical Process and Performance Optimization of Memristive Materials and Devices

As an emerging technology, memristors are nanoionic-based electrochemical systems that retains their resistance state based on the history of the applied voltage/current. They can be used for on-chip memory and storage, biologically inspired computing, and in-memory computing. However, the underlying physicochemical processes of memristors still need deeper understanding for the optimization of the device properties to meet the practical application requirements. Herein, we review recent progress in understanding the memristive mechanisms and influential factors for the optimization of memristive switching performances. We first describe the working mechanisms of memristors, including the dynamic processes of active metal ions, native oxygen ions and other active ions in ECM cells, VCM devices and ion gel-based devices, and the switching mechanisms in organic devices, along with discussions on the influential factors of the device performances. The optimization of device properties by electrode/interface engineering, types/configurations of dielectric materials and bias scheme is then illustrated. Finally, we discuss the current challenges and the future development of the memristor.

Sc-Centered Octahedron Enables High-Speed Phase Change Memory with Improved Data Retention and Reduced Power Consumption

Phase change memory (PCM) with advantages of high operation speed, multilevel storage capability, spiking-time-dependent plasticity, etc., has wide application scenarios in both Von Neumann systems and neuromorphic systems. In the automotive application, intelligent system not only needs high efficiency to handle massive data processing but also good robustness to retain the existing data against high working temperature. In this work, Sc-doped GeTe is developed for PCM, which has achieved 120 °C data retention for 10 years, 6 ns operation speed, and 7 nJ low power consumption. The high data retention is attributed to the high coordination number of Sc and its strong bonds with Te atoms in the amorphous phase, which enhances the robustness of the atomic matrices. Sc-centered octahedrons in amorphous state provide a nucleation center, leading to fast crystallization. In the crystalline phase, Sc atoms occupy Ge vacancies to form a homogenous GeTe-like rhombohedral phase. The strong covalent-like Sc-Te bonds weaken the neighboring Ge-Te bonds, lowering energy for melting. Together with the increased energy efficiency originated from confined grain size, the reduced power consumption has been achieved. The improvements in data retention, speed, and power efficiency have made Sc-doped GeTe a promising candidate for high-performance automobile electronics application.

Softening gold for elastronics

Gold, one of the noble metals, has played a significant role in human society throughout history. Gold's excellent electrical, optical and chemical properties make the element indispensable in maintaining a prosperous modern electronics industry. In the emerging field of stretchable electronics (elastronics), the main challenge is how to utilize these excellent material properties under various mechanical deformations. This review covers the recent progress in developing "softening" gold chemistry for various applications in elastronics. We systematically present material synthesis and design principles, applications, and challenges and opportunities ahead.

Redox gated polymer memristive processing memory unit

Memristors with enormous storage capacity and superior processing efficiency are of critical importance to overcome the Moore’s Law limitation and von Neumann bottleneck problems in the big data and artificial intelligence era. In particular, the integration of multifunctionalities into a single memristor promises an essential strategy of obtaining a high-performance electronic device that satisfies the nowadays increasing demands of data storage and processing. In this contribution, we report a proof-of-concept polymer memristive processing-memory unit that demonstrates programmable information storage and processing capabilities. By introducing redox active moieties of triphenylamine and ferrocene onto the pendants of fluorene skeletons, the conjugated polymer exhibits triple oxidation behavior and interesting memristive switching characteristics. Associated with the unique electrochemical and electrical behavior, the polymer device is capable of executing multilevel memory, decimal arithmetic operations of addition, subtraction, multiplication and division, as well as simple Boolean logic operations.

Though designing conductive polymers for memory devices is attractive for future low-cost flexible electronics, a proof-of-concept device has yet to be realized. Here, the authors report a redox-gated polymer memristive processing unit with programmable multilevel storage and logic functionalities.

Using optical resonances to control heat generation and propagation in silicon nanostructures

Integrated electronics, photonics and optoelectronics need full control of lattice reconstruction processes in silicon nanostructures at the nanoscale level.

Organic and hybrid resistive switching materials and devices

This review presents a timely and comprehensive summary of organic and hybrid materials for nonvolatile resistive switching memory applications in the “More than Moore” era, with particular attention on their designing principles for electronic property tuning and flexible memory performance.