Solution-Grown Homojunction Oxide Thin-Film Transistors

Machine Learning Driven Channel Thickness Optimization in Dual-Layer Oxide Thin-Film Transistors for Advanced Electrical Performance

Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual-layer oxide semiconductor thin film transistors (OS TFTs). This approach effectively manages the complex correlation and interdependency between two oxide semiconductor layers, resulting in the efficient design of experiment (DoE) and reducing the trial-and-error. Considering field effect mobility (𝜇) and threshold voltage (Vth ) simultaneously, the dual-layer structure designed by the BO model allows to produce OS TFTs with remarkable electrical performance while significantly saving an amount of experimental trial (only 15 data sets are required). The optimized dual-layer OS TFTs achieve the enhanced field effect mobility of 36.1 cm2  V-1  s-1 and show good stability under bias stress with negligible difference in its threshold voltage compared to conventional IGZO TFTs. Moreover, the BO algorithm is successfully customized to the individual preferences by applying the weight factors assigned to both field effect mobility (𝜇) and threshold voltage (Vth ).

Study of CdS/CdS Nanoparticles Thin Films Deposited by Soft Chemistry for Optoelectronic Applications

Chalcogenides semiconductors are currently being studied as active layers in the development of electronic devices in the field of applied technology. In the present paper, cadmium sulfide (CdS) thin films containing nanoparticles of the same material as the active layer were produced and analyzed for their application in fabricating optoelectronic devices. CdS thin films and CdS nanoparticles were obtained via soft chemistry at low temperatures. The CdS thin film was deposited via chemical bath deposition (CBD); the CdS nanoparticles were synthesized via the precipitation method. The construction of a homojunction was completed by incorporating CdS nanoparticles on CdS thin films deposited via CBD. CdS nanoparticles were deposited using the spin coating technique, and the effect of thermal annealing on the deposited films was investigated. In the modified thin films with nanoparticles, a transmittance of about 70% and a band gap between 2.12 eV and 2.35 eV were obtained. The two characteristic phonons of the CdS were observed via Raman spectroscopy, and the CdS thin films/CdS nanoparticles showed a hexagonal and cubic crystalline structure with average crystallite size of 21.3-28.4 nm, where hexagonal is the most stable for optoelectronic applications, with roughness less than 5 nm, indicating that CdS is relatively smooth, uniform and highly compact. In addition, the characteristic curves of current-voltage for as-deposited and annealed thin films showed that the metal-CdS with the CdS nanoparticle interface exhibits ohmic behavior.

Progressive p-channel vertical transistors fabricated using electrodeposited copper oxide designed with grain boundary tunability

A strategically designed electrodeposition method is proposed for the coating of p-type copper(i) oxide (Cu2O) channels for oxide thin film transistors. To date, conventional p-type oxide semiconductors have revealed a poor mobility and stability and this has obstructed the development of all oxide based logic devices. Furthermore, previous studies on p-type oxide transistors have been limited by the use of a typical planar type configuration. Our Cu2O electrodeposition method designed by incorporating Sb element promotes vertical alignment of the grain boundaries (GBs) and it perfectly coincides with the charge transport direction from the source to the drain in the vertical field effect transistors. These vertically aligned GBs are bundle type GBs and are likely to be ideal for vertical transistors with supreme electrical performances owing to the structurally suppressed grain boundary charge scattering. This alignment of the GBs in the electrodeposited Sb doped Cu2O (Sb:Cu2O) also demonstrates a superior vertical taper profile with conventional wet chemical etching owing to the extremely preferential etching rate along the GBs. Surprisingly, the sidewall formation, with a smooth and steep morphology causes the formation of abrupt and non-defective gate insulator/channel interfaces for superior spacer-free vertical transistors. Consequently, the Cu2O vertical field effect transistors exhibit extraordinary transistor performances of Vth = 0.4 V, μFE = 8 cm2 V-1 s-1, subthreshold swing = 0.24 V dec-1, on/off current ratio = 2 × 108 and qualified electrical and long-term stability characteristics under various environments. To the best of our knowledge, this is the first reported study on an electrodeposited method to design troublesome p-type oxide Cu2O as novel vertical transistors. Finally, power efficient logic inverter circuits with unprecedented performances, such as good noise margins, remarkable gain values of 15.6 (2 VDD) and 62.7 (5 VDD), and high frequency operation up to 10 kHz, are demonstrated using these p-type Cu2O transistors by interconnecting n-type IGZO transistors.

Analysis of Interface Phenomena for High-Performance Dual-Stacked Oxide Thin-Film Transistors via Equivalent Circuit Modeling

Oxide thin-film transistors (TFTs) have attracted much attention because they can be applied to flexible and large-scaled switching devices. Especially, oxide semiconductors (OSs) have been developed as active layers of TFTs. Among them, indium-gallium-zinc oxide (IGZO) is actively used in the organic light-emitting diode display field. However, despite their superior off-state properties, IGZO TFTs are limited by low field-effect mobility, which critically affects display resolution and power consumption. Herein, we determine new working mechanisms in dual-stacked OS, and based on this, we develop a dual-stacked OS-based TFT with improved performance: high field-effect mobility (∼80 cm²/V·s), ideal threshold voltage near 0 V, high on-off current ratio (>10⁹), and good stability at bias stress. Induced areas are formed at the interface by the band offset: band offset-induced area (BOIA) and BOIA-induced area (BIA). They connect the gate bias-induced area (GBIA) and electrode bias-induced area (EBIA), resulting in high current flow. Equivalent circuit modeling and the transmission line method are also introduced for more precise verification. By verifying current change with gate voltage in the single OS layer, the current flowing direction in the dual-stacked OS is calculated and estimated. This is powerful evidence to understand the conduction mechanism in a dual-stacked OS-based TFT, and it will provide new design rules for high-performance OS-based TFTs.

Multimode Operation of Organic-Inorganic Hybrid Thin-Film Transistors Based on Solution-Processed Indium Oxide Films

Solution-processed metal oxide (MO) thin films have been extensively studied for use in thin-film transistors (TFTs) due to their high optical transparency, simplicity of fabrication methods, and high electron mobility. Here, we report, for the first time, the improvement of the electronic properties of solution-processed indium oxide (InO_x) films by the subsequent addition of an organic p-type semiconductor material, here 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene), yielding organic-inorganic hybrid TFTs. The addition of TIPS-pentacene not only improves the electron mobility by enhancing the charge carrier percolation pathways but also improves the electronic and temporal stability of the I_DS(V_G) characteristics as well as reduces the number of required spin-coating steps of the InO_x precursor solution. Very interestingly, the introduction of 10 nm TIPS-pentacene films on top of 15 nm InO_x layers allows the fabrication of either enhancement- or depletion-mode devices with only minimal changes to the fabrication process. Specifically, we find that when the TIPS-pentacene layer is added on top of the source/drain electrodes, resulting in devices with embedded source/drain electrodes [embedded electrode TFTs (EETFTs)], the devices exhibit an enhancement-mode behavior with an average mobility (μ) of 6.4 cm² V^-1 s^-1, a source-drain current ratio (I_on/I_off) of around 10⁵, and a near-zero threshold voltage (V_TH). When on the other hand the TIPS-pentacene layer is added before the source-drain electrodes, i.e., in top-contact electrode TFTs (TCETFTs), a very clear depletion mode behavior is observed with an average μ of 6.3 cm² V^-1 s^-1, an I_on/I_off ratio of over 10⁵, and a V_TH of -80.3 V. Furthermore, a logic inverter is fabricated combining the enhancement (EETFTs)- and depletion (TCETFTs)-mode transistors, which shows a potential for the construction of organic-inorganic hybrid electronics and circuits.

Influence of metallization process on solution-processed InGaZnO thin film transistors

Low-temperature solution-processed InGaZnO (IGZO) thin film transistors (TFTs) have recently attracted significant attention as the next-generation flexible display TFTs, owing to their high transparency, high electrical performance, low-cost fabrication, and large-area scalability. However, solution-processed amorphous IGZO TFTs have several drawbacks, such as poor film quality or low stability, and have been studied with view to improving the device performance. One of the critical components determining device characteristics is the metallization process, which we systematically studied using aluminum (Al) source and drain electrodes. The electrical properties were measured for different channel lengths and evaluated using the threshold voltage (V_th) and subthreshold swing (SS). Al electrodes directly affect the channel region, enhancing the electron density because of the doping effect from Al and oxygen vacancy-related oxidation of Al and causing an abnormal negative shift ofV_th, which is confirmed by the component analysis via various spectroscopies. To understand and improve the TFT characteristics, we conducted a low-temperature post-annealing process and polymer passivation and succeeded in movingV_thfrom over 150 V to near 0 V and remarkably improved SS. This study discovered that the influence of source-drain metallization on the channel region determines the device characteristics through the close relation between metal oxidation and the number of oxygen vacancies.

Ecofriendly Solution-Combustion-Processed Thin-Film Transistors for Synaptic Emulation and Neuromorphic Computing

The ecofriendly combustion synthesis (ECS) and self-combustion synthesis (ESCS) have been successfully utilized to deposit high-k aluminum oxide (AlO_x) dielectrics at low temperatures and applied for aqueous In₂O₃ thin-film transistors (TFTs) accordingly. The ECS and ESCS processes facilitate the formation of high-quality dielectrics at lower temperatures compared to conventional methods based on an ethanol precursor, as confirmed by thermal analysis and chemical composition characterization. The aqueous In₂O₃ TFTs based on ECS and ESCS-AlO_x show enhanced electrical characteristics and counterclockwise transfer-curve hysteresis. The memory-like counterclockwise behavior in the transfer curve modulated by the gate bias voltage is comparable to the signal modulation by the neurotransmitters. ECS and ESCS transistors are employed to perform synaptic emulation; various short-term and long-term memory functions are emulated with low operating voltages and high excitatory postsynaptic current levels. High stability and reproducibility are achieved within 240 pulses of long-term synaptic potentiation and depression. The synaptic emulation functions achieved in this work match the demand for artificial neural networks (ANN), and a multilayer perceptron (MLP) is developed using an ECS-AlO_x synaptic transistor for image recognition. A superior recognition rate of over 90% is achieved based on ECS-AlO_x synaptic transistors, which facilitates the implementation of the metal-oxide synaptic transistor for future neuromorphic computing via an ecofriendly route.

Conductive Polymer-Assisted Metal Oxide Hybrid Semiconductors for High-Performance Thin-Film Transistors

Metal oxide semiconductors doped with additional inorganic cations have insufficient electron mobility for next-generation electronic devices so strategies to realize the semiconductors exhibiting stability and high performance are required. To overcome the limitations of conventional inorganic cation doping to improve the electrical characteristics and stability of metal oxide semiconductors, we propose solution-processed high-performance metal oxide thin-film transistors (TFTs) by incorporating polyaniline (PANI), a conductive polymer, in a metal oxide matrix. The chemical interaction between the metal oxide and PANI demonstrated that the defect sites and crystallinity of the semiconductor layer are controllable. In addition, the change in oxygen-related chemical bonding of PANI-doped indium oxide (InO_x) TFTs induces superior electrical characteristics compared to pristine InO_x TFTs, even though trace amounts of PANI are doped in the semiconductor. In particular, the average field-effect mobility remarkably enhanced from 15.02 to 26.58 cm² V^-1 s^-1, the on/off current ratio improved from 10⁸ to 10⁹, and the threshold voltage became close to 0 V actually from -7.9 to -1.4 V.

Effects of Intense Pulsed Light (IPL) Rapid Annealing and Back-Channel Passivation on Solution-Processed In-Ga-Zn-O Thin Film Transistors Array

We report on the effects of the intense pulsed light (IPL) rapid annealing process and back-channel passivation on the solution-processed In-Ga-Zn-O (IGZO) thin film transistors (TFTs) array. To improve the electrical properties, stability and uniformity of IGZO TFTs, the oxide channel layers were treated by IPL at atmospheric ambient and passivated by photo-sensitive polyimide (PSPI). When we treated the IGZO channel layer by the IPL rapid annealing process, saturation field effect mobility and subthreshold swing (S.S.) were improved. And, to protect the back-channel of oxide channel layers from oxygen and water molecules, we passivated TFT devices with photo-sensitive polyimide. The IGZO TFTs on glass substrate treated by IPL rapid annealing without PSPI passivation showed the field effect mobility (μ_FE) of 1.54 cm²/Vs and subthreshold swing (S.S.) of 0.708 V/decade. The PSPI-passivated IGZO TFTs showed higher μ_FE of 2.17 cm²/Vs than that of device without passivation process and improved S.S. of 0.225 V/decade. By using a simple and fast intense pulsed light treatment with an appropriate back-channel passivation layer, we could improve the electrical characteristics and hysteresis of IGZO-TFTs. We also showed the improved uniformity of electrical characteristics for IGZO TFT devices in the area of 10 × 40 mm². Since this IPL rapid annealing process could be performed at a low temperature, it can be applied to flexible electronics on plastic substrates in the near future.

Recent Advances of Solution-Processed Heterojunction Oxide Thin-Film Transistors

Thin-film transistors (TFTs) made of metal oxide semiconductors are now increasingly used in flat-panel displays. Metal oxides are mainly fabricated via vacuum-based technologies, but solution approaches are of great interest due to the advantages of low-cost and high-throughput manufacturing. Unfortunately, solution-processed oxide TFTs suffer from relatively poor electrical performance, hindering further development. Recent studies suggest that this issue could be solved by introducing a novel heterojunction strategy. This article reviews the recent advances in solution-processed heterojunction oxide TFTs, with a specific focus on the latest developments over the past five years. Two of the most prominent advantages of heterostructure oxide TFTs are discussed, namely electrical-property modulation and mobility enhancement by forming 2D electron gas. It is expected that this review will manifest the strong potential of solution-based heterojunction oxide TFTs towards high performance and large-scale electronics.

The Effect of Zirconium Doping on Solution-Processed Indium Oxide Thin Films Measured by a Novel Nondestructive Testing Method (Microwave Photoconductivity Decay)

Solution-processed indium oxide is an ideal transparent semiconductor material with wide band gap. Zirconium is an element characterized by a strong binding ability to oxygen which can inhibit the formation of oxygen vacancies and reduce the surface defect state. In this paper, zirconium doped indium oxide (InxZryO) thin films were prepared by the solution method, with indium oxide being doped with zirconium in order to tune the relative number of oxygen vacancies. The influence of the Zr doping concentration and the post-annealed temperature on the properties of the InxZryO thin films was investigated. The results show that the doping process improves the crystallinity and relative density of the obtained films. A novel nondestructive method named microwave photoconductivity decay (μ-PCD) was used to evaluate the quality of InxZryO thin films by simply measuring their response under laser irradiation. The relative number of oxygen vacancies and the minority carrier concentration achieved minimum values at 10 at.% Zr doping concentration. Furthermore, InxZryO thin films with optimal properties from an electrical point of view were obtained at 10 at.% Zr doping concentration, annealed at 400 °C. Characterized by an average transmittance above 90% in the visible range, the obtained InxZryO thin films can be used as active layer materials in the fabrication of high-performance thin film transistor (TFT) devices.