Overcoming Electrochemical Instabilities of Printed Silver Electrodes in All-Printed Ion Gel Gated Carbon Nanotube Thin-Film Transistors

Fully-Solution-Processed Enhancement-Mode Complementary Metal-Oxide-Semiconductor Carbon Nanotube Thin Film Transistors Based on BiI3 -Doped Crosslinked Poly(4-Vinylphenol) Dielectrics for Ultralow-Power Flexible Electronics

The threshold voltage (V_th ) adjustment of complementary metal-oxide-semiconductor (CMOS) thin film transistors (TFTs) is one of the research hotspots due to its key role in energy consumption control of CMOS circuits. Here, ultralow-power flexible CMOS circuits based on well-matched enhancement-mode (E-mode) CMOS single-walled carbon nanotube (SWCNT) TFTs are successfully achieved through tuning the work function of gate electrodes, electron doping, and printing techniques. E-mode P-type CMOS SWCNT TFTs with the full-solution procedure are first obtained through decreasing the work function of Ag gate electrodes directly caused by the deposition of bismuth iodide (BiI₃ )-doped solid-state electrolyte dielectrics. After synthetic optimization of dielectric compositions and semiconductor printing process, the flexible printed E-mode SWCNT TFTs show the high I_on /I_off ratios of ≈10⁶ , small subthreshold swing (SS) of 70-85 mV dec^-1 , low operating voltages of ≈0.5 to -1.5 V, good stability and excellent mechanical flexibility during 10 000 bending cycles. E-mode N-type SWCNT TFTs are then selectively achieved via printing the polarity conversion ink (2-Amino-2-methyl-1-propanol (AMP)  as electron  doping agent) in P- type TFT channels. Last, printed SWCNT CMOS inverters are successfully constructed with full rail-to-rail output characteristics and the record unit static power consumption of 6.75 fW µm^-1 at V_DD of 0.2 V.

All-Carbon Thin-Film Transistors Using Water-Only Printing

Printing thin-film transistors (TFTs) using nanomaterials is a promising approach for future electronics. Yet, most inks rely on environmentally harmful solvents for solubilizing and postprint processing the nanomaterials. In this work, we demonstrate water-only TFTs printed from all-carbon inks of semiconducting carbon nanotubes (CNTs), conducting graphene, and insulating crystalline nanocellulose (CNC). While suspending these nanomaterials into aqueous inks is readily achieved, printing the inks into thin films of sufficient surface coverage and in multilayer stacks to form TFTs has proven elusive without high temperatures, hazardous chemicals, and/or lengthy postprocessing. Using aerosol jet printing, our approach involves a maximum temperature of 70 °C and no hazardous chemicals─all inks are aqueous and only water is used for processing. An intermittent rinsing technique was utilized to address the surface adhesion challenges that limit film density of printed aqueous CNTs. These findings provide promising steps toward an environmentally friendly realization of thin-film electronics.

Ionic dielectrics for fully printed carbon nanotube transistors: impact of composition and induced stresses

Printed carbon nanotube thin-film transistors (CNT-TFTs) are candidates for flexible electronics with printability on a wide range of substrates. Among the layers comprising a CNT-TFT, the gate dielectric has proven most difficult to additively print owing to challenges in film uniformity, thickness, and post-processing requirements. Printed ionic dielectrics show promise for addressing these issues and yielding devices that operate at low voltages thanks to their high-capacitance electric double layers. However, the printing of ionic dielectrics in their various compositions is not well understood, nor is the impact of certain stresses on these materials. In this work, we studied three compositionally distinct ionic dielectrics in fully printed CNT-TFTs: the polar-fluorinated polymer elastomer PVDF-HFP; an ion gel consisting of triblock polymer PS-PMMA-PS and ionic liquid EMIM-TFSI; and crystalline nanocellulose (CNC) with a salt concentration of 0.05%. Although ion gel has been thoroughly studied, e-PVDF-HFP and CNC printing are relatively new and this study provides insights into their ink formulation, print processing, and performance as gate dielectrics. Using a consistent aerosol jet printing approach, each ionic dielectric was printed into similar CNT-TFTs, allowing for direct comparison through extensive characterization, including mechanical and electrical stress tests. The ionic dielectrics were found to have distinct operational dependencies based on their compositional and ionic attributes. Overall, the results reveal a number of trade-offs that must be managed when selecting a printable ionic dielectric, with CNC showing the strongest performance for low-voltage operation but the ion gel and elastomer exhibiting better stability under bias and mechanical stresses.

Electrolyte-gated transistors for enhanced performance bioelectronics

Electrolyte-gated transistors (EGTs), capable of transducing biological and biochemical inputs into amplified electronic signals and stably operating in aqueous environments, have emerged as fundamental building blocks in bioelectronics. In this Primer, the different EGT architectures are described with the fundamental mechanisms underpinning their functional operation, providing insight into key experiments including necessary data analysis and validation. Several organic and inorganic materials used in the EGT structures and the different fabrication approaches for an optimal experimental design are presented and compared. The functional bio-layers and/or biosystems integrated into or interfaced to EGTs, including self-organization and self-assembly strategies, are reviewed. Relevant and promising applications are discussed, including two-dimensional and three-dimensional cell monitoring, ultra-sensitive biosensors, electrophysiology, synaptic and neuromorphic bio-interfaces, prosthetics and robotics. Advantages, limitations and possible optimizations are also surveyed. Finally, current issues and future directions for further developments and applications are discussed.

Layer-By-Layer Printing Strategy for High-Performance Flexible Electronic Devices with Low-Temperature Catalyzed Solution-Processed SiO2

Additive printing techniques have been widely investigated for fabricating multilayered electronic devices. In this work, a layer-by-layer printing strategy is developed to fabricate multilayered electronics including 3D conductive circuits and thin-film transistors (TFTs) with low-temperature catalyzed, solution-processed SiO₂ (LCSS) as the dielectric. Ultrafine, ultrasmooth LCSS films can be facilely formed at 90 °C on a wide variety of organic and inorganic substrates, offering a versatile platform to construct complex heterojunction structures with layer-by-layer fashion at microscale. The high-resolution 3D conductive circuits formed with gold nanoparticles inside the LCSS dielectric demonstrate a high-speed response to the transient voltage in less than 1 µs. The TFTs with semiconducting single-wall carbon nanotubes can be operated with the accumulation mode at a low voltage of 1 V and exhibit average field-effect mobility of 70 cm²  V^-1  s^-1 , on/off ratio of 10⁷ , small average hysteresis of 0.1 V, and high yield up to 100% as well as long-term stability, high negative-gate bias stability, and good mechanical stability. Therefore, the layer-by-layer printing strategy with the LCSS film is promising to assemble large-scale, high-resolution, and high-performance flexible electronics and to provide a fundamental understanding for correlating dielectric properties with device performance.

In-Place Printing of Flexible Electrolyte-Gated Carbon Nanotube Transistors with Enhanced Stability

Ion gel-based dielectrics have long been considered for enabling low-voltage operation in printed thin-film transistors (TFTs), but their compatibility with in-place printing (a streamlined, direct-write printing approach where devices never leave the printer mid- or post-process) remains unexplored. Here, we demonstrate a simple and rapid 4-step in-place printing procedure for producing low-voltage electrolyte-gated carbon nanotube (CNT) thin-film transistors at low temperature (80 °C). This process consists of the use of polymer-wrapped CNT inks for printed channels, silver nanowire inks for printed electrodes, and imidazolium-based ion gel inks for printed gate dielectrics. We find that the efficacy of rinsing CNT films and printing an ion gel in-place is optimized using an elevated platen temperature (as opposed to external rinsing or post-process annealing), where resultant devices exhibited on/off-current ratios exceeding 10³, mobilities exceeding 10 cm²V^-1s^-1, and gate hysteresis of only 0.1 V. Additionally, devices were tested under mechanical strain and long-term bias, showing exceptional flexibility and electrochemical stability over the course of 14-hour bias tests. The findings presented here widen the potential scope of print-in-place (PIP) devices and reveal new avenues of investigation for the improvement of bias stress stability in electrolyte-gated transistors.

Printed carbon nanotube thin-film transistors: progress on printable materials and the path to applications

Printing technologies have attracted significant attention owing to their potential use in the low-cost manufacturing of custom or large-area flexible electronics. Among the many printable electronic materials that have been explored, semiconducting carbon nanotubes (CNTs) have shown increasing promise based on their exceptional electrical and mechanical properties, relative stability in air, and compatibility with several printing techniques to form semiconducting thin films. These attractive attributes make printed CNT thin films promising for applications including, but not limited to, sensors and display backplanes - at the heart of which is electronics' most versatile device: the transistor. In this review, we present a summary of recent advancements in the field of printed carbon nanotube thin-film transistors (CNT-TFTs). In addition to an introduction of different printing techniques, together with their strengths and limitations, we discuss key aspects of ink/material selection and processing of various device components, including the CNT channels, contacts, and gate insulators. It is clear that printed CNT-TFTs are rapidly advancing, but there remain challenges, which are discussed along with current techniques to resolve them and future developments towards practical applications from these devices. There has been interest in low-cost, printable transistors for many years and the CNT-TFTs show great promise for delivering, but will not become a reality without further research advancement.

Ambipolar Deep-Subthreshold Printed-Carbon-Nanotube Transistors for Ultralow-Voltage and Ultralow-Power Electronics

The development of ultralow-power and easy-to-fabricate electronics with potential for large-scale circuit integration (i.e., complementary or complementary-like) is an outstanding challenge for emerging off-the-grid applications, e.g., remote sensing, "place-and-forget", and the Internet of Things. Herein we address this challenge through the development of ambipolar transistors relying on solution-processed polymer-sorted semiconducting carbon nanotube networks (sc-SWCNTNs) operating in the deep-subthreshold regime. Application of self-assembled monolayers at the active channel interface enables the fine-tuning of sc-SWCNTN transistors toward well-balanced ambipolar deep-subthreshold characteristics. The significance of these features is assessed by exploring the applicability of such transistors to complementary-like integrated circuits, with respect to which the impact of the subthreshold slope and flatband voltage on voltage and power requirements is studied experimentally and theoretically. As demonstrated with inverter and NAND gates, the ambipolar deep-subthreshold sc-SWCNTN approach enables digital circuits with complementary-like operation and characteristics including wide noise margins and ultralow operational voltages (≤0.5 V), while exhibiting record-low power consumption (≤1 pW/μm). Among thin-film transistor technologies with minimal material complexity, our approach achieves the lowest energy and power dissipation figures reported to date, which are compatible with and highly attractive for emerging off-the-grid applications.

Nanoscale Patterning of Carbon Nanotubes: Techniques, Applications, and Future

Carbon nanotube (CNT) devices and electronics are achieving maturity and directly competing or surpassing devices that use conventional materials. CNTs have demonstrated ballistic conduction, minimal scaling effects, high current capacity, low power requirements, and excellent optical/photonic properties; making them the ideal candidate for a new material to replace conventional materials in next-generation electronic and photonic systems. CNTs also demonstrate high stability and flexibility, allowing them to be used in flexible, printable, and/or biocompatible electronics. However, a major challenge to fully commercialize these devices is the scalable placement of CNTs into desired micro/nanopatterns and architectures to translate the superior properties of CNTs into macroscale devices. Precise and high throughput patterning becomes increasingly difficult at nanoscale resolution, but it is essential to fully realize the benefits of CNTs. The relatively long, high aspect ratio structures of CNTs must be preserved to maintain their functionalities, consequently making them more difficult to pattern than conventional materials like metals and polymers. This review comprehensively explores the recent development of innovative CNT patterning techniques with nanoscale lateral resolution. Each technique is critically analyzed and applications for the nanoscale-resolution approaches are demonstrated. Promising techniques and the challenges ahead for future devices and applications are discussed.