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Banerjee W, Kashir A, Kamba S. Hafnium Oxide (HfO 2 ) - A Multifunctional Oxide: A Review on the Prospect and Challenges of Hafnium Oxide in Resistive Switching and Ferroelectric Memories. SMALL (WEINHEIM AN DER BERGSTRASSE, GERMANY) 2022; 18:e2107575. [PMID: 35510954 DOI: 10.1002/smll.202107575] [Citation(s) in RCA: 24] [Impact Index Per Article: 12.0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 02/26/2022] [Revised: 03/24/2022] [Indexed: 06/14/2023]
Abstract
Hafnium oxide (HfO2 ) is one of the mature high-k dielectrics that has been standing strong in the memory arena over the last two decades. Its dielectric properties have been researched rigorously for the development of flash memory devices. In this review, the application of HfO2 in two main emerging nonvolatile memory technologies is surveyed, namely resistive random access memory and ferroelectric memory. How the properties of HfO2 equip the former to achieve superlative performance with high-speed reliable switching, excellent endurance, and retention is discussed. The parameters to control HfO2 domains are further discussed, which can unleash the ferroelectric properties in memory applications. Finally, the prospect of HfO2 materials in emerging applications, such as high-density memory and neuromorphic devices are examined, and the various challenges of HfO2 -based resistive random access memory and ferroelectric memory devices are addressed with a future outlook.
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Affiliation(s)
- Writam Banerjee
- Center for Single Atom-based Semiconductor Device, Department of Material Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, Republic of Korea
| | - Alireza Kashir
- Institute of Physics of the Czech Academy of Sciences, Na Slovance 2, Prague 8, 182 21, Czech Republic
| | - Stanislav Kamba
- Institute of Physics of the Czech Academy of Sciences, Na Slovance 2, Prague 8, 182 21, Czech Republic
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Huang Y, Gu Y, Wu X, Ge R, Chang YF, Wang X, Zhang J, Akinwande D, Lee JC. ReSe2-Based RRAM and Circuit-Level Model for Neuromorphic Computing. FRONTIERS IN NANOTECHNOLOGY 2021. [DOI: 10.3389/fnano.2021.782836] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Indexed: 11/13/2022] Open
Abstract
Resistive random-access memory (RRAM) devices have drawn increasing interest for the simplicity of its structure, low power consumption and applicability to neuromorphic computing. By combining analog computing and data storage at the device level, neuromorphic computing system has the potential to meet the demand of computing power in applications such as artificial intelligence (AI), machine learning (ML) and Internet of Things (IoT). Monolayer rhenium diselenide (ReSe2), as a two-dimensional (2D) material, has been reported to exhibit non-volatile resistive switching (NVRS) behavior in RRAM devices with sub-nanometer active layer thickness. In this paper, we demonstrate stable multiple-step RESET in ReSe2 RRAM devices by applying different levels of DC electrical bias. Pulse measurement has been conducted to study the neuromorphic characteristics. Under different height of stimuli, the ReSe2 RRAM devices have been found to switch to different resistance states, which shows the potentiation of synaptic applications. Long-term potentiation (LTP) and depression (LTD) have been demonstrated with the gradual resistance switching behaviors observed in long-term plasticity programming. A Verilog-A model is proposed based on the multiple-step resistive switching behavior. By implementing the LTP/LTD parameters, an artificial neural network (ANN) is constructed for the demonstration of handwriting classification using Modified National Institute of Standards and Technology (MNIST) dataset.
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Abstract
Two-dimensional (2D) layered materials and their heterostructures have recently been recognized as promising building blocks for futuristic brain-like neuromorphic computing devices. They exhibit unique properties such as near-atomic thickness, dangling-bond-free surfaces, high mechanical robustness, and electrical/optical tunability. Such attributes unattainable with traditional electronic materials are particularly promising for high-performance artificial neurons and synapses, enabling energy-efficient operation, high integration density, and excellent scalability. In this review, diverse 2D materials explored for neuromorphic applications, including graphene, transition metal dichalcogenides, hexagonal boron nitride, and black phosphorous, are comprehensively overviewed. Their promise for neuromorphic applications are fully discussed in terms of material property suitability and device operation principles. Furthermore, up-to-date demonstrations of neuromorphic devices based on 2D materials or their heterostructures are presented. Lastly, the challenges associated with the successful implementation of 2D materials into large-scale devices and their material quality control will be outlined along with the future prospect of these emergent materials.
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Ma Z, Zhou S, Zhou C, Xiao Y, Li S, Chan M. Synthesis of Vertical Carbon Nanotube Interconnect Structures Using CMOS-Compatible Catalysts. NANOMATERIALS 2020; 10:nano10101918. [PMID: 32992981 PMCID: PMC7600545 DOI: 10.3390/nano10101918] [Citation(s) in RCA: 4] [Impact Index Per Article: 1.0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 08/18/2020] [Revised: 09/04/2020] [Accepted: 09/11/2020] [Indexed: 11/16/2022]
Abstract
Synthesis of the vertically aligned carbon nanotubes (CNTs) using complementary metal-oxide-semiconductor (CMOS)-compatible methods is essential to integrate the CNT contact and interconnect to nanoscale devices and ultra-dense integrated nanoelectronics. However, the synthesis of high-density CNT array at low-temperature remains a challenging task. The advances in the low-temperature synthesis of high-density vertical CNT structures using CMOS-compatible methods are reviewed. Primarily, recent works on theoretical simulations and experimental characterizations of CNT growth emphasized the critical roles of catalyst design in reducing synthesis temperature and increasing CNT density. In particular, the approach of using multilayer catalyst film to generate the alloyed catalyst nanoparticle was found competent to improve the active catalyst nanoparticle formation and reduce the CNT growth temperature. With the multilayer catalyst, CNT arrays were directly grown on metals, oxides, and 2D materials. Moreover, the relations among the catalyst film thickness, CNT diameter, and wall number were surveyed, which provided potential strategies to control the tube density and the wall density of synthesized CNT array.
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Affiliation(s)
- Zichao Ma
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
| | - Shaolin Zhou
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
- School of Microelectronics, South China University of Technology, Guangzhou 510640, China
- Correspondence:
| | - Changjian Zhou
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
- School of Microelectronics, South China University of Technology, Guangzhou 510640, China
| | - Ying Xiao
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
| | - Suwen Li
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
| | - Mansun Chan
- Dept. Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong, China; (Z.M.); (C.Z.); (Y.X.); (S.L.); (M.C.)
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Shen Z, Zhao C, Qi Y, Xu W, Liu Y, Mitrovic IZ, Yang L, Zhao C. Advances of RRAM Devices: Resistive Switching Mechanisms, Materials and Bionic Synaptic Application. NANOMATERIALS (BASEL, SWITZERLAND) 2020; 10:E1437. [PMID: 32717952 PMCID: PMC7466260 DOI: 10.3390/nano10081437] [Citation(s) in RCA: 56] [Impact Index Per Article: 14.0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 05/31/2020] [Revised: 07/15/2020] [Accepted: 07/19/2020] [Indexed: 11/24/2022]
Abstract
Resistive random access memory (RRAM) devices are receiving increasing extensive attention due to their enhanced properties such as fast operation speed, simple device structure, low power consumption, good scalability potential and so on, and are currently considered to be one of the next-generation alternatives to traditional memory. In this review, an overview of RRAM devices is demonstrated in terms of thin film materials investigation on electrode and function layer, switching mechanisms and artificial intelligence applications. Compared with the well-developed application of inorganic thin film materials (oxides, solid electrolyte and two-dimensional (2D) materials) in RRAM devices, organic thin film materials (biological and polymer materials) application is considered to be the candidate with significant potential. The performance of RRAM devices is closely related to the investigation of switching mechanisms in this review, including thermal-chemical mechanism (TCM), valance change mechanism (VCM) and electrochemical metallization (ECM). Finally, the bionic synaptic application of RRAM devices is under intensive consideration, its main characteristics such as potentiation/depression response, short-/long-term plasticity (STP/LTP), transition from short-term memory to long-term memory (STM to LTM) and spike-time-dependent plasticity (STDP) reveal the great potential of RRAM devices in the field of neuromorphic application.
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Affiliation(s)
- Zongjie Shen
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (C.Z.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Chun Zhao
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (C.Z.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Yanfei Qi
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (C.Z.)
- School of Electronic and Information Engineering, Xi’an Jiaotong University, Xi’an 710061, China
| | - Wangying Xu
- College of Materials Science and Engineering, Shenzhen University, Shenzhen 518060, China;
| | - Yina Liu
- Department of Mathematical Sciences, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China;
| | - Ivona Z. Mitrovic
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Li Yang
- Department of Chemistry, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China;
| | - Cezhou Zhao
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong-Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (C.Z.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
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Shen Z, Zhao C, Qi Y, Mitrovic IZ, Yang L, Wen J, Huang Y, Li P, Zhao C. Memristive Non-Volatile Memory Based on Graphene Materials. MICROMACHINES 2020; 11:E341. [PMID: 32218324 PMCID: PMC7231216 DOI: 10.3390/mi11040341] [Citation(s) in RCA: 20] [Impact Index Per Article: 5.0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 01/30/2020] [Revised: 03/14/2020] [Accepted: 03/21/2020] [Indexed: 02/04/2023]
Abstract
Resistive random access memory (RRAM), which is considered as one of the most promising next-generation non-volatile memory (NVM) devices and a representative of memristor technologies, demonstrated great potential in acting as an artificial synapse in the industry of neuromorphic systems and artificial intelligence (AI), due its advantages such as fast operation speed, low power consumption, and high device density. Graphene and related materials (GRMs), especially graphene oxide (GO), acting as active materials for RRAM devices, are considered as a promising alternative to other materials including metal oxides and perovskite materials. Herein, an overview of GRM-based RRAM devices is provided, with discussion about the properties of GRMs, main operation mechanisms for resistive switching (RS) behavior, figure of merit (FoM) summary, and prospect extension of GRM-based RRAM devices. With excellent physical and chemical advantages like intrinsic Young's modulus (1.0 TPa), good tensile strength (130 GPa), excellent carrier mobility (2.0 × 105 cm2∙V-1∙s-1), and high thermal (5000 Wm-1∙K-1) and superior electrical conductivity (1.0 × 106 S∙m-1), GRMs can act as electrodes and resistive switching media in RRAM devices. In addition, the GRM-based interface between electrode and dielectric can have an effect on atomic diffusion limitation in dielectric and surface effect suppression. Immense amounts of concrete research indicate that GRMs might play a significant role in promoting the large-scale commercialization possibility of RRAM devices.
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Affiliation(s)
- Zongjie Shen
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Chun Zhao
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Yanfei Qi
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- School of Electronic and Information Engineering, Xi’an Jiaotong University, Xi’an 710061, China
| | - Ivona Z. Mitrovic
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Li Yang
- Department of Chemistry, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China;
- Department of Chemistry, University of Liverpool, Liverpool L69 3BX, UK
| | - Jiacheng Wen
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Yanbo Huang
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Puzhuo Li
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
| | - Cezhou Zhao
- Department of Electrical and Electronic Engineering, Xi’an Jiaotong–Liverpool University, Suzhou 215123, China; (Z.S.); (Y.Q.); (J.W.); (Y.H.); (P.L.)
- Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3BX, UK;
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Wu M, Ting Y, Chen J, Wu W. Low Power Consumption Nanofilamentary ECM and VCM Cells in a Single Sidewall of High-Density VRRAM Arrays. ADVANCED SCIENCE (WEINHEIM, BADEN-WURTTEMBERG, GERMANY) 2019; 6:1902363. [PMID: 31890465 PMCID: PMC6918122 DOI: 10.1002/advs.201902363] [Citation(s) in RCA: 9] [Impact Index Per Article: 1.8] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 08/30/2019] [Revised: 09/19/2019] [Indexed: 06/10/2023]
Abstract
The technologies of 3D vertical architecture have made a major breakthrough in establishing high-density memory structures. Combined with an array structure, a 3D high-density vertical resistive random access memory (VRRAM) cross-point array is demonstrated to efficiently increase the device density. Though electrochemical migration (ECM) resistive random access (RRAM) has the advantage of low power consumption, the stability of the operating voltage requires further improvements due to filament expansions and deterioration. In this work, 3D-VRRAM arrays are designed. Two-layered RRAM cells, with one inert and one active sidewall electrode stacked at a cross-point, are constructed, where the thin film sidewall electrode in the VRRAM structure is beneficial for confining the expansions of the conducting filaments. Thus, the top cell (Pt/ZnO/Pt) and the bottom cell (Ag/ZnO/Pt) in the VRRAM structure, which are switched by different mechanisms, can be analyzed at the same time. The oxygen vacancy filaments in the Pt/ZnO/Pt cell and Ag filaments in the Ag/ZnO/Pt cell are verified. The 40 nm thickness sidewall electrode restricts the filament size to nanoscale, which demonstrates the stability of the operating voltages. Additionally, the 0.3 V operating voltage of Ag/ZnO/Pt ECM VRRAM demonstrates the potential of low power consumption of VRRAM arrays in future applications.
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Affiliation(s)
- Min‐Ci Wu
- Department of Materials Science and EngineeringNational Chiao Tung UniversityNo. 1001, University Rd., East Dist.Hsinchu City30010Taiwan
| | - Yi‐Hsin Ting
- Department of Materials Science and EngineeringNational Chiao Tung UniversityNo. 1001, University Rd., East Dist.Hsinchu City30010Taiwan
| | - Jui‐Yuan Chen
- Department of Materials Science and EngineeringNational United UniversityNo. 1, GongjingMiaoli CityMiaoli County360Taiwan
| | - Wen‐Wei Wu
- Department of Materials Science and EngineeringNational Chiao Tung UniversityNo. 1001, University Rd., East Dist.Hsinchu City30010Taiwan
- Center for the Intelligent Semiconductor Nano‐System Technology ResearchNational Chiao Tung UniversityHsinchu City30010Taiwan
- Frontier Research Center on Fundamental and Applied Sciences of MattersNational Tsing Hua UniversityHsinchu City30013Taiwan
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Seo S, Lim J, Lee S, Alimkhanuly B, Kadyrov A, Jeon D, Lee S. Graphene-Edge Electrode on a Cu-Based Chalcogenide Selector for 3D Vertical Memristor Cells. ACS APPLIED MATERIALS & INTERFACES 2019; 11:43466-43472. [PMID: 31658414 DOI: 10.1021/acsami.9b11721] [Citation(s) in RCA: 3] [Impact Index Per Article: 0.6] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/10/2023]
Abstract
Resistive memristors are considered to be key components in the hardware implementation of complex neuromorphic networks because of their simplicity, compactness, and manageable power dissipation. However, breakthroughs with respect to both the selector material technology and the bit-cost-effective three-dimensional (3D) device architecture are necessary to provide sufficient device density while maintaining the advantages of a two-terminal device. Despite substantial progress in the scaling of the memristor devices, the scaling potential of the selector materials remains unclear. A majority of the selector materials are unlikely to form conductive filaments, and the effect of the highly concentrated electrical fields on such materials is not well understood. In this study, the atomically thin graphene edge in a 3D vertical memory architecture is utilized to study the effect of highly focused electrical fields on a CuGeS chalcogenide selector layer. We demonstrate that additional interface resistance can improve the nonlinearity and reduce leakage current by almost three orders of magnitude; however, even a relatively low Cu+ ion density can adversely affect leakage because of the highly asymmetric electrode configuration. This study presents a meaningful step toward understanding the characteristics of mobile ions in solid chalcogenide electrolytes and the potential for ultrascaled selector devices.
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Affiliation(s)
- Shem Seo
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Jinho Lim
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Sunghwan Lee
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Batyrbek Alimkhanuly
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Arman Kadyrov
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Dasom Jeon
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
| | - Seunghyun Lee
- Semiconductor Device & Integration Laboratory, Department of Electronic Engineering , Kyunghee University , Yongin 17104 , Republic of Korea
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Huang YJ, Lee SC. Graphene/h-BN Heterostructures for Vertical Architecture of RRAM Design. Sci Rep 2017; 7:9679. [PMID: 28851911 PMCID: PMC5575158 DOI: 10.1038/s41598-017-08939-2] [Citation(s) in RCA: 22] [Impact Index Per Article: 3.1] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 04/19/2017] [Accepted: 07/17/2017] [Indexed: 12/02/2022] Open
Abstract
The development of RRAM is one of the mainstreams for next generation non-volatile memories to replace the conventional charge-based flash memory. More importantly, the simpler structure of RRAM makes it feasible to be integrated into a passive crossbar array for high-density memory applications. By stacking up the crossbar arrays, the ultra-high density of 3D horizontal RRAM (3D-HRAM) can be realized. However, 3D-HRAM requires critical lithography and other process for every stacked layer, and this fabrication cost overhead increases linearly with the number of stacks. Here, it is demonstrated that the 2D material-based vertical RRAM structure composed of graphene plane electrode/multilayer h-BN insulating dielectric stacked layers, AlOx/TiOx resistive switching layer and ITO pillar electrode exhibits reliable device performance including forming-free, low power consumption (Pset = ~2 μW and Preset = ~0.2 μW), and large memory window (>300). The scanning transmission electron microscopy indicates that the thickness of multilayer h-BN is around 2 nm. Due to the ultrathin-insulating dielectric and naturally high thermal conductivity characteristics of h-BN, the vertical structure combining the graphene plane electrode with multilayer h-BN insulating dielectric can pave the way toward a new area of ultra high-density memory integration in the future.
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Affiliation(s)
- Yi-Jen Huang
- Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
| | - Si-Chen Lee
- Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan.
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Yu M, Cai Y, Wang Z, Fang Y, Liu Y, Yu Z, Pan Y, Zhang Z, Tan J, Yang X, Li M, Huang R. Novel Vertical 3D Structure of TaOx-based RRAM with Self-localized Switching Region by Sidewall Electrode Oxidation. Sci Rep 2016; 6:21020. [PMID: 26884054 PMCID: PMC4756706 DOI: 10.1038/srep21020] [Citation(s) in RCA: 26] [Impact Index Per Article: 3.3] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 11/24/2015] [Accepted: 01/15/2016] [Indexed: 11/10/2022] Open
Abstract
A novel vertical 3D RRAM structure with greatly improved reliability behavior is proposed and experimentally demonstrated through basically compatible process featuring self-localized switching region by sidewall electrode oxidation. Compared with the conventional structure, due to the effective confinement of the switching region, the newly-proposed structure shows about two orders higher endurance (>10(8) without verification operation) and better retention (>180h@150 °C), as well as high uniformity. Corresponding model is put forward, on the base of which thorough theoretical analysis and calculations are conducted as well, demonstrating that, resulting from the physically-isolated switching from neighboring cells, the proposed structure exhibits dramatically improved reliability due to effective suppression of thermal effects and oxygen vacancies diffusion interference, indicating that this novel structure is very promising for future high density 3D RRAM application.
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Affiliation(s)
- Muxi Yu
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Yimao Cai
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Zongwei Wang
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Yichen Fang
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Yefan Liu
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Zhizhen Yu
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Yue Pan
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Zhenxing Zhang
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Jing Tan
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Xue Yang
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Ming Li
- Institute of Microelectronics, Peking University, Beijing 100871, China
| | - Ru Huang
- Institute of Microelectronics, Peking University, Beijing 100871, China
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