Strong enhancement of Raman scattering from a bulk-inactive vibrational mode in few-layer MoTe₂

Two-dimensional layered crystals could show phonon properties that are markedly distinct from those of their bulk counterparts, because of the loss of periodicities along the c-axis directions. Here we investigate the phonon properties of bulk and atomically thin α-MoTe2 using Raman spectroscopy. The Raman spectrum of α-MoTe2 shows a prominent peak of the in-plane E(1)2g mode, with its frequency upshifting with decreasing thickness down to the atomic scale, similar to other dichalcogenides. Furthermore, we find large enhancement of the Raman scattering from the out-of-plane B(1)2g mode in the atomically thin layers. The B(1)2g mode is Raman inactive in the bulk, but is observed to become active in the few-layer films. The intensity ratio of the B(1)2g to E(1)2g peaks evolves significantly with decreasing thickness, in contrast with other dichalcogenides. Our observations point to strong effects of dimensionality on the phonon properties of MoTe2.

Patterning technology for solution-processed organic crystal field-effect transistors

Organic field-effect transistors (OFETs) are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recentdevelopment in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed.

Barrier inhomogeneities at vertically stacked graphene-based heterostructures

The integration of graphene and other atomically flat, two-dimensional materials has attracted much interest and been materialized very recently. An in-depth understanding of transport mechanisms in such heterostructures is essential. In this study, vertically stacked graphene-based heterostructure transistors were manufactured to elucidate the mechanism of electron injection at the interface. The temperature dependence of the electrical characteristics was investigated from 300 to 90 K. In a careful analysis of current-voltage characteristics, an unusual decrease in the effective Schottky barrier height and increase in the ideality factor were observed with decreasing temperature. A model of thermionic emission with a Gaussian distribution of barriers was able to precisely interpret the conduction mechanism. Furthermore, mapping of the effective Schottky barrier height is unmasked as a function of temperature and gate voltage. The results offer significant insight for the development of future layer-integration technology based on graphene-based heterostructures.

Self-aligned formation of sub 1 nm gaps utilizing electromigration during metal deposition

We developed a procedure for the fabrication of sub 1 nm gap Au electrodes via electromigration. Self-aligned nanogap formation was achieved by applying a bias voltage, which causes electromigration during metal evaporation. We also demonstrated the application of this method for the formation of nanogaps as small as 1 nm in width, and we found that the gap size can be controlled by changing the magnitude of the applied voltage. On the basis of the electric conductance and surface-enhanced Raman scattering (SERS) measurements, the fabricated gap size was estimated to be nearly equal to the molecular length of 1,4-benzenedithiol (BDT). Compared with existing electromigration methods, the new method provides two advantages: the process currents are clearly suppressed and parallel or large area production is possible. This simple method for the fabrication of a sub 1 nm gap electrode is useful for single-molecule-sized electronics and opens the door to future research on integrated sub 1 nm sized nanogap devices.

High-performance top-gated monolayer SnS2 field-effect transistors and their integrated logic circuits

Two-dimensional (2D) layered semiconductors are very promising for post-silicon ultrathin channels and flexible electronics due to the remarkable dimensional and mechanical properties. Besides molybdenum disulfide (MoS2), the first recognized 2D semiconductor, it is also important to explore the wide spectrum of layered metal chalcogenides (LMCs) and to identify possible compounds with high performance. Here we report the fabrication of high-performance top-gated field-effect transistors (FETs) and related logic gates from monolayer tin disulfide (SnS2), a non-transition metal dichalcogenide. The measured carrier mobility of our monolayer devices reaches 50 cm(2) V(-1) s(-1), much higher than that of the back-gated counterparts (~1 cm(2) V(-1) s(-1)). Based on a direct-coupled FET logic technique, advanced Boolean logic gates and operations are also implemented, with a voltage gain of 3.5 and output swing of >90% for the NOT and NOR gates, respectively. The superior electrical and integration properties make monolayer SnS2 a strong candidate for next-generation atomic electronics.

Suppression of thermally activated carrier transport in atomically thin MoS2 on crystalline hexagonal boron nitride substrates

We present the temperature-dependent carrier mobility of atomically thin MoS2 field-effect transistors on crystalline hexagonal boron nitride (h-BN) and SiO2 substrates. Our results reveal distinct weak temperature dependence of the MoS2 devices on h-BN substrates. The room temperature mobility enhancement and reduced interface trap density of the single and bilayer MoS2 devices on h-BN substrates further indicate that reducing substrate traps is crucial for enhancing the mobility in atomically thin MoS2 devices.

Low-cost fully transparent ultraviolet photodetectors based on electrospun ZnO-SnO2 heterojunction nanofibers

Electrospun ZnO-SnO2 heterojunction nanofibers are demonstrated to be promising candidates for easily assembled fully transparent high-performance photodetectors.

Thickness-dependent interfacial Coulomb scattering in atomically thin field-effect transistors

Two-dimensional semiconductors are structurally ideal channel materials for the ultimate atomic electronics after silicon era. A long-standing puzzle is the low carrier mobility (μ) in them as compared with corresponding bulk structures, which constitutes the main hurdle for realizing high-performance devices. To address this issue, we perform a combined experimental and theoretical study on atomically thin MoS2 field effect transistors with varying the number of MoS2 layers (NLs). Experimentally, an intimate μ-NL relation is observed with a 10-fold degradation in μ for extremely thinned monolayer channels. To accurately describe the carrier scattering process and shed light on the origin of the thinning-induced mobility degradation, a generalized Coulomb scattering model is developed with strictly considering device configurative conditions, that is, asymmetric dielectric environments and lopsided carrier distribution. We reveal that the carrier scattering from interfacial Coulomb impurities (e.g., chemical residues, gaseous adsorbates, and surface dangling bonds) is greatly intensified in extremely thinned channels, resulting from shortened interaction distance between impurities and carriers. Such a pronounced factor may surpass lattice phonons and serve as dominant scatterers. This understanding offers new insight into the thickness induced scattering intensity, highlights the critical role of surface quality in electrical transport, and would lead to rational performance improvement strategies for future atomic electronics.

Conduction tuning of graphene based on defect-induced localization

The conduction properties of graphene were tuned by tailoring the lattice by using an accelerated helium ion beam to embed low-density defects in the lattice. The density of the embedded defects was estimated to be 2-3 orders of magnitude lower than that of carbon atoms, and they functionalized a graphene sheet in a more stable manner than chemical surface modifications can do. Current modulation through back gate biasing was demonstrated at room temperature with a current on-off ratio of 2 orders of magnitude, and the activation energy of the thermally activated transport regime was evaluated. The exponential dependence of the current on the length of the functionalized region in graphene suggested that conduction tuning is possible through strong localization of carriers at sites induced by a sparsely distributed random potential modulation.

Enhanced current-rectification in bilayer graphene with an electrically tuned sloped bandgap

We propose a novel sloped dielectric geometry in graphene as a band engineering method for widening the depletion region and increasing the electrical rectification effect in graphene pn junctions. Enhanced current-rectification was achieved in a bilayer graphene with a sloped dielectric top gate and a normal back gate. A bias was applied to the top gate to induce a spatially modulated and sloped band configuration, while a back-gate bias was applied to open a bandgap. The sloped band can be tuned to separate n- and p-type regions in the bilayer graphene, depending on a suitable choice of gate voltage. The effective depletion region between the n- and p-type regions can be spatially enlarged due to the proposed top-gate structure. As a result, a strong non-linear electric current was observed during drain bias sweeping, demonstrating the expected rectification behavior with an on/off ratio higher than all previously reported values for graphene pn junctions. The observed rectification was modified to a linear current-voltage relationship by adjusting the biases of both gates to form an nn- or pp-type junction configuration. These results demonstrate that an external voltage can control the current flow in atomic film diodes.

Single-crystalline nanogap electrodes: enhancing the nanowire-breakdown process with a gaseous environment

A method for fabricating single-crystalline nanogaps on Si substrates was developed. Polycrystalline Pt nanowires on Si substrates were broken down by current flow under various gaseous environments. The crystal structure of the nanogap electrode was evaluated using scanning electron microscopy and transmission electron microscopy. Nanogap electrodes sandwiched between Pt-large-crystal-grains were obtained by the breakdown of the wire in an O(2) or H(2) atmosphere. These nanogap electrodes show intense spots in the electron diffraction pattern. The diffraction pattern corresponds to Pt (111), indicating that single-crystal grains are grown by the electrical wire breakdown process in an O(2) or H(2) atmosphere. The Pt wires that have (111)-texture and coherent boundaries can be considered ideal as interconnectors for single molecular electronics. The simple method for fabrication of a single-crystalline nanogap is one of the first steps toward standard nanogap electrodes for single molecular instruments and opens the door to future research on physical phenomena in nanospaces.

Quantitative Raman spectrum and reliable thickness identification for atomic layers on insulating substrates

We demonstrate the possibility in quantifying the Raman intensities for both specimen and substrate layers in a common stacked experimental configuration and, consequently, propose a general and rapid thickness identification technique for atomic-scale layers on dielectric substrates. Unprecedentedly wide-range Raman data for atomically flat MoS(2) flakes are collected to compare with theoretical models. We reveal that all intensity features can be accurately captured when including optical interference effect. Surprisingly, we find that even freely suspended chalcogenide few-layer flakes have a stronger Raman response than that from the bulk phase. Importantly, despite the oscillating intensity of specimen spectrum versus thickness, the substrate weighted spectral intensity becomes monotonic. Combined with its sensitivity to specimen thickness, we suggest this quantity can be used to rapidly determine the accurate thickness for atomic layers.

Hall Effect in Organic Single-crystal Field-effect Transistors

We report Hall effect of charge carriers accumulated in organic field-effect transistors. Rubrene (C42H28) single crystals are shaped in to the Hall-bar congiguration in the devices so that the Hall signal is appropriately detected in external magnetic fields. It turned out that inverse Hall coefficient, having a positive sign, is close to the amount of electric-field induced charge upon the hole accumulation. The observation of the normal Hall effect means that the electromagnetic character of the surface charge is not of hopping carriers but resembles that of a two-dimensional hole-gas system. The direct access to the density of mobile charge carriers provides a tool to understand nontrivial features of organic field-effect transistors such as gate electric field dependent mobility.

Enhanced logic performance with semiconducting bilayer graphene channels

Realization of logic circuits in graphene with an energy gap (EG) remains one of the main challenges for graphene electronics. We found that large transport EGs (>100 meV) can be fulfilled in dual-gated bilayer graphene underneath a simple alumina passivation top gate stack, which directly contacts the graphene channels without an inserted buffer layer. With the presence of EGs, the electrical properties of the graphene transistors are significantly enhanced, as manifested by enhanced on/off current ratio, subthreshold slope, and current saturation. For the first time, complementary-like semiconducting logic graphene inverters are demonstrated that show a large improvement over their metallic counterparts. This result may open the way for logic applications of gap-engineered graphene.