A compute-in-memory chip based on resistive random-access memory

Open-loop analog programmable electrochemical memory array

Emerging memories have been developed as new physical infrastructures for hosting neural networks owing to their low-power analog computing characteristics. However, accurately and efficiently programming devices in an analog-valued array is still largely limited by the intrinsic physical non-idealities of the devices, thus hampering their applications in in-situ training of neural networks. Here, we demonstrate a passive electrochemical memory (ECRAM) array with many important characteristics necessary for accurate analog programming. Different image patterns can be open-loop and serially programmed into our ECRAM array, achieving high programming accuracies without any feedback adjustments. The excellent open-loop analog programmability has led us to in-situ train a bilayer neural network and reached software-like classification accuracy of 99.4% to detect poisonous mushrooms. The training capability is further studied in simulation for large-scale neural networks such as VGG-8. Our results present a new solution for implementing learning functions in an artificial intelligence hardware using emerging memories.

Efficient combinatorial optimization by quantum-inspired parallel annealing in analogue memristor crossbar

Combinatorial optimization problems are prevalent in various fields, but obtaining exact solutions remains challenging due to the combinatorial explosion with increasing problem size. Special-purpose hardware such as Ising machines, particularly memristor-based analog Ising machines, have emerged as promising solutions. However, existing simulate-annealing-based implementations have not fully exploited the inherent parallelism and analog storage/processing features of memristor crossbar arrays. This work proposes a quantum-inspired parallel annealing method that enables full parallelism and improves solution quality, resulting in significant speed and energy improvement when implemented in analog memristor crossbars. We experimentally solved tasks, including unweighted and weighted Max-Cut and traveling salesman problem, using our integrated memristor chip. The quantum-inspired parallel annealing method implemented in memristor-based hardware has demonstrated significant improvements in time- and energy-efficiency compared to previously reported simulated annealing and Ising machine implemented on other technologies. This is because our approach effectively exploits the natural parallelism, analog conductance states, and all-to-all connection provided by memristor technology, promising its potential for solving complex optimization problems with greater efficiency.

Optoelectronic bio-synaptic plasticity on neotype kesterite memristor with switching ratio >104

Optoelectronic memristors hold the most potential for realizing next-generation neuromorphic computation; however, memristive devices that can integrate excellent resistive switching and both electrical-/light-induced bio-synaptic behaviors are still challenging to develop. In this study, an artificial optoelectronic synapse is proposed and realized using a kesterite-based memristor with Cu2ZnSn(S,Se)4 (CZTSSe) as the switching material and Mo/Ag as the back/top electrode. Benefiting from unique electrical features and a bi-layered structure of CZTSSe, the memristor exhibits highly stable nonvolatile resistive switching with excellent spatial uniformity, concentrated Set/Reset voltage distribution (variation <0.08/0.02 V), high On/Off ratio (>104), and long retention time (>104 s). A possible mechanism of the switching behavior in such a device is proposed. Furthermore, these memristors successfully achieve essential bio-synaptic functions under both electrical and various visible light (470-655 nm) stimulations, including electrical-induced excitatory postsynaptic current, paired pulse facilitation, long-term potentiation, long-term depression, spike-timing-dependent plasticity, as well as light-stimulated short-/long-term plasticity and learning-forgetting-relearning process. As such, the proposed neotype kesterite-based memristor demonstrates significant potential in facilitating artificial optoelectronic synapses and enabling neuromorphic computation.

Controllable modulation of the oxygen vacancy-induced adjustment of memristive behavior for direct differential operation with transistor-free memristor

To achieve the goal of neuromorphic computing hardware implementation with extremely high efficiency, low power consumption, and high density, it is necessary to develop transistor-free memristors and implement differential operation without subtraction circuits. In this study, argon ion irradiation was used during the fabrication process of a single crystalline LiNbO3 (LN) thin film to controllably introduce oxygen vacancies (OVs) into the bottom surface, which realized the modulation of OVs based on the excellent environment provided by a single-crystalline thin film. The memristive behavior of memristors was then modulated by regulating the distribution of OVs, and the effect of OVs distributed near the bottom surface of the single crystalline LN thin film on the memristive behavior was analyzed. In this way, two transistor-free memristors with opposite memristive behavior directions were fabricated. Two transistor-free memristors exhibit excellent synaptic plasticity and reliable multilevel resistance states. Based on two transistor-free memristors, a novel differential pair was constructed. Hardware implementations of direct differential operation without subtraction circuits were achieved. This study provides a new pathway to develop a transistor-free memristor and achieve differential operation without subtraction circuits in neuromorphic computing, which will simplify the peripheral circuits, improve integration density, and reduce power consumption and latency.

Electrochemical-Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges

Artificial neurons and synapses are considered essential for the progress of the future brain-inspired computing, based on beyond von Neumann architectures. Here, a discussion on the common electrochemical fundamentals of biological and artificial cells is provided, focusing on their similarities with the redox-based memristive devices. The driving forces behind the functionalities and the ways to control them by an electrochemical-materials approach are presented. Factors such as the chemical symmetry of the electrodes, doping of the solid electrolyte, concentration gradients, and excess surface energy are discussed as essential to understand, predict, and design artificial neurons and synapses. A variety of two- and three-terminal memristive devices and memristive architectures are presented and their application for solving various problems is shown. The work provides an overview of the current understandings on the complex processes of neural signal generation and transmission in both biological and artificial cells and presents the state-of-the-art applications, including signal transmission between biological and artificial cells. This example is showcasing the possibility for creating bioelectronic interfaces and integrating artificial circuits in biological systems. Prospectives and challenges of the modern technology toward low-power, high-information-density circuits are highlighted.

Compute in-Memory with Non-Volatile Elements for Neural Networks: A Review from a Co-Design Perspective

Deep learning has become ubiquitous, touching daily lives across the globe. Today, traditional computer architectures are stressed to their limits in efficiently executing the growing complexity of data and models. Compute-in-memory (CIM) can potentially play an important role in developing efficient hardware solutions that reduce data movement from compute-unit to memory, known as the von Neumann bottleneck. At its heart is a cross-bar architecture with nodal non-volatile-memory elements that performs an analog multiply-and-accumulate operation, enabling the matrix-vector-multiplications repeatedly used in all neural network workloads. The memory materials can significantly influence final system-level characteristics and chip performance, including speed, power, and classification accuracy. With an over-arching co-design viewpoint, this review assesses the use of cross-bar based CIM for neural networks, connecting the material properties and the associated design constraints and demands to application, architecture, and performance. Both digital and analog memory are considered, assessing the status for training and inference, and providing metrics for the collective set of properties non-volatile memory materials will need to demonstrate for a successful CIM technology.

Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators

Analog in-memory computing-a promising approach for energy-efficient acceleration of deep learning workloads-computes matrix-vector multiplications but only approximately, due to nonidealities that often are non-deterministic or nonlinear. This can adversely impact the achievable inference accuracy. Here, we develop an hardware-aware retraining approach to systematically examine the accuracy of analog in-memory computing across multiple network topologies, and investigate sensitivity and robustness to a broad set of nonidealities. By introducing a realistic crossbar model, we improve significantly on earlier retraining approaches. We show that many larger-scale deep neural networks-including convnets, recurrent networks, and transformers-can in fact be successfully retrained to show iso-accuracy with the floating point implementation. Our results further suggest that nonidealities that add noise to the inputs or outputs, not the weights, have the largest impact on accuracy, and that recurrent networks are particularly robust to all nonidealities.

A 22-pJ/spike 73-Mspikes/s 130k-compartment neural array transceiver with conductance-based synaptic and membrane dynamics

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations.

Modulating the resistive switching stability of HfO2-based RRAM through Gd doping engineering: DFT+U

Oxide-based resistive random access memory (RRAM) is standing out in both non-volatile memory and the emerging field of neuromorphic computing, with the consequence of increasing performance demands. Rare-earth doping is often used as an effective means for performance modulation. In this work, the modulation mechanism of the resistive switching (RS) behaviors in trivalent rare-earth Gd-doped HfO2-based RRAM has been carefully investigated using first-principles calculations. The results of electronic structure analysis show that Gd doping would lead to a change in the local geometry of the m-HfO2 defect system and would enhance the Coulomb interaction between the atoms around Gd and oxygen vacancy (VO), which may be one of the reasons for the enhanced conductivity of the HfO2-based RRAM after Gd doping. Thermodynamic and kinetic study results indicate that there is a strong interaction between Gd and its surrounding VO defects, and this strong interaction would not only attract more oxygen vacancies (VOs) to be generated near the dopant Gd, but also increase the migration energy barrier of the +2 charged VOs around the Gd doping site, thus suppressing the random generation of VO filaments, which leads to a better uniformity of the switching parameters during the RS process and improves the performance stability of the devices. The results of this work will provide new insights into modulating the RS behaviors and improving the device performance of HfO2-based RRAM through doping engineering.

An analog-AI chip for energy-efficient speech recognition and transcription

Models of artificial intelligence (AI) that have billions of parameters can achieve high accuracy across a range of tasks1,2, but they exacerbate the poor energy efficiency of conventional general-purpose processors, such as graphics processing units or central processing units. Analog in-memory computing (analog-AI)3-7 can provide better energy efficiency by performing matrix-vector multiplications in parallel on 'memory tiles'. However, analog-AI has yet to demonstrate software-equivalent (SWeq) accuracy on models that require many such tiles and efficient communication of neural-network activations between the tiles. Here we present an analog-AI chip that combines 35 million phase-change memory devices across 34 tiles, massively parallel inter-tile communication and analog, low-power peripheral circuitry that can achieve up to 12.4 tera-operations per second per watt (TOPS/W) chip-sustained performance. We demonstrate fully end-to-end SWeq accuracy for a small keyword-spotting network and near-SWeq accuracy on the much larger MLPerf8 recurrent neural-network transducer (RNNT), with more than 45 million weights mapped onto more than 140 million phase-change memory devices across five chips.

Bio-Inspired Design of Superconducting Spiking Neuron and Synapse

The imitative modelling of processes in the brain of living beings is an ambitious task. However, advances in the complexity of existing hardware brain models are limited by their low speed and high energy consumption. A superconducting circuit with Josephson junctions closely mimics the neuronal membrane with channels involved in the operation of the sodium-potassium pump. The dynamic processes in such a system are characterised by a duration of picoseconds and an energy level of attojoules. In this work, two superconducting models of a biological neuron are studied. New modes of their operation are identified, including the so-called bursting mode, which plays an important role in biological neural networks. The possibility of switching between different modes in situ is shown, providing the possibility of dynamic control of the system. A synaptic connection that mimics the short-term potentiation of a biological synapse is developed and demonstrated. Finally, the simplest two-neuron chain comprising the proposed bio-inspired components is simulated, and the prospects of superconducting hardware biosimilars are briefly discussed.

Preventing Vanishing Gradient Problem of Hardware Neuromorphic System by Implementing Imidazole-Based Memristive ReLU Activation Neuron

With advances in artificial intelligent services, brain-inspired neuromorphic systems with synaptic devices are recently attracting significant interest to circumvent the von Neumann bottleneck. However, the increasing trend of deep neural network parameters causes huge power consumption and large area overhead of a nonlinear neuron electronic circuit, and it incurs a vanishing gradient problem. Here, a memristor-based compact and energy-efficient neuron device is presented to implement a rectifying linear unit (ReLU) activation function. To emulate the volatile and gradual switching of the ReLU function, a copolymer memristor with a hybrid structure is proposed using a copolymer/inorganic bilayer. The functional copolymer film developed by introducing imidazole functional groups enables the formation of nanocluster-type pseudo-conductive filaments by boosting the nucleation of Cu nanoclusters, causing gradual switching. The ReLU neuron device is successfully demonstrated by integrating the memristor with amorphous InGaZnO thin-film transistors, and achieves 0.5 pJ of energy consumption based on sub-10 µA operation current and high-speed switching of 650 ns. Furthermore, device-to-system-level simulation using neuron devices on the MNIST dataset demonstrates that the vanishing gradient problem is effectively resolved by five-layer deep neural networks. The proposed neuron device will enable the implementation of high-density and energy-efficient hardware neuromorphic systems.

Nanograin network memory with reconfigurable percolation paths for synaptic interactions

The development of memory devices with functions that simultaneously process and store data is required for efficient computation. To achieve this, artificial synaptic devices have been proposed because they can construct hybrid networks with biological neurons and perform neuromorphic computation. However, irreversible aging of these electrical devices causes unavoidable performance degradation. Although several photonic approaches to controlling currents have been suggested, suppression of current levels and switching of analog conductance in a simple photonic manner remain challenging. Here, we demonstrated a nanograin network memory using reconfigurable percolation paths in a single Si nanowire with solid core/porous shell and pure solid core segments. The electrical and photonic control of current percolation paths enabled the analog and reversible adjustment of the persistent current level, exhibiting memory behavior and current suppression in this single nanowire device. In addition, the synaptic behaviors of memory and erasure were demonstrated through potentiation and habituation processes. Photonic habituation was achieved using laser illumination on the porous nanowire shell, with a linear decrease in the postsynaptic current. Furthermore, synaptic elimination was emulated using two adjacent devices interconnected on a single nanowire. Therefore, electrical and photonic reconfiguration of the conductive paths in Si nanograin networks will pave the way for next-generation nanodevice technologies.

Energy-efficient high-fidelity image reconstruction with memristor arrays for medical diagnosis

Medical imaging is an important tool for accurate medical diagnosis, while state-of-the-art image reconstruction algorithms raise critical challenges in massive data processing for high-speed and high-quality imaging. Here, we present a memristive image reconstructor (MIR) to greatly accelerate image reconstruction with discrete Fourier transformation (DFT) by computing-in-memory (CIM) with memristor arrays. A high-accuracy quasi-analogue mapping (QAM) method and generic complex matrix transfer (CMT) scheme was proposed to improve the mapping precision and transfer efficiency, respectively. High-fidelity magnetic resonance imaging (MRI) and computed tomography (CT) image reconstructions were demonstrated, achieving software-equivalent qualities and DICE scores after segmentation with nnU-Net algorithm. Remarkably, our MIR exhibited 153× and 79× improvements in energy efficiency and normalized image reconstruction speed, respectively, compared to graphics processing unit (GPU). This work demonstrates MIR as a promising high-fidelity image reconstruction platform for future medical diagnosis, and also largely extends the application of memristor-based CIM beyond artificial neural networks.

Recent progress in bio-voltage memristors working with ultralow voltage of biological amplitude

Neuromorphic systems built from memristors that emulate bioelectrical information processing in the brain may overcome the limitations of traditional computing architectures. However, functional emulation alone may still not attain all the merits of bio-computation, which uses action potentials of 50-120 mV at least 10 times lower than signal amplitude in conventional electronics to achieve extraordinary power efficiency and effective functional integration. Reducing the functional voltage in memristors to this biological amplitude can thus advance neuromorphic engineering and bio-emulated integration. This review aims to provide a timely update on the effort and progress in this burgeoning research direction, covering the aspects of device material composition, performance, working mechanism, and potential application.

Resistive random access memory: introduction to device mechanism, materials and application to neuromorphic computing

The modern-day computing technologies are continuously undergoing a rapid changing landscape; thus, the demands of new memory types are growing that will be fast, energy efficient and durable. The limited scaling capabilities of the conventional memory technologies are pushing the limits of data-intense applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Resistive random access memory (RRAM) is one of the most suitable emerging memory technologies candidates that have demonstrated potential to replace state-of-the-art integrated electronic devices for advanced computing and digital and analog circuit applications including neuromorphic networks. RRAM has grown in prominence in the recent years due to its simple structure, long retention, high operating speed, ultra-low-power operation capabilities, ability to scale to lower dimensions without affecting the device performance and the possibility of three-dimensional integration for high-density applications. Over the past few years, research has shown RRAM as one of the most suitable candidates for designing efficient, intelligent and secure computing system in the post-CMOS era. In this manuscript, the journey and the device engineering of RRAM with a special focus on the resistive switching mechanism are detailed. This review also focuses on the RRAM based on two-dimensional (2D) materials, as 2D materials offer unique electrical, chemical, mechanical and physical properties owing to their ultrathin, flexible and multilayer structure. Finally, the applications of RRAM in the field of neuromorphic computing are presented.

Photonic online learning: a perspective

Emerging neuromorphic hardware promises to solve certain problems faster and with higher energy efficiency than traditional computing by using physical processes that take place at the device level as the computational primitives in neural networks. While initial results in photonic neuromorphic hardware are very promising, such hardware requires programming or "training" that is often power-hungry and time-consuming. In this article, we examine the online learning paradigm, where the machinery for training is built deeply into the hardware itself. We argue that some form of online learning will be necessary if photonic neuromorphic hardware is to achieve its true potential.

Thousands of conductance levels in memristors integrated on CMOS

Neural networks based on memristive devices^1-3 have the ability to improve throughput and energy efficiency for machine learning^4,5 and artificial intelligence⁶, especially in edge applications^7-21. Because training a neural network model from scratch is costly in terms of hardware resources, time and energy, it is impractical to do it individually on billions of memristive neural networks distributed at the edge. A practical approach would be to download the synaptic weights obtained from the cloud training and program them directly into memristors for the commercialization of edge applications. Some post-tuning in memristor conductance could be done afterwards or during applications to adapt to specific situations. Therefore, in neural network applications, memristors require high-precision programmability to guarantee uniform and accurate performance across a large number of memristive networks^22-28. This requires many distinguishable conductance levels on each memristive device, not only laboratory-made devices but also devices fabricated in factories. Analog memristors with many conductance states also benefit other applications, such as neural network training, scientific computing and even 'mortal computing'^25,29,30. Here we report 2,048 conductance levels achieved with memristors in fully integrated chips with 256 × 256 memristor arrays monolithically integrated on complementary metal-oxide-semiconductor (CMOS) circuits in a commercial foundry. We have identified the underlying physics that previously limited the number of conductance levels that could be achieved in memristors and developed electrical operation protocols to avoid such limitations. These results provide insights into the fundamental understanding of the microscopic picture of memristive switching as well as approaches to enable high-precision memristors for various applications. Fig. 1 HIGH-PRECISION MEMRISTOR FOR NEUROMORPHIC COMPUTING.: a, Proposed scheme of the large-scale application of memristive neural networks for edge computing. Neural network training is performed in the cloud. The obtained weights are downloaded and accurately programmed into a massive number of memristor arrays distributed at the edge, which imposes high-precision requirements on memristive devices. b, An eight-inch wafer with memristors fabricated by a commercial semiconductor manufacturer. c, High-resolution transmission electron microscopy image of the cross-section view of a memristor. Pt and Ta serve as the bottom electrode (BE) and top electrode (TE), respectively. Scale bars, 1 μm and 100 nm (inset). d, Magnification of the memristor material stack. Scale bar, 5 nm. e, As-programmed (blue) and after-denoising (red) currents of a memristor are read by a constant voltage (0.2 V). The denoising process eliminated the large-amplitude RTN observed in the as-programmed state (see Methods). f, Magnification of three nearest-neighbour states after denoising. The current of each state was read by a constant voltage (0.2 V). No large-amplitude RTN was observed, and all of the states can be clearly distinguished. g, An individual memristor on the chip was tuned into 2,048 resistance levels by high-resolution off-chip driving circuitry, and each resistance level was read by a d.c. voltage sweeping from 0 to 0.2 V. The target resistance was set from 50 µS to 4,144 µS with a 2-µS interval between neighbouring levels. All readings at 0.2 V are less than 1 µS from the target conductance. Bottom inset, magnification of the resistance levels. Top inset, experimental results of an entire 256 × 256 array programmed by its 6-bit on-chip circuitry into 64 32 × 32 blocks, and each block is programmed into one of the 64 conductance levels. Each of the 256 × 256 memristors has been previously switched over one million cycles, demonstrating the high endurance and robustness of the devices.

Ferroelectric Content-Addressable Memory Cells with IGZO Channel: Impact of Retention Degradation on the Multibit Operation

Indium gallium zinc oxide (IGZO)-based ferroelectric thin-film transistors (FeTFTs) are being vigorously investigated for being deployed in computing-in-memory (CIM) applications. Content-addressable memories (CAMs) are the quintessential example of CIM, which conduct a parallel search over a queue or stack to obtain the matched entries for a given input data. CAM cells offer the ability for massively parallel searches in a single clock cycle throughout an entire CAM array for the input query, thereby enabling pattern matching and searching functionality. Therefore, CAM cells are used extensively for pattern matching or search operations in data-centric computing. This paper investigates the impact of retention degradation on IGZO-based FeTFT on the multibit operation in content CAM cell applications. We propose a scalable multibit 1FeTFT-1T-based CAM cell composed of only one FeTFT and one transistor, thus significantly improving the density and energy efficiency compared with conventional complementary metal-oxide-semiconductor (CMOS)-based CAM. We successfully demonstrate the operations of our proposed CAM with storage and search by exploiting the multilevel states of the experimentally calibrated IGZO-based FeTFT devices. We also investigate the impact of retention degradation on the search operation. Our proposed IGZO-based 3-bit and 2-bit CAM cell shows 10⁴ s and 10⁶ s retention, respectively. The single-bit CAM cell shows lifelong (10 years) retention.

A review of memristor: material and structure design, device performance, applications and prospects

With the booming growth of artificial intelligence (AI), the traditional von Neumann computing architecture based on complementary metal oxide semiconductor devices are facing memory wall and power wall. Memristor based in-memory computing can potentially overcome the current bottleneck of computer and achieve hardware breakthrough. In this review, the recent progress of memory devices in material and structure design, device performance and applications are summarized. Various resistive switching materials, including electrodes, binary oxides, perovskites, organics, and two-dimensional materials, are presented and their role in the memristor are discussed. Subsequently, the construction of shaped electrodes, the design of functional layer and other factors influencing the device performance are analyzed. We focus on the modulation of the resistances and the effective methods to enhance the performance. Furthermore, synaptic plasticity, optical-electrical properties, the fashionable applications in logic operation and analog calculation are introduced. Finally, some critical issues such as the resistive switching mechanism, multi-sensory fusion, system-level optimization are discussed.

SET Kinetics of Ag/HfO2-Based Diffusive Memristors under Various Counter-Electrode Materials

The counter-electrode (CE) material in electrochemical metallization memory (ECM) cells plays a crucial role in the switching process by affecting the reactions at the CE/electrolyte interface. This is due to the different electrocatalytic activity of the CE material towards reduction-oxidation reactions, which determines the metal ion concentration in the electrolyte and ultimately impacts the switching kinetics. In this study, the focus is laid on Pt, TiN, and W, which are relevant in standard chip technology. For these, the influence of CE metal on the switching kinetics of Ag/HfO₂-based volatile ECM cells is investigated. Rectangular voltage pulses of different amplitudes were applied, and the SET times were analyzed from the transient curves. The results show that CE material has a significant effect on the SET kinetics, with differences being observed depending on the voltage regime. The formation of interfacial oxides at the CE/electrolyte interface, particularly for non-noble metals, is also discussed in relation to the findings. Overall, this work highlights the important role of the CE material in the switching process of Ag/HfO₂-based diffusive memristors and the importance of considering interfacial oxide formation in the design of these devices.

Emerging memristive neurons for neuromorphic computing and sensing

Inspired by the principles of the biological nervous system, neuromorphic engineering has brought a promising alternative approach to intelligence computing with high energy efficiency and low consumption. As pivotal components of neuromorphic system, artificial spiking neurons are powerful information processing units and can achieve highly complex nonlinear computations. By leveraging the switching dynamic characteristics of memristive device, memristive neurons show rich spiking behaviors with simple circuit. This report reviews the memristive neurons and their applications in neuromorphic sensing and computing systems. The switching mechanisms that endow memristive devices with rich dynamics and nonlinearity are highlighted, and subsequently various nonlinear spiking neuron behaviors emulated in these memristive devices are reviewed. Then, recent development is introduced on neuromorphic system with memristive neurons for sensing and computing. Finally, we discuss challenges and outlooks of the memristive neurons toward high-performance neuromorphic hardware systems and provide an insightful perspective for the development of interactive neuromorphic electronic systems.

Non-Volatile Memory and Synaptic Characteristics of TiN/CeOx/Pt RRAM Devices

In this study, we investigate the synaptic characteristics and the non-volatile memory characteristics of TiN/CeOx/Pt RRAM devices for a neuromorphic system. The thickness and chemical properties of the CeOx are confirmed through TEM, EDS, and XPS analysis. A lot of oxygen vacancies (ions) in CeOx film enhance resistive switching. The stable bipolar resistive switching characteristics, endurance cycling (>100 cycles), and non-volatile properties in the retention test (>10,000 s) are assessed through DC sweep. The filamentary switching model and Schottky emission-based conduction model are presented for TiN/CeOx/Pt RRAM devices in the LRS and HRS. The compliance current (1~5 mA) and reset stop voltage (−1.3~−2.2 V) are used in the set and reset processes, respectively, to implement multi-level cell (MLC) in DC sweep mode. Based on neural activity, a neuromorphic system is performed by electrical stimulation. Accordingly, the pulse responses achieve longer endurance cycling (>10,000 cycles), MLC (potentiation and depression), spike-timing dependent plasticity (STDP), and excitatory postsynaptic current (EPSC) to mimic synapse using TiN/CeOx/Pt RRAM devices.

Metal-Organic Frameworks-Based Memristors: Materials, Devices, and Applications

Facing the explosive growth of data, a number of new micro-nano devices with simple structure, low power consumption, and size scalability have emerged in recent years, such as neuromorphic computing based on memristor. The selection of resistive switching layer materials is extremely important for fabricating of high performance memristors. As an organic-inorganic hybrid material, metal-organic frameworks (MOFs) have the advantages of both inorganic and organic materials, which makes the memristors using it as a resistive switching layer show the characteristics of fast erasing speed, outstanding cycling stability, conspicuous mechanical flexibility, good biocompatibility, etc. Herein, the recent advances of MOFs-based memristors in materials, devices, and applications are summarized, especially the potential applications of MOFs-based memristors in data storage and neuromorphic computing. There also are discussions and analyses of the challenges of the current research to provide valuable insights for the development of MOFs-based memristors.

Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications

This article reports an improvement in the performance of the hafnium oxide-based (HfO₂) ferroelectric field-effect transistors (FeFET) achieved by a synergistic approach of interfacial layer (IL) engineering and READ-voltage optimization. FeFET devices with silicon dioxide (SiO₂) and silicon oxynitride (SiON) as IL were fabricated and characterized. Although the FeFETs with SiO₂ interfaces demonstrated better low-frequency characteristics compared to the FeFETs with SiON interfaces, the latter demonstrated better WRITE endurance and retention. Finally, the neuromorphic simulation was conducted to evaluate the performance of FeFETs with SiO₂ and SiON IL as synaptic devices. We observed that the WRITE endurance in both types of FeFETs was insufficient to carry out online neural network training. Therefore, we consider an inference-only operation with offline neural network training. The system-level simulation reveals that the impact of systematic degradation via retention degradation is much more significant for inference-only operation than low-frequency noise. The neural network with FeFETs based on SiON IL in the synaptic core shows 96% accuracy for the inference operation on the handwritten digit from the Modified National Institute of Standards and Technology (MNIST) data set in the presence of flicker noise and retention degradation, which is only a 2.5% deviation from the software baseline.