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Park H, Han JK, Yim S, Shin DH, Park TW, Woo KS, Lee SH, Cho JM, Kim HW, Park T, Hwang CS. An Analysis of Components and Enhancement Strategies for Advancing Memristive Neural Networks. ADVANCED MATERIALS (DEERFIELD BEACH, FLA.) 2025; 37:e2412549. [PMID: 39801198 DOI: 10.1002/adma.202412549] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 08/23/2024] [Revised: 12/26/2024] [Indexed: 02/26/2025]
Abstract
Advancements in artificial intelligence (AI) and big data have highlighted the limitations of traditional von Neumann architectures, such as excessive power consumption and limited performance improvement with increasing parameter numbers. These challenges are significant for edge devices requiring higher energy and area efficiency. Recently, many reports on memristor-based neural networks (Mem-NN) using resistive switching memory have shown efficient computing performance with a low power requirement. Even further performance optimization can be made using engineering resistive switching mechanisms. Nevertheless, systematic reviews that address the circuit-to-material aspects of Mem-NNs, including their dedicated algorithms, remain limited. This review first categorizes the memristor-based neural networks into three components: pre-processing units, processing units, and learning algorithms. Then, the optimization methods to improve integration and operational reliability are discussed across materials, devices, circuits, and algorithms for each component. Furthermore, the review compares recent advancements in chip-level neuromorphic hardware with conventional systems, including graphic processing units. The ongoing challenges and future directions in the field are discussed, highlighting the research to enhance the functionality and reliability of Mem-NNs.
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Affiliation(s)
- Hyungjun Park
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Joon-Kyu Han
- System Semiconductor Engineering and Department of Electronic Engineering, Sogang University, 35 Baekbeom-ro, Mapo-gu, Seoul, 04107, Republic of Korea
| | - Seongpil Yim
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Dong Hoon Shin
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Tae Won Park
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Kyung Seok Woo
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Soo Hyung Lee
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Jae Min Cho
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Hyun Wook Kim
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Taegyun Park
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
| | - Cheol Seong Hwang
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul, 08826, Republic of Korea
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