Steep-Slope Gate-Connected Atomic Threshold Switching Field-Effect Transistor with MoS2 Channel and Its Application to Infrared Detectable Phototransistors

Ultralow-Power Circuit and Sensing Applications Based on Subthermionic Threshold Switching Transistors

The most recent breakthrough in state-of-the-art electronics and optoelectronics involves the adoption of steep-slope field-effect transistors (FETs), promoting sub-60 mV/dec subthreshold swing (SS) at ambient temperature, effectively overcoming "Boltzmann limit" to minimize power consumption. Here, a series integration of nanoscale copper-based resistive-filamentary threshold switch (TS) with the IGZO channel-based FET is used to develop a TS-FET, in which the turn-on characteristics exhibit an abrupt transition over five decades, with an extremely low SS of 7 mV/dec, a high on/off ratio (>109), and ultralow leakage current (40-fold decrease), ensuring excellent repeatability and device yield. Unlike previous device-centric studies, this work highlights potential circuit applications (logic-inverter, pulse-sensor amplification, and photodetector) based on TS-FET. The sharp transition behavior of TS-FET enables the establishment of logic inverters with a high voltage gain of ≈800, with a circuit-level demonstration achieving a bias-independent record-high intrinsic gain (>1000). A wearable pulse sensor integrated with an amplifier circuit ensured the precise amplification of electrophysical signals by 450 times. In addition, the application of a TS-FET-based photodetector features high responsivity (1.08 × 104 mA/W) and detectivity (1.03 × 1020 Jones). The low-power strategy of TS-FETs is promising for the development of energy-efficient integrated circuits alongside sensor-interconnected biomedical applications in wearable technology.

Sub-Boltzmann Switching, Hysteresis-Free Charge Modulated Negative Differential Resistance FinFET

The ever-increasing power consumption in integrated circuits has raised concerns about the relentless doubling of transistor density in chips and cost drop per combinational/sequential circuits. To address the physical limit of thermionic emission carrier transport (i.e., subthreshold swing >60 mV/decade at 300 K), alternative charge-transport mechanisms or the implementation of functional substances have been attempted but without appreciable success. One such choice is to take advantage of negative differential resistance with the activation of localized electrons or migration of atom and oxygen vacancies to extend the capabilities of Si-transistors. However, inconsistency in current during forward/reverse bias sweep is confronted as a notable weak point. This work proposes an eye-catching solution to modulating potential distribution between a resistance switching layer and a transistor by employing charge trapping within a hafnium zirconium oxide layer. This approach introduces features advancing the potential of "More Moore" technologies.

Thermally Oxidized Memristor and 1T1R Integration for Selector Function and Low-Power Memory

Resistive switching memories have garnered significant attention due to their high-density integration and rapid in-memory computing beyond von Neumann's architecture. However, significant challenges are posed in practical applications with respect to their manufacturing process complexity, a leakage current of high resistance state (HRS), and the sneak-path current problem that limits their scalability. Here, a mild-temperature thermal oxidation technique for the fabrication of low-power and ultra-steep memristor based on Ag/TiOx/SnOx/SnSe2/Au architecture is developed. Benefiting from a self-assembled oxidation layer and the formation/rupture of oxygen vacancy conductive filaments, the device exhibits an exceptional threshold switching behavior with high switch ratio exceeding 106, low threshold voltage of ≈1 V, long-term retention of >104 s, an ultra-small subthreshold swing of 2.5 mV decade-1 and high air-stability surpassing 4 months. By decreasing temperature, the device undergoes a transition from unipolar volatile to bipolar nonvolatile characteristics, elucidating the role of oxygen vacancies migration on the resistive switching process. Further, the 1T1R structure is established between a memristor and a 2H-MoTe2 transistor by the van der Waals (vdW) stacking approach, achieving the functionality of selector and multi-value memory with lower power consumption. This work provides a mild-thermal oxidation technology for the low-cost production of high-performance memristors toward future in-memory computing applications.

Performance Limits and Advancements in Single 2D Transition Metal Dichalcogenide Transistor

Two-dimensional (2D) transition metal dichalcogenides (TMDs) allow for atomic-scale manipulation, challenging the conventional limitations of semiconductor materials. This capability may overcome the short-channel effect, sparking significant advancements in electronic devices that utilize 2D TMDs. Exploring the dimension and performance limits of transistors based on 2D TMDs has gained substantial importance. This review provides a comprehensive investigation into these limits of the single 2D-TMD transistor. It delves into the impacts of miniaturization, including the reduction of channel length, gate length, source/drain contact length, and dielectric thickness on transistor operation and performance. In addition, this review provides a detailed analysis of performance parameters such as source/drain contact resistance, subthreshold swing, hysteresis loop, carrier mobility, on/off ratio, and the development of p-type and single logic transistors. This review details the two logical expressions of the single 2D-TMD logic transistor, including current and voltage. It also emphasizes the role of 2D TMD-based transistors as memory devices, focusing on enhancing memory operation speed, endurance, data retention, and extinction ratio, as well as reducing energy consumption in memory devices functioning as artificial synapses. This review demonstrates the two calculating methods for dynamic energy consumption of 2D synaptic devices. This review not only summarizes the current state of the art in this field but also highlights potential future research directions and applications. It underscores the anticipated challenges, opportunities, and potential solutions in navigating the dimension and performance boundaries of 2D transistors.

All-2D-Materials Subthreshold-Free Field-Effect Transistor with Near-Ideal Switching Slope

The Boltzmann Tyranny, set by thermionic statistics, dictates the lower limit of switching slope (SS) of a MOSFET to be 60 mV/dec, the fundamental barrier for low-dissipative electronics. The large SS leads to nonscalable voltage, significant leakage, and power consumption, particularly at short channels, making transistor scaling an intimidating challenge. In recent decades, an array of steep-slope transistors has been proposed; none is close to an ideal switch with ultimately abrupt switching (SS ∼ 0 mV/dec) between the binary logic states. We demonstrated an all-2D-materials van-der-Waals-heterostructure (vdW)-based FET that exhibits ultrasteep switching (0.33 mV/dec), a large on/off current ratio (∼107), and an ultralow off current (∼0.1 pA). The "Subthreshold-Free" operation achieved by the collective behavior of functional materials enables FET switching directly from the OFF-state to the ON-state with entirely eliminated subthreshold region, behaving as the ideal logic switch. Two-inch wafer-scale device fabrication is demonstrated. Boosted by device innovation and emerging materials, the research presents an advancement in achieving the "beyond-Boltzmann" transistors, overcoming one of the CMOS electronics' most infamous technology barriers that have plagued the research community for decades.

Steep-slope vertical-transport transistors built from sub-5 nm Thin van der Waals heterostructures

Two-dimensional (2D) semiconductor-based vertical-transport field-effect transistors (VTFETs) - in which the current flows perpendicularly to the substrate surface direction - are in the drive to surmount the stringent downscaling constraints faced by the conventional planar FETs. However, low-power device operation with a sub-60 mV/dec subthreshold swing (SS) at room temperature along with an ultra-scaled channel length remains challenging for 2D semiconductor-based VTFETs. Here, we report steep-slope VTFETs that combine a gate-controllable van der Waals heterojunction and a metal-filamentary threshold switch (TS), featuring a vertical transport channel thinner than 5 nm and sub-thermionic turn-on characteristics. The integrated TS-VTFETs were realised with efficient current switching behaviours, exhibiting a current modulation ratio exceeding 1 × 108 and an average sub-60 mV/dec SS over 6 decades of drain current. The proposed TS-VTFETs with excellent area- and energy-efficiency could help to tackle the performance degradation-device downscaling dilemma faced by logic transistor technologies.

PZT-Enabled MoS2 Floating Gate Transistors: Overcoming Boltzmann Tyranny and Achieving Ultralow Energy Consumption for High-Accuracy Neuromorphic Computing

Low-power electronic devices play a pivotal role in the burgeoning artificial intelligence era. The study of such devices encompasses low-subthreshold swing (SS) transistors and neuromorphic devices. However, conventional field-effect transistors (FETs) face the inherent limitation of the "Boltzmann tyranny", which restricts SS to 60 mV decade-1 at room temperature. Additionally, FET-based neuromorphic devices lack sufficient conductance states for highly accurate neuromorphic computing due to a narrow memory window. In this study, we propose a pioneering PZT-enabled MoS2 floating gate transistor (PFGT) configuration, demonstrating a low SS of 46 mV decade-1 and a wide memory window of 7.2 V in the dual-sweeping gate voltage range from -7 to 7 V. The wide memory window provides 112 distinct conductance states for PFGT. Moreover, the PFGT-based artificial neural network achieves an outstanding facial-recognition accuracy of 97.3%. This study lays the groundwork for the development of low-SS transistors and highly energy efficient artificial synapses utilizing two-dimensional materials.

A steep-switching impact ionization-based threshold switching field-effect transistor

A steep switching device with a low subthreshold swing (SS) that overcomes the fundamental Boltzmann limit (kT/q) is required to efficiently process a continuously increasing amount of data. Recently, two-dimensional material-based impact ionization transistors with various structures have been reported with the advantages of a low critical electric field and a unique quantum confinement effect. However, most of them cannot retain steep switching at room temperature, and device performance degradation issues caused by impact ionization-induced hot carriers have not been structurally addressed. In this study, we presented an impact-ionization-based threshold switching field-effect transistor (I²S-FET) fabricated with a serial connection of a MoS₂ FET and WSe₂ impact ionization-based threshold switch (I²S). We obtained repetitive operation with low SS (32.8 mV dec^-1) at room temperature, along with low dielectric injection efficiency (10^-6), through a structural design with separation of the conducting region, which determines on-state carrier transport, and the steep-switching region where the transition from off- to on-state occurs via impact ionization. Furthermore, compared to previously reported threshold-switching devices, our device demonstrated hysteresis-free switching characteristics. This study provides a promising approach for developing next-generation energy-efficient electronic devices and ultralow-power applications.

Steep-slope transistors enabled with 2D quantum coupling stacks

As down scaling of transistors continues, there is a growing interest in developing steep-slope transistors with reduced subthreshold slope (SS) below the Boltzmann limit. In this work, we successfully fabricated steep-slope MoS₂transistors by incorporating a graphene layer, inserted in the gate stack. For our comprehensive study, we have applied density functional theory to simulate and calculate the change of SS effected by different 2D quantum materials, including graphene, germanene and 2D topological insulators, inserted within the gate dielectric. This theoretical study showed that graphene/MoS₂devices had steep SS (27.2 mV/decade), validating our experimental approach (49.2 mV/decade). Furthermore, the simulations demonstrated very steep SS (8.6 mV/decade) in WTe₂/MoS₂devices. We conclude that appropriate combination of various 2D quantum materials for the gate-channel stacks, leads to steep SS and is an effective method to extend the scaling of transistors with exceptional performance.

Highly Tunable, Broadband, and Negative Photoresponse MoS2 Photodetector Driven by Ion-Gel Gate Dielectrics

Revealing the light-matter interaction of molybdenum disulfide (MoS₂) and further improving its tunability facilitate the construction of highly integrated optoelectronics in communication and wearable healthcare, but it still remains a significant challenge. Herein, polyvinylidene fluoride and 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide (PVDF-EMIM-TFSI) ion-gel are employed to replace the oxide to fabricate a MoS₂-based phototransistor. The high capacitance enables a large tunability of the carrier concentration that results in ambipolar transport of MoS₂. It is found that the photoelectrical effect of the MoS₂ ion-gel phototransistor can be greatly tuned by the gate voltage including its photoresponsivity, detectivity, and response wavelength. An abnormal negative photoelectrical effect in both the electron branch and the hole branch is observed which is due to the adsorption/desorption of the C₂F₆NO₄S₂^- ion. By tuning the carrier concentration, the photoresponse can be extended from the visible region to the short infrared region. At 1200 nm, the photoresponse and detectivity can be tuned as large as 0.90 A/W and 1.88 × 10¹¹ Jones, respectively. Ultimately, by combining the tunability of gate voltage and wavelength, it is demonstrated that the photoelectrical effect is dominated by the photogating effect in the hole carrier, while it is coregulated by a photogating and photothermal effect in electron carrier. This study provides new insights for developing a highly tunable broadband photodetector with low consumption.

Ultra-Steep-Slope High-Gain MoS2 Transistors with Atomic Threshold-Switching Gate

The fundamental Boltzmann limitation dictates the ultimate limit of subthreshold swing (SS) to be 60 mV dec-1 , which prevents the continued scaling of supply voltage. With atomically thin body, 2D semiconductors provide new possibilities for advanced low-power electronics. Herein, ultra-steep-slope MoS2 resistive-gate field-effect transistors (RG-FETs) by integrating atomic-scale-resistive filamentary with conventional MoS2 transistors, demonstrating an ultra-low SS below 1 mV dec-1 at room temperature are reported. The abrupt resistance transition of the nanoscale-resistive filamentary ensures dramatic change in gate potential, and switches the device on and off, leading to ultra-steep SS. Simultaneously, RG-FETs demonstrate a high on/off ratio of 2.76 × 107 with superior reproducibility and reliability. With the ultra-steep SS, the RG-FETs can be readily employed to construct logic inverter with an ultra-high gain ≈2000, indicating exciting potential for future low-power electronics and monolithic integration.