Analog VLSI neuromorphic image acquisition and pre-processing systems

Recent progress in three-terminal artificial synapses based on 2D materials: from mechanisms to applications

Synapses are essential for the transmission of neural signals. Synaptic plasticity allows for changes in synaptic strength, enabling the brain to learn from experience. With the rapid development of neuromorphic electronics, tremendous efforts have been devoted to designing and fabricating electronic devices that can mimic synapse operating modes. This growing interest in the field will provide unprecedented opportunities for new hardware architectures for artificial intelligence. In this review, we focus on research of three-terminal artificial synapses based on two-dimensional (2D) materials regulated by electrical, optical and mechanical stimulation. In addition, we systematically summarize artificial synapse applications in various sensory systems, including bioplastic bionics, logical transformation, associative learning, image recognition, and multimodal pattern recognition. Finally, the current challenges and future perspectives involving integration, power consumption and functionality are outlined.

Novel charm of 2D materials engineering in memristor: when electronics encounter layered morphology

The family of two-dimensional (2D) materials composed of atomically thin layers connected via van der Waals interactions has attracted much curiosity due to a variety of intriguing physical, optical, and electrical characteristics. The significance of analyzing statistics on electrical devices and circuits based on 2D materials is seldom underestimated. Certain requirements must be met to deliver scientific knowledge that is beneficial in the field of 2D electronics: synthesis and fabrication must occur at the wafer level, variations in morphology and lattice alterations must be visible and statistically verified, and device dimensions must be appropriate. The authors discussed the most recent significant concerns of 2D materials in the provided prose and attempted to highlight the prerequisites for synthesis, yield, and mechanism behind device-to-device variability, reliability, and durability benchmarking under memristors characteristics; they also indexed some useful approaches that have already been reported to be advantageous in large-scale production. Commercial applications, on the other hand, will necessitate further effort.

A Ferrite Synaptic Transistor with Topotactic Transformation

Hardware implementation of artificial synaptic devices that emulate the functions of biological synapses is inspired by the biological neuromorphic system and has drawn considerable interest. Here, a three-terminal ferrite synaptic device based on a topotactic phase transition between crystalline phases is presented. The electrolyte-gating-controlled topotactic phase transformation between brownmillerite SrFeO_2.5 and perovskite SrFeO_{3- δ} is confirmed from the examination of the crystal and electronic structure. A synaptic transistor with electrolyte-gated ferrite films by harnessing gate-controllable multilevel conduction states, which originate from many distinct oxygen-deficient perovskite structures of SrFeO_x induced by topotactic phase transformation, is successfully constructed. This three-terminal artificial synapse can mimic important synaptic functions, such as synaptic plasticity and spike-timing-dependent plasticity. Simulations of a neural network consisting of ferrite synaptic transistors indicate that the system offers high classification accuracy. These results provide insight into the potential application of advanced topotactic phase transformation materials for designing artificial synapses with high performance.

Memory-Efficient Synaptic Connectivity for Spike-Timing- Dependent Plasticity

Spike-Timing-Dependent Plasticity (STDP) is a bio-inspired local incremental weight update rule commonly used for online learning in spike-based neuromorphic systems. In STDP, the intensity of long-term potentiation and depression in synaptic efficacy (weight) between neurons is expressed as a function of the relative timing between pre- and post-synaptic action potentials (spikes), while the polarity of change is dependent on the order (causality) of the spikes. Online STDP weight updates for causal and acausal relative spike times are activated at the onset of post- and pre-synaptic spike events, respectively, implying access to synaptic connectivity both in forward (pre-to-post) and reverse (post-to-pre) directions. Here we study the impact of different arrangements of synaptic connectivity tables on weight storage and STDP updates for large-scale neuromorphic systems. We analyze the memory efficiency for varying degrees of density in synaptic connectivity, ranging from crossbar arrays for full connectivity to pointer-based lookup for sparse connectivity. The study includes comparison of storage and access costs and efficiencies for each memory arrangement, along with a trade-off analysis of the benefits of each data structure depending on application requirements and budget. Finally, we present an alternative formulation of STDP via a delayed causal update mechanism that permits efficient weight access, requiring no more than forward connectivity lookup. We show functional equivalence of the delayed causal updates to the original STDP formulation, with substantial savings in storage and access costs and efficiencies for networks with sparse synaptic connectivity as typically encountered in large-scale models in computational neuroscience.

A generalized analog implementation of piecewise linear neuron models using CCII building blocks

This paper presents a set of reconfigurable analog implementations of piecewise linear spiking neuron models using second generation current conveyor (CCII) building blocks. With the same topology and circuit elements, without W/L modification which is impossible after circuit fabrication, these circuits can produce different behaviors, similar to the biological neurons, both for a single neuron as well as a network of neurons just by tuning reference current and voltage sources. The models are investigated, in terms of analog implementation feasibility and costs, targeting large scale hardware implementations. Results show that, in order to gain the best performance, area and accuracy; these models can be compromised. Simulation results are presented for different neuron behaviors with CMOS 350 nm technology.

Design of silicon brains in the nano-CMOS era: spiking neurons, learning synapses and neural architecture optimization

We present a design framework for neuromorphic architectures in the nano-CMOS era. Our approach to the design of spiking neurons and STDP learning circuits relies on parallel computational structures where neurons are abstracted as digital arithmetic logic units and communication processors. Using this approach, we have developed arrays of silicon neurons that scale to millions of neurons in a single state-of-the-art Field Programmable Gate Array (FPGA). We demonstrate the validity of the design methodology through the implementation of cortical development in a circuit of spiking neurons, STDP synapses, and neural architecture optimization.

Neuromorphic systems: past, present and future

Neuromorphic systems are implementations in silicon of elements of neural systems. The idea of electronic implementation is not new, but modern microelectronics has provided opportunities for producing systems for both sensing and neural modelling that can be mass produced straightforwardly. We review the the history of neuromorphic systems, and discuss the range of neuromorphic systems that have been developed. We discuss recent ideas for overcoming some of the problems, particularly providing effective adaptive synapses in large numbers.