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McAlpine D, de Hoz L. Listening loops and the adapting auditory brain. Front Neurosci 2023; 17:1081295. [PMID: 37008228 PMCID: PMC10060829 DOI: 10.3389/fnins.2023.1081295] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 10/27/2022] [Accepted: 02/17/2023] [Indexed: 03/18/2023] Open
Abstract
Analysing complex auditory scenes depends in part on learning the long-term statistical structure of sounds comprising those scenes. One way in which the listening brain achieves this is by analysing the statistical structure of acoustic environments over multiple time courses and separating background from foreground sounds. A critical component of this statistical learning in the auditory brain is the interplay between feedforward and feedback pathways—“listening loops”—connecting the inner ear to higher cortical regions and back. These loops are likely important in setting and adjusting the different cadences over which learned listening occurs through adaptive processes that tailor neural responses to sound environments that unfold over seconds, days, development, and the life-course. Here, we posit that exploring listening loops at different scales of investigation—from in vivo recording to human assessment—their role in detecting different timescales of regularity, and the consequences this has for background detection, will reveal the fundamental processes that transform hearing into the essential task of listening.
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Affiliation(s)
- David McAlpine
- Department of Linguistics, Macquarie University, Sydney, NSW, Australia
- *Correspondence: David McAlpine,
| | - Livia de Hoz
- Neuroscience Research Center, Charité – Universitätsmedizin Berlin, Berlin, Germany
- Bernstein Center for Computational Neuroscience, Berlin, Germany
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Cheng L, Gao L, Zhang X, Wu Z, Zhu J, Yu Z, Yang Y, Ding Y, Li C, Zhu F, Wu G, Zhou K, Wang M, Shi T, Liu Q. A bioinspired configurable cochlea based on memristors. Front Neurosci 2022; 16:982850. [PMID: 36263363 PMCID: PMC9574047 DOI: 10.3389/fnins.2022.982850] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 06/30/2022] [Accepted: 09/08/2022] [Indexed: 11/13/2022] Open
Abstract
Cochleas are the basis for biology to process and recognize speech information, emulating which with electronic devices helps us construct high-efficient intelligent voice systems. Memristor provides novel physics for performing neuromorphic engineering beyond complementary metal-oxide-semiconductor technology. This work presents an artificial cochlea based on the shallen-key filter model configured with memristors, in which one filter emulates one channel. We first fabricate a memristor with the TiN/HfOx/TaOx/TiN structure to implement such a cochlea and demonstrate the non-volatile multilevel states through electrical operations. Then, we build the shallen-key filter circuit and experimentally demonstrate the frequency-selection function of cochlea’s five channels, whose central frequency is determined by the memristor’s resistance. To further demonstrate the feasibility of the cochlea for system applications, we use it to extract the speech signal features and then combine it with a convolutional neural network to recognize the Free Spoken Digit Dataset. The recognition accuracy reaches 92% with 64 channels, compatible with the traditional 64 Fourier transform transformation points of mel-frequency cepstral coefficients method with 95% recognition accuracy. This work provides a novel strategy for building cochleas, which has a great potential to conduct configurable, high-parallel, and high-efficient auditory systems for neuromorphic robots.
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Affiliation(s)
- Lingli Cheng
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Lili Gao
- Zhejiang Laboratory, Hangzhou, China
| | - Xumeng Zhang
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
- *Correspondence: Xumeng Zhang,
| | - Zuheng Wu
- School of Integrated Circuit, Anhui University, Hefei, China
| | - Jiaxue Zhu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Zhaoan Yu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Yue Yang
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Yanting Ding
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Chao Li
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Fangduo Zhu
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Guangjian Wu
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Keji Zhou
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Ming Wang
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Tuo Shi
- Zhejiang Laboratory, Hangzhou, China
| | - Qi Liu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
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