Multi-Valued Logic Circuits Based on Organic Anti-ambipolar Transistors

High-Performance Photoinduced Tunneling Self-Driven Photodetector for Polarized Imaging and Polarization-Coded Optical Communication based on Broken-Gap ReSe2/SnSe2 van der Waals Heterojunction

Novel 2D materials with low-symmetry structures exhibit great potential applications in developing monolithic polarization-sensitive photodetectors with small volume. However, owing to the fact that at least half of them presented a small anisotropic factor of ≈2, comprehensive performance of present polarization-sensitive photodetectors based on 2D materials is still lower than the practical application requirements. Herein, a self-driven photodetector with high polarization sensitivity using a broken-gap ReSe2/SnSe2 van der Waals heterojunction (vdWH) is demonstrated. Anisotropic ratio of the photocurrent (Imax/Imin) could reach 12.26 (635 nm, 179 mW cm-2). Furthermore, after a facile combination of the ReSe2/SnSe2 device with multilayer graphene (MLG), Imax/Imin of the MLG/ReSe2/SnSe2 can be further increased up to13.27, which is 4 times more than that of pristine ReSe2 photodetector (3.1) and other 2D material photodetectors even at a bias voltage. Additionally, benefitting from the synergistic effect of unilateral depletion and photoinduced tunneling mechanism, the MLG/ReSe2/SnSe2 device exhibits a fast response speed (752/928 µs) and an ultrahigh light on/off ratio (105). More importantly, MLG/ReSe2/SnSe2 device exhibits excellent potential applications in polarized imaging and polarization-coded optical communication with quaternary logic state without any power supply. This work provides a novel feasible avenue for constructing next-generation smart polarization-sensitive photodetector with low energy consumption.

Tunable anti-ambipolar vertical bilayer organic electrochemical transistor enable neuromorphic retinal pathway

Increasing demand for bio-interfaced human-machine interfaces propels the development of organic neuromorphic electronics with small form factors leveraging both ionic and electronic processes. Ion-based organic electrochemical transistors (OECTs) showing anti-ambipolarity (OFF-ON-OFF states) reduce the complexity and size of bio-realistic Hodgkin-Huxley(HH) spiking circuits and logic circuits. However, limited stable anti-ambipolar organic materials prevent the design of integrated, tunable, and multifunctional neuromorphic and logic-based systems. In this work, a general approach for tuning anti-ambipolar characteristics is presented through assembly of a p-n bilayer in a vertical OECT (vOECT) architecture. The vertical OECT design reduces device footprint, while the bilayer material tuning controls the anti-ambipolarity characteristics, allowing control of the device's on and off threshold voltages, and peak position, while reducing size thereby enabling tunable threshold spiking neurons and logic gates. Combining these components, a mimic of the retinal pathway reproducing the wavelength and light intensity encoding of horizontal cells to spiking retinal ganglion cells is demonstrated. This work enables further incorporation of conformable and adaptive OECT electronics into biointegrated devices featuring sensory coding through parallel processing for diverse artificial intelligence and computing applications.

Multifunctional In-Memory Logics Based on a Dual-Gate Antiambipolar Transistor toward Non-von Neumann Computing Architecture

In-memory computing may make it possible to realize non-von Neumann computing because the logic circuits are unified in the memory units. We investigated two types of in-memory logic operations, namely, two-input logic circuits and multifunctional artificial synapses. These were realized in a dual-gate antiambipolar transistor (AAT) with a ReS2/WSe2 heterojunction, in which polystyrene with a zinc phthalocyanine core (ZnPc-PS4) was incorporated as a memory layer. Here, reconfigurability is a key concept for both types of device operations and was achieved by merging the Λ-shaped transfer curve of the AAT and the nonvolatile memory effect of ZnPc-PS4. First, we achieved electrically reconfigurable two-input logic circuits. Versatile logic circuits such as AND, OR, NAND, NOR, and XOR circuits were demonstrated by taking advantage of the Λ-shaped transfer curve of the dual-gate AAT. Importantly, the nonvolatile memory function provided the electrical switching of the individual circuits between AND/OR, NAND/NOR, and XOR/NAND circuits with constant input signals. Second, the memory effect was applied to multifunctional artificial synapses. The inhibitory/excitatory and long-term potentiation/depression synaptic operations were electrically reconfigured simply by controlling one parameter (readout voltage), making three distinct responses possible even with the same presynaptic signals. These findings provide hints that may lead to the realization of new in-memory computing architectures beyond the current von Neumann computers.

Gate-Tunable Positive and Negative Photoconductance in Near-Infrared Organic Heterostructures for In-Sensor Computing

The rapid growth of sensor data in the artificial intelligence often causes significant reductions in processing speed and power efficiency. Addressing this challenge, in-sensor computing is introduced as an advanced sensor architecture that simultaneously senses, memorizes, and processes images at the sensor level. However, this is rarely reported for organic semiconductors that possess inherent flexibility and tunable bandgap. Herein, an organic heterostructure that exhibits a robust photoresponse to near-infrared (NIR) light is introduced, making it ideal for in-sensor computing applications. This heterostructure, consisting of partially overlapping p-type and n-type organic thin films, is compatible with conventional photolithography techniques, allowing for high integration density of up to 520 devices cm-2 with a 5 µm channel length. Importantly, by modulating gate voltage, both positive and negative photoresponses to NIR light (1050 nm) are attained, which establishes a linear correlation between responsivity and gate voltage and consequently enables real-time matrix multiplication within the sensor. As a result, this organic heterostructure facilitates efficient and precise NIR in-sensor computing, including image processing and nondestructive reading and classification, achieving a recognition accuracy of 97.06%. This work serves as a foundation for the development of reconfigurable and multifunctional NIR neuromorphic vision systems.

Tuning the Threshold Voltage of an Oxide Thin-Film Transistor by Electron Injection Control Using a p-n Semiconductor Heterojunction Structure

Herein, a heterojunction structure integrating p-type tellurium (Te) and n-type aluminum-doped indium-zinc-tin oxide (Al:IZTO) is shown to precisely modulate the threshold voltage (VT) of the oxide thin-film transistor (TFT). The proposed architecture integrates Te as an electron-blocking layer and Al:IZTO as a charge-carrier transporting layer, thereby enabling controlled electron injection. The effects of incorporating the Te layer onto Al:IZTO are investigated, with a focus on X-ray photoelectron spectroscopy (XPS) analysis, in order to explain the behavior of oxygen vacancies and to depict the energy band structure configurations. By modulating the thickness and employing both single and double deposition methods for the heterojunction Te layer, a remarkable VT shift of up to +20 V is achieved. Furthermore, this study also shows excellent stability to a positive bias stress of +2 MV/cm for 10,000 s without additional passivation layers, demonstrating the robustness of the designed TFT. By a thorough optimization of the Al:IZTO/Te interface, the results demonstrate not only the substantial impact of the introduced heterojunction structure on VT control but also the endurance, durability, and stability of the optimized TFTs under prolonged long-term operating stress, thus offering promising prospects for tailored semiconductor device applications.

Junctionless Negative-Differential-Resistance Device Using 2D Van-Der-Waals Layered Materials for Ternary Parallel Computing

Negative-differential-resistance (NDR) devices offer a promising pathway for developing future computing technologies characterized by exceptionally low energy consumption, especially multivalued logic computing. Nevertheless, conventional approaches aimed at attaining the NDR phenomenon involve intricate junction configurations and/or external doping processes in the channel region, impeding the progress of NDR devices to the circuit and system levels. Here, an NDR device is presented that incorporates a channel without junctions. The NDR phenomenon is achieved by introducing a metal-insulator-semiconductor capacitor to a portion of the channel area. This approach establishes partial potential barrier and well that effectively restrict the movement of hole and electron carriers within specific voltage ranges. Consequently, this facilitates the implementation of both a ternary inverter and a ternary static-random-access-memory, which are essential components in the development of multivalued logic computing technology.

A Ternary Inverter Based on Hybrid Conduction Mechanism of Band-to-Band Tunneling and Drift-Diffusion Process

In this paper, a novel transistor based on a hybrid conduction mechanism of band-to-band tunneling and drift-diffusion is proposed and investigated with the aid of TCAD tools. Besides the on and off states, the proposed device presents an additional intermediate state between the on and off states. Based on the tri-state behavior of the proposed TDFET (tunneling and drift-diffusion field-effect transistor), a ternary inverter is designed and its operation principle is studied in detail. It was found that this device achieves ternary logic with only two components, and its structure is simple. In addition, the influence of the supply voltage and the key device parameters are also investigated.

Anti-Ambipolar Heterojunctions: Materials, Devices, and Circuits

Anti-ambipolar heterojunctions are vital in constructing high-frequency oscillators, fast switches, and multivalued logic (MVL) devices, which hold promising potential for next-generation integrated circuit chips and telecommunication technologies. Thanks to the strategic material design and device integration, anti-ambipolar heterojunctions have demonstrated unparalleled device and circuit performance that surpasses other semiconducting material systems. This review aims to provide a comprehensive summary of the achievements in the field of anti-ambipolar heterojunctions. First, the fundamental operating mechanisms of anti-ambipolar devices are discussed. After that, potential materials used in anti-ambipolar devices are discussed with particular attention to 2D-based, 1D-based, and organic-based heterojunctions. Next, the primary device applications employing anti-ambipolar heterojunctions, including anti-ambipolar transistors (AATs), photodetectors, frequency doublers, and synaptic devices, are summarized. Furthermore, alongside the advancements in individual devices, the practical integration of these devices at the circuit level, including topics such as MVL circuits, complex logic gates, and spiking neuron circuits, is also discussed. Lastly, the present key challenges and future research directions concerning anti-ambipolar heterojunctions and their applications are also emphasized.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

Reconfigurable Logic-in-Memory Constructed Using an Organic Antiambipolar Transistor

We demonstrate an electrically reconfigurable two-input logic-in-memory (LIM) using a dual-gate-type organic antiambipolar transistor (DG-OAAT). The attractive feature of this device is that a phthalocyanine-cored star-shaped polystyrene is used as a nano-floating gate, which enables the electrical switching of individual logic circuits and stores the circuit information by the nonvolatile memory effect. First, the DG-OAAT exhibited Λ-shaped transfer curves with hysteresis by sweeping the bottom-gate voltage. Programming and erasing operations enabled the reversible shift of the Λ-shaped transfer curves. Furthermore, the top-gate voltage effectively tuned the peak voltages of the transfer curves. Consequently, the combination of dual-gate and memory effects achieved electrically reconfigurable two-input LIM operations. Individual logic circuits (e.g., OR/NAND, XOR/NOR, and AND/XOR) were reconfigured by the corresponding programming and erasing operations without any variations in the input signals. Our device concept has the potential to fulfill an epoch-making organic integration circuit with a simple device configuration.

Probing Optical Multi-Level Memory Effects in Single Core-Shell Quantum Dots and Application Through 2D-0D Hybrid Inverters

Challenges in the development of a multi-level memory (MM) device for multinary arithmetic computers have posed an obstacle to low-power, ultra-high-speed operation. For the effective transfer of a huge amount of data between arithmetic and storage devices, optical communication technology represents a compelling solution. Here, by replicating a floating gate architecture with CdSe/ZnS type-I core/shell quantum dots (QDs), a 2D-0D hybrid optical multi-level memory (OMM) device operated is demonstrated by laser pulses. In the device, laser pulses create linear optically trapped currents with MM characteristics, while conversely, voltage pulses reset all the trapped currents at once. Assuming electron transfer via the energy band alignment between MoS2 and CdSe, the study also establishes the mechanism of the OMM effect. Analysis of the designed device led to a new hypothesis that charge transfer is difficult for laterally adjacent QDs facing a double ZnS shell, which is tested by separately stimulating different positions on the 2D-0D hybrid structure with finely focused laser pulses. Results indicate that each laser pulse induced independent MM characteristics in the 2D-0D hybrid architecture. Based on this phenomenon, we propose a MM inverter to produce MM effects, such as programming and erasing, solely through the use of laser pulses. Finally, the feasibility of a fully optically-controlled intelligent system based on the proposed OMM inverters is evaluated through a CIFAR-10 pattern recognition task using a convolutional neural network.

A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors

A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate. In the H-MTR, a reliable transition between N-shaped transfer curves with distinct NTC and monolithically current-increasing transfer curves without apparent NTC can be accomplished through programming operation. Based on the H-MTR, a binary/ternary reconfigurable logic inverter (R-inverter) has been successfully implemented, which showed an unprecedentedly high static noise margin of 85% for binary logic operation and 59% for ternary logic operation, as well as long-term stability and outstanding cycle endurance. Furthermore, a ternary/binary dynamic logic conversion-in-memory has been demonstrated using a serially-connected R-inverter chain. The ternary/binary dynamic logic conversion-in-memory could generate three different output logic sequences for the same input signal in three logic levels, which is a new logic computing method that has never been presented before.

Asymmetric two-dimensional ferroelectric transistor with anti-ambipolar transport characteristics

Two-dimensional (2D) ferroelectric transistors hold unique properties and positions, especially talking about low-power memories, in-memory computing, and multifunctional logic devices. To achieve better functions, appropriate design of new device structures and material combinations is necessary. We present an asymmetric 2D heterostructure integrating MoTe₂, h-BN, and CuInP₂S₆ as a ferroelectric transistor, which exhibits an unusual property of anti-ambipolar transport characteristic under both positive and negative drain biases. Our results demonstrate that the anti-ambipolar behavior can be modulated by external electric field, achieving a peak-to-valley ratio up to 10³. We also provide a comprehensive explanation for the occurrence and modulation of the anti-ambipolar peak based on a model describing linked lateral-and-vertical charge behaviors. Our findings provide insights for designing and constructing anti-ambipolar transistors and other 2D devices with significant potential for future applications.

Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process

A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated. The stability of the DNTT stack-channel ternary logic switch device is confirmed by implementing a resistive-load ternary logic inverter circuit.

Optically Controllable Organic Logic-in-Memory: An Innovative Approach toward Ternary Data Processing and Storage

Logic-in-memory (LIM) has emerged as an energy-efficient computing technology, as it integrates logic and memory operations in a single device architecture. Herein, a concept of ternary LIM is established. First, a p-type 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) transistor is combined with an n-type PhC₂H₄-benzo[de]isoquinolino[1,8-gh]quinolone diimide (PhC2-BQQDI) transistor to obtain a binary memory inverter, in which a zinc phthalocyanine-cored polystyrene (ZnPc-PS₄) layer serves as a floating gate. The contrasting photoresponse of the transistors toward visible and ultraviolet light and the efficient hole-trapping ability of ZnPc-PS₄ enable us to achieve an optically controllable memory operation with a high memory window of 18 V. Then, a ternary memory inverter is developed using an anti-ambipolar transistor to achieve a three-level data processing and storage system for more advanced LIM applications. Finally, low-voltage operation of the devices is achieved by employing a high-k dielectric layer, which highlights the potential of the developed LIM units for next-generation low-power electronics.

Looking Beyond 0 and 1: Principles and Technology of Multi-Valued Logic Devices

Ever since the invention of solid-state transistors, binary devices have dominated the electronics industry. Although the binary technology links the natural property of devices to be in the ON or OFF state with two logic levels, it provides the least possible information content per interconnect. Multi-valued logic (MVL) has long been considered as a means of improving the computation efficiency and reducing the power consumption of modern chips. In view of the power density limits of the conventional complementary metal-oxide-semiconductor technology, MVL technologies have recently gained even more attention, and various MVL unit devices based on conventional and emerging materials have been proposed. Herein, the recent achievements toward the development of compact MVL unit devices are reviewed. First, basic principles of MVL technologies are introduced by describing methods of obtaining multiple logic states and discussing radix-related aspects of MVL computation. Next, MVL unit devices are classified and overviewed with emphasis on principles of operation, technologies, and applications. Finally, a comparative discussion of strengths and weaknesses is provided for each class of MVL devices, and the review concludes with the outlook for the MVL field.

High-Performance Organic Laser Semiconductor Enabling Efficient Light-Emitting Transistors and Low-Threshold Microcavity Lasers

An organic light-emitting transistor (OLET) is a candidate device architecture for developing electrically pumped organic solid-state lasers, but it remains a critical challenge because of the lack of organic semiconductors that simultaneously possess a high solid-state emission efficiency (Φ_s), a high and balanced ambipolar mobility (μ_h,e), and a large stimulated emission cross-section. Here, we designed a molecule of 4,4'-bis(2-dibenzothiophenyl-vinyl)-biphenyl (DBTVB) and prepared its ultrathin single-crystal microplates with herringbone packing arrangements, which achieve balanced mobilities of μ_h = 3.55 ± 0.5 and μ_e = 2.37 ± 0.5 cm² V^-1 s^-1, a high Φ_s of 85 ± 3%, and striking low-threshold laser characteristics. Theoretical and experimental investigations reveal that a strong electronic coupling and a small reorganization energy ensure efficient charge transport; meanwhile, the exciton-vibration effect and negligible π-π orbital overlap give rise to highly emissive H-aggregates and facilitate laser emission. Furthermore, OLET-based DBTVB crystals offer an internal quantum efficiency approaching 100% and a record-high electroluminescence external quantum efficiency of 4.03%.

Carrier-Transport Mechanism in Organic Antiambipolar Transistors Unveiled by Operando Photoemission Electron Microscopy

Organic antiambipolar transistors (AATs) have partially overlapped p-n junctions. At room temperature, this p-n junction induces a negative differential transconductance in an AAT. However, the detailed carrier-transport mechanism remains unclear. Herein, an operando photoemission electron microscopy is used to tackle this issue owing to the technique's ability to visualize conductive electrons in real time during transistor operation. Notably, it is observed that when the AAT is on, a depletion layer forms at the lateral p-n junction. The visualized depletion layer shows that both p- and n-type channels have pinch-off states in the gate voltage range when the AAT is in on state. The steep potential gradient at the lateral p-n interface enhances the electron conduction from n-type to p-type semiconductor. Another significant finding is that most electrons are considered to recombine with the accumulated holes in the p-type semiconductor, affording the reduction of photoemission intensity by ≈80%. This technique provides a thorough understanding of carrier transport in AATs, further improving the device performance.

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors

Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter fulfills all the important requirements such as full-swing operation, optimum intermediate logic value (~V_DD/2), high DC gain exceeding 20 V/V as well as low-voltage operation (< 5 V). The organic flash memory exhibits long retention characteristics (current change less than 10% after 10⁴s), leading to the long-term stability of the 3D T-inverter. We believe the 3D T-inverter employing flash memory developed in this study can provide a useful insight to achieve high-performance MVL circuits.

High-density information processing without increasing the circuit complexity is highly desired in electronics. Here, Im et al. demonstrate a low-voltage organic ternary logic circuit vertically integrated with the nonvolatile flash memory, increasing the information density by a factor of 3.

Electrically Reconfigurable Organic Logic Gates: A Promising Perspective on a Dual-Gate Antiambipolar Transistor

Electrically reconfigurable organic logic circuits are promising candidates for realizing new computation architectures, such as artificial intelligence and neuromorphic devices. In this study, multiple logic gate operations are attained based on a dual-gate organic antiambipolar transistor (DG-OAAT). The transistor exhibits a Λ-shaped transfer curve, namely, a negative differential transconductance at room temperature. It is important to note that the peak voltage of the drain current is precisely tuned by three input signals: bottom-gate, top-gate, and drain voltages. This distinctive feature enables multiple logic gate operations with "only a single DG-OAAT," which are not obtainable in conventional transistors. Five logic gate operations, which correspond to AND, OR, NAND, NOR, and XOR, are demonstrated by adjusting the bottom-gate and top-gate voltages. Moreover, varying the drain voltage makes it possible to reversibly switch two logic gates, e.g., NAND/NOR and OR/XOR. In addition, the DG-OAATs show a high degree of stability and reliability. The logic gate operations are observed even months later. The hysteresis in the transfer curves is also negligible. Thus, the device concept is promising for realizing multifunctional logic circuits with a simple transistor configuration. Hence, these findings are expected to surpass the current limitations in complementary metal-oxide-semiconductor devices.

Emerging Logic Devices beyond CMOS

Si-based complementary metal-oxide-semiconductor (CMOS) transistors for logic computing have represented the most essential foundation of digital electronic technologies for decades toward the modern information era. The continuous scaling down of the transistor feature size has promoted significant improvements in the computing performance while gradually tending to its limit. Ubiquitous intelligent technologies have quickly penetrated daily life, yielding a tremendous increase in highly data-centric computing applications. Hence, emerging logic devices extending and even transcending the existing CMOS technology are urgently needed to meet the rapidly growing demand for information processing capability, involving revolutionary innovations from material science and architecture design to device applications. This thus gives us the opportunity to realize logic devices for state-of-the-art computing that are fundamentally far beyond the current devices. In this Perspective, we discuss the recent innovative design strategies of emerging logic devices along with the opportunities and challenges, providing a promising avenue toward high-performance and diversiform logic computing in the post-Moore era.

Area-Selective Chemical Doping on Solution-Processed MoS2 Thin-Film for Multi-Valued Logic Gates

Multi-valued logic gates are demonstrated on solution-processed molybdenum disulfide (MoS₂) thin films. A simple chemical doping process is added to the conventional transistor fabrication procedure to locally increase the work function of MoS₂ by decreasing sulfur vacancies. The resulting device exhibits pseudo-heterojunctions comprising as-processed MoS₂ and chemically treated MoS₂ (c-MoS₂). The energy-band misalignment of MoS₂ and c-MoS₂ results in a sequential activation of the MoS₂ and c-MoS₂ channel areas under a gate voltage sweep, which generates a stable intermediate state for ternary operation. Current levels and turn-on voltages for each state can be tuned by modulating the device geometries, including the channel thickness and length. The optimized ternary transistors are incorporated to demonstrate various ternary logic gates, including the inverter, NMIN, and NMAX gates.

Synthesis and characterization of naphthalene derivatives for two-component heterojunction-based ambipolar field-effect transistors complemented with copper hexadecafluorophthalocyanine (F16CuPc)

Ambipolar OFET performance was obtained by adjusting two-component bilayer devices based on new naphthalene derivatives and F16CuPc.

Multi-Bit Analog Transmission Enabled by Electrostatically Reconfigurable Ambipolar and Anti-Ambipolar Transport

Various analog applications, such as phase switching, have been demonstrated using either ambipolar or anti-ambipolar transport in two-dimensional materials. However, the availability of only one transport mode severely limits the application scope and range. This work demonstrates electrostatically reconfigurable and tunable ambipolar and anti-ambipolar transport in the same field-effect transistor using a photoactive ambipolar WSe₂ channel with gate-controlled channel and Schottky barriers. This enables the realization of in-phase, out-of-phase, and double-frequency sinusoidal output signals under dark and illumination conditions. The output waveforms were used to generate phase-, frequency-, and amplitude-modulated analog schemes for 2- and 3-bit data transmission. Evaluation of all possible schemes for their power consumption, error probability, and implementation complexity highlights the importance of switching between ambipolar and anti-ambipolar modes of transport for best transmission performance. A dual-metal contact transistor with improved linearity for harmonic and excess power suppression demonstrates further performance enhancement. Generic device architecture and operation makes this work adaptable to any ambipolar material amenable to electrostatic control.

Reconfigurable Multivalue Logic Functions of a Silicon Ellipsoidal Quantum-Dot Transistor Operating at Room Temperature

Reconfigurable multivalue logic functions, which can perform the versatile arithmetic computation of weighted electronic data information, are demonstrated at room temperature on an all-around-gate silicon ellipsoidal quantum-dot transistor. The large single-hole transport energy of the silicon quantum ellipsoid allows the stable M-shaped Coulomb blockade oscillation characteristics at room temperature, and the all-around-gate structure of the fabricated transistor enables us to perform the precise self-control of the energetic Coulomb blockade conditions by changing the applied bias voltage. Such a self-controllability of the M-shaped Coulomb blockade oscillation characteristics provides a great advantage to choose multiple operation points for the reconfigurable multivalue logic functions. Consequently, the weighted data states (e.g., tri-value and quattro-value) are effectively demonstrated by utilizing only the device physics in the all-around-gate silicon ellipsoidal quantum-dot transistor. These findings are of great benefit for the practical application of the silicon quantum device at an elevated temperature for future nanoelectronic information technology.

Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-Performance, Low-Power Flexible Ternary Logic Circuits

Organic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (H-TRs). To achieve high-performance organic ternary logic circuits, the range of NTC in H-TRs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, a simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Each thickness of p-/n-type semiconductor in H-TRs is adjusted to control the channel conductivity. Furthermore, asymmetric source/drain (S/D) electrode structure is newly developed for H-TRs, which can adjust the amount of hole and electron injection, independently. Based on the semiconductor thickness variation and asymmetric S/D electrodes, the T-inverter exhibits full-swing operation with three distinguishable logic states, resulting in unprecedentedly high static noise margin (≈48% of the ideal value). Moreover, a flexible T-inverter with an ultrathin polymer dielectric is demonstrated, whose operating voltage is less than 8 V. The proposed strategy is fully compatible with the conventional integrated circuit design, which is highly desirable for broad applicability and scalability for various types of T-inverter production.

Monolithic Tandem Multicolor Image Sensor Based on Electrochromic Color-Radix Demultiplexing

Optical data acquisition has been set as one of the milestones to testify the developments aimed at harnessing the full potential of the spatial and temporal data processing capabilities of the advanced semiconductor technology. A highly promising approach to drive the level of acquisition beyond the current technological node is the vertical integration of multiple photodetectors. However, vertical integration so far requires the same level of circuit complexity as lateral integration from the incapability of monolithic integration. Here, an electrochromic device architecture is introduced that enables realization of a monolithic tandem multicolor photodetector. The device, composed of vertically stacked p-type and n-type graphene barristors, is demonstrated to be capable of regulating the balanced charge transport under any desired illumination wavelengths. It exhibits variable anti-ambipolar charge transport behavior, which yields sensitive voltage-controlled photoconductive gain spectra. These electrical behaviors are utilized to fabricate an optoelectronic logic sensor that can demultiplex the desired color coordinate or wavelength in the constituent array with high color accuracy.

Conception of a Smart Artificial Retina Based on a Dual-Mode Organic Sensing Inverter

The human visual system enables perceiving, learning, remembering, and recognizing elementary visual information (light, colors, and images), which has inspired the development of biomimicry visual system-based electronic devices. Photosensing and synaptic devices are integrated into these systems to realize elementary information storage and recognition to imitate image processing. However, the severe restrictions of the monotonic light response and complicated circuitry design remain challenges for the development of artificial visual devices. Here, the concept of a smart artificial retina based on an organic optical sensing inverter device that can be operated as a multiwavelength photodetector and recorder is reported first. The device exhibits a light-triggered broadband (red/green/blue) response, a low energy consumption as low as ±5 V, and an ultrafast response speed (<300 ms). Moreover, the multifunctional component is also combined within a single cell for health monitoring of the artificial retina during light surveillance to avoid retinopathy. Proof-of-concept devices, by simplifying the circuitry and providing dual-mode functions, can contribute significantly to the development of bionics design and broaden the horizon for smart artificial retinas in the human visual system.

Double-Gate MoS2 Field-Effect Transistors with Full-Range Tunable Threshold Voltage for Multifunctional Logic Circuits

Multifunctional reconfigurable devices, with higher information capacity, smaller size, and more functions, are urgently needed and draw most attention in frontiers in information technology. 2D semiconductors, ascribing to ultrathin body and easy electrostatic control, show great potential in developing reconfigurable functional units. This work proposes a novel double-gate field-effect transistor architecture with equal top and bottom gate (TG and BG) and realizes flexible optimization of the subthreshold swing (SS) and threshold voltage (V_TH ). While the TG and BG are used simultaneously, as a single gate to drive the transistor, ultralow average SS value of 65.5 mV dec^-1 can be obtained in a large current range over 10⁴ , enabling the application in high gain inverter. While one gate is used to initialize the channel doping, full logic swing inverter circuit with high noise margin (over 90%) is demonstrated. Such device prototype is further extended for designing reconfigurable logic applications and can be dynamically switched and well maintained between binary and ternary logics. This study provides important concept and device prototype for future multifunctional logic applications.

A Bi-Anti-Ambipolar Field Effect Transistor

Multistate logic is recognized as a promising approach to increase the device density of microelectronics, but current approaches are offset by limited performance and large circuit complexity. We here demonstrate a route toward increased integration density that is enabled by a mechanically tunable device concept. Bi-anti-ambipolar transistors (bi-AATs) exhibit two distinct peaks in their transconductance and can be realized by a single 2D-material heterojunction-based solid-state device. Dynamic deformation of the device reveals the co-occurrence of two conduction pathways to be the origin of this previously unobserved behavior. Initially, carrier conduction proceeds through the junction edge, but illumination and application of strain can increase the recombination rate in the junction sufficiently to support an alternative carrier conduction path through the junction area. Optical characterization reveals a tunable emission pattern and increased optoelectronic responsivity that corroborates our model. Strain control permits the optimization of the conduction efficiency through both pathways and can be employed in quaternary inverters for future multilogic applications.

Bias-controlled multi-functional transport properties of InSe/BP van der Waals heterostructures

Van der Waals (vdW) heterostructures, consisting of a variety of low-dimensional materials, have great potential use in the design of a wide range of functional devices thanks to their atomically thin body and strong electrostatic tunability. Here, we demonstrate multi-functional indium selenide (InSe)/black phosphorous (BP) heterostructures encapsulated by hexagonal boron nitride. At a positive drain bias (V_D), applied on the BP while the InSe is grounded, our heterostructures show an intermediate gate voltage (V_BG) regime where the current hardly changes, working as a ternary transistor. By contrast, at a negative V_D, the device shows strong negative differential transconductance characteristics; the peak current increases up to ~5 μA and the peak-to-valley current ratio reaches 1600 at V_D = −2 V. Four-terminal measurements were performed on each layer, allowing us to separate the contributions of contact resistances and channel resistance. Moreover, multiple devices with different device structures and contacts were investigated, providing insight into the operation principle and performance optimization. We systematically investigated the influence of contact resistances, heterojunction resistance, channel resistance, and the thickness of BP on the detailed operational characteristics at different V_D and V_BG regimes.

Recent Advances on Multivalued Logic Gates: A Materials Perspective

The recent advancements in multivalued logic gates represent a rapid paradigm shift in semiconductor technology toward a new era of hyper Moore's law. Particularly, the significant evolution of materials is guiding multivalued logic systems toward a breakthrough gradually, whereby they are transcending the limits of conventional binary logic systems in terms of all the essential figures of merit, i.e., power dissipation, operating speed, circuit complexity, and, of course, the level of the integration. In this review, recent advances in the field of multivalued logic gates based on emerging materials to provide a comprehensive guideline for possible future research directions are reviewed. First, an overview of the design criteria and figures of merit for multivalued logic gates is presented, and then advancements in various emerging nanostructured materials-ranging from 0D quantum dots to multidimensional heterostructures-are summarized and these materials in terms of device design criteria are assessed. The current technological challenges and prospects of multivalued logic devices are also addressed and major research trends are elucidated.

Prediction of a Two-Transistor Vertical QNOT Gate

A new design of quaternary inverter (QNOT gate) is proposed by means of finite-element simulation. Traditionally, increasing the number of data levels in digital logic circuits was achieved by increasing the number of transistors. Our QNOT gate consists of only two transistors, resembling the binary complementary metal-oxide-semiconductor (CMOS) inverter, yet the two additional levels are generated by controlling the charge-injection barrier and electrode overlap. Furthermore, these two transistors are stacked vertically, meaning that the entire footprint only consumes the area of one single transistor. We explore several key geometrical and material parameters in a series of simulations to show how to systematically modulate and optimize the quaternary logic behaviors.

Negative differential transconductance device with a stepped gate dielectric for multi-valued logic circuits

Multi-valued logic (MVL) technology is a promising approach for improving the data-handling capabilities and decreasing the power consumption of integrated circuits. This is especially attractive as conventional complementary metal-oxide-semiconductor technology is approaching its scaling and power density limits. Here, an ambipolar WSe₂ field-effect transistor with two or more negative-differential-transconductance (NDT) regions in its transfer characteristic (NDTFET) is proposed for MVL applications of various radices. The operation and charge carrier transport mechanism of the NDTFET are studied first by Kelvin probe force microscopy, electrical, and capacitance-voltage measurements. Next, strategies for increasing the number of NDT regions and engineering the NDTFET transfer characteristic are discussed. Finally, the extensibility and tunability of our concept are demonstrated by adapting NDTFETs as core devices for ternary, quaternary, and quinary MVL inverters through simulations, where only WSe₂ is employed as a channel material for all devices comprising the inverters. The MVL inverter operation principle and the mechanism of the multiple logic state formation are analyzed in detail. The proposed concept is practically verified by the fabrication of a ternary inverter.

Distinctive Field-Effect Transistors and Ternary Inverters Using Cross-Type WSe2/MoS2 Heterojunctions Treated with Polymer Acid

The electrical and optical characteristics of two-dimensional (2D) transition-metal dichalcogenides (TMDCs) can be improved by surface modification. In this study, distinctive field-effect transistors (FETs) were realized by forming cross-type 2D WSe₂/MoS₂ p-n heterojunctions through surface treatment using poly(methyl methacrylate-co-methacrylic acid) (PMMA-co-PMAA). The FETs were applied to new ternary inverters as multivalued logic circuits (MVLCs). Laser confocal microscope photoluminescence spectroscopy indicated the generation of trions in the WSe₂ and MoS₂ layers, and the intensity decreased after PMMA-co-PMAA treatment. For the cross-type WSe₂/MoS₂ p-n heterojunction FETs subjected to PMMA-co-PMAA treatment, the channel current and the region of anti-ambipolar transistor characteristics increased considerably, and ternary inverter characteristics with three stable logic states, "1", "1/2", and "0", were realized. Interestingly, the intermediate logic state 1/2, which results from the negative differential transconductance characteristics, was realized by the turn-on of all component FETs, as the current of the FETs increased after PMMA-co-PMAA treatment. The electron-rich carboxyl acid moieties in PMMA-co-PMAA can undergo coordination with the metal Mo or W atoms present in the Se or S vacancies, respectively, resulting in the modulation of charge density. These features yielded distinctive FETs and ternary inverters for MVLCs using cross-type WSe₂/MoS₂ heterojunctions.

A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory

For increasing the restricted bit-density in the conventional binary logic system, extensive research efforts have been directed toward implementing single devices with a two threshold voltage (VTH) characteristic via the single negative differential resistance (NDR) phenomenon. In particular, recent advances in forming van der Waals (vdW) heterostructures with two-dimensional crystals have opened up new possibilities for realizing such NDR-based tunneling devices. However, it has been challenging to exhibit three VTH through the multiple-NDR (m-NDR) phenomenon in a single device even by using vdW heterostructures. Here, we show the m-NDR device formed on a BP/(ReS2 + HfS2) type-III double-heterostructure. This m-NDR device is then integrated with a vdW transistor to demonstrate a ternary vdW latch circuit capable of storing three logic states. Finally, the ternary latch is extended toward ternary SRAM, and its high-speed write and read operations are theoretically verified.

Phase-Engineered Molybdenum Telluride/Black Phosphorus Van der Waals Heterojunctions for Tunable Multivalued Logic

Recently, multivalued logic (MVL) circuits have attracted tremendous interest due to their ability to process more data by increasing the number of logic states rather than the integration density. Here, we fabricate logic circuits based on molybdenum telluride (MoTe₂)/black phosphorus (BP) van der Waals heterojunctions with different structural phases of MoTe₂. Owing to the different electrical properties of the 2H and mixed 2H +1T' phases of MoTe₂, tunable logic devices have been realized. A logic circuit based on a BP field-effect transistor (FET) and a BP/MoTe₂ (2H + 1T') heterojunction FET displays the characteristics of binary logic. However, a drain voltage-controlled transition from binary to ternary logic has been observed in BP FET- and BP/ MoTe₂ (2H) heterojunction FET-based logic circuits. Also, a change from binary to ternary characteristics has been observed in BP/MoTe₂ (2H)-based inverters at low temperature below 240 K. We believe that this work will stimulate the assessment of the structural phase transition in metal dichalcogenides toward advanced logic circuits and offer a pathway to substantialize the circuit standards for future MVL systems.

Functionalized Organic Material Platform for Realization of Ternary Logic Circuit

Negative differential resistance/transconductance (NDR/NDT) has been attracting significant attention as a key functionality in the development of multivalued logic (MVL) systems that can overcome the limits of conventional binary logic devices. A high peak-to-valley current ratio (PVCR) and more than double-peak transfer characteristics are required to achieve a stable MVL operation. In this study, an organic NDR (ONDR) device with double-peak transfer characteristics and a high peak-to-valley current ratio (PVCR; >10²) is fabricated by utilizing an organic material platform for the development of a key element device for MVL applications. The organic NDT (ONDT) device is fabricated using a series connection of electron-dominant (P(NDI2OD-Se2)) and hole-dominant (P(DPP2DT-T2)) channel ambipolar organic field-effect transistors (AOFETs), and the NDR feature is achieved via correlated biasing of the ONDT device. The PVCR of the ONDT device can reach up to 13,000 via carrier transfer modulation of the AOFETs by varying the PMMA:P(VDF-TrFE) ratio of the mixed layer that is used as the top-gate dielectric of each AOFET. Further, ternary latch circuit operation is demonstrated using the developed ONDR device that stores three logic states with three distinct and controllable output states by adjusting the PMMA:P(VDF-TrFE) ratio of the dielectric layer.

Cyber-Physiochemical Interfaces

Living things rely on various physical, chemical, and biological interfaces, e.g., somatosensation, olfactory/gustatory perception, and nervous system response. They help organisms to perceive the world, adapt to their surroundings, and maintain internal and external balance. Interfacial information exchanges are complicated but efficient, delicate but precise, and multimodal but unisonous, which has driven researchers to study the science of such interfaces and develop techniques with potential applications in health monitoring, smart robotics, future wearable devices, and cyber physical/human systems. To understand better the issues in these interfaces, a cyber-physiochemical interface (CPI) that is capable of extracting biophysical and biochemical signals, and closely relating them to electronic, communication, and computing technology, to provide the core for aforementioned applications, is proposed. The scientific and technical progress in CPI is summarized, and the challenges to and strategies for building stable interfaces, including materials, sensor development, system integration, and data processing techniques are discussed. It is hoped that this will result in an unprecedented multi-disciplinary network of scientific collaboration in CPI to explore much uncharted territory for progress, providing technical inspiration-to the development of the next-generation personal healthcare technology, smart sports-technology, adaptive prosthetics and augmentation of human capability, etc.

Organic-based inverters: basic concepts, materials, novel architectures and applications

The review article covers the materials and techniques employed to fabricate organic-based inverter circuits and highlights their novel architectures, ground-breaking performances and potential applications.

Design and Implementation of Ternary Logic Integrated Circuits by Using Novel Two-Dimensional Materials

With the approaching end of Moore’s Law (that the number of transistors in a dense integrated circuit doubles every two years), the logic data density in modern binary digital integrated circuits can hardly be further improved due to the physical limitation. In this aspect, ternary logic (0, 1, 2) is a promising substitute to binary (0, 1) because of its higher number of logic states. In this work, we carry out a systematical study on the emerging two-dimensional (2D) materials (MoS2 and Black Phosphorus)-based ternary logic from individual ternary logic devices to large scale ternary integrated circuits. Various ternary logic devices, including the standard ternary inverter (STI), negative ternary inverter (NTI), positive ternary inverter (PTI) and especially the ternary decrement cycling inverter (DCI), have been successfully implemented using the 2D materials. Then, by taking advantage of the optimized ternary adder algorithm and the novel ternary cycling inverter, we design a novel ternary ripple-carry adder with great circuitry simplicity. Our design shows about a 50% reduction in the required number of transistors compared to the existing ternary technology. This work paves a new way for the ternary integrated circuits design, and shows potential to fulfill higher logic data density and a smaller chip area in the future.

Nanoelectromechanical graphene switches for the multi-valued logic systems

Graphene based multi-valued nanoelectromechanical switches are suggested and demonstrated. The device structure having multiple contact sites with different heights under the doubly clamped suspended beam provides multiple contacts to be formed sequentially from the taller electrode to the shorter electrode, which results in multiple logic states. Based on the finite element method simulation, we found that our device characteristics, such as turn-on and threshold voltages, are highly governed by the device design. The proof-of-concept device realized by using a newly developed 3D fabrication method based on the e-beam lithography expresses quaternary logic states successfully with a high stability in repetitive operations.

Negative Transconductance Heterojunction Organic Transistors and their Application to Full-Swing Ternary Circuits

Multivalued logic (MVL) computing could provide bit density beyond that of Boolean logic. Unlike conventional transistors, heterojunction transistors (H-TRs) exhibit negative transconductance (NTC) regions. Using the NTC characteristics of H-TRs, ternary inverters have recently been demonstrated. However, they have shown incomplete inverter characteristics; the output voltage (V_OUT ) does not fully swing from V_DD to G_ND . A new H-TR device structure that consists of a dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) layer stacked on a PTCDI-C13 layer is presented. Due to the continuous DNTT layer from source to drain, the proposed device exhibits novel switching behavior: p-type off/p-type subthreshold region /NTC/ p-type on. As a result, it has a very high on/off current ratio (≈10⁵ ) and exhibits NTC behavior. It is also demonstrated that an array of 36 of these H-TRs have 100% yield, a uniform on/off current ratio, and uniform NTC characteristics. Furthermore, the proposed ternary inverter exhibits full V_DD -to-G_ND swing of V_OUT with three distinct logic states. The proposed transistors and inverters exhibit hysteresis-free operation due to the use of a hydrophobic gate dielectric and encapsulating layers. Based on this, the transient operation of a ternary inverter circuit is demonstrated for the first time.