Thickness-Independent Energy Dissipation in Graphene Electronics

Efficient modulation of thermal transport in two-dimensional materials for thermal management in device applications

With the development of chip technology, the density of transistors on integrated circuits is increasing and the size is gradually shrinking to the micro-/nanoscale, with the consequent problem of heat dissipation on chips becoming increasingly serious. For device applications, efficient heat dissipation and thermal management play a key role in ensuring device operation reliability. In this review, we summarize the thermal management applications based on 2D materials from both theoretical and experimental perspectives. The regulation approaches of thermal transport can be divided into two main types: intrinsic structure engineering (acting on the intrinsic structure) and non-structure engineering (applying external fields). On one hand, the thermal transport properties of 2D materials can be modulated by defects and disorders, size effect (including length, width, and the number of layers), heterostructures, structure regulation, doping, alloy, functionalizing, and isotope purity. On the other hand, strain engineering, electric field, and substrate can also modulate thermal transport efficiently without changing the intrinsic structure of the materials. Furthermore, we propose a perspective on the topic of using magnetism and light field to modulate the thermal transport properties of 2D materials. In short, we comprehensively review the existing thermal management modulation applications as well as the latest research progress, and conclude with a discussion and perspective on the applications of 2D materials in thermal management, which will be of great significance to the development of next-generation nanoelectronic devices.

Energy Dissipation and Electrical Breakdown in Multilayer PtSe2 Electronics

Investigating the energy dissipation in micro- and nanoscale is fundamental to improve the performance and reliability of two-dimensional (2D) electronics. Recently, 2D platinum selenide (PtSe₂) has drawn extensive attention in developing next-generation functional devices due to its distinctive fusion of versatile properties. Toward practical applications of PtSe₂ devices, it is essential to understand the interfacial thermal properties between PtSe₂ and its substrate. Among them, the thermal boundary conductance (TBC) has played a critical role for out-of-plane heat dissipation of PtSe₂ devices. Here, we identify the energy dissipation behavior of multilayer PtSe₂ devices and extract the actual TBC value of the PtSe₂/SiO₂ interface by Raman thermometry with electrical bias. The obtained TBC value is about 8.6 MW m^-2 K^-1, and it belongs to the low end of as-known solid-solid interfaces, suggesting possible applications regarding thermoelectric devices or others reliant on a large temperature gradient. Furthermore, the maximum current density of the PtSe₂ device determines its threshold power, which is crucial for improving device design and guiding future applications. Therefore, we explore the electrical breakdown profile of the multilayer PtSe₂ device, revealing the breakdown current density of 17.7 MA cm^-2 and threshold power density of 0.2 MW cm^-2, which are larger than typical values for commonly used aluminum and copper. These results provide key insights into the energy dissipation of PtSe₂ devices and make PtSe₂ an excellent candidate for thermal confinement applications and nanometer-thin interconnects, which will benefit the development of energy-efficient functional 2D devices.

Tuning the Thermal Transport of Hexagonal Boron Nitride/Reduced Graphene Oxide Heterostructures

Tuning the thermal properties of materials is considered to be of crucial significance for improving the performance of electronic devices. Along these lines, the development of van der Waals (vdW) heterostructures becomes an effective solution to affect the thermal transport mechanisms. However, vdW interactions usually block phonon transport, which leads to a reduction in thermal conductivity. In this work, we experimentally demonstrate a large enhancement in the thermal conductivity of a vdW heterostructure composed of few-layer hexagonal boron nitride (h-BN) and reduced graphene oxide (RGO). By controlling the reduction temperature of RGO and changing the thickness of h-BN, the thermal conductivity of the RGO is increased by nearly 18 times, namely, from 91 to 1685 W m^-1 K^-1. Photothermal scanning imaging is used to reveal the changes in the heat transfer and temperature distribution of the h-BN/RGO heterostructure. Both photothermal scanning and Raman spectroscopy experiments show that the vdW interaction between h-BN and RGO can greatly increase the thermal conductivity of RGO, which is in contrast to the conventional understanding that vdW interaction reduces thermal conductivity. Our work paves the way for the manipulation of the thermal conductivity of two-dimensional (2D) heterostructures, which could be of great significance for future nanoelectronic circuits.

Stress Effects on Temperature-Dependent In-Plane Raman Modes of Supported Monolayer Graphene Induced by Thermal Annealing

The coupling strength between two-dimensional (2D) materials and substrate plays a vital role on thermal transport properties of 2D materials. Here we systematically investigate the influence of vacuum thermal annealing on the temperature-dependence of in-plane Raman phonon modes in monolayer graphene supported on silicon dioxide substrate via Raman spectroscopy. Intriguingly, raising the thermal annealing temperature can significantly enlarge the temperature coefficient of supported monolayer graphene. The derived temperature coefficient of G band remains mostly unchanged with thermal annealing temperature below 473 K, while it increases from −0.030 cm⁻¹/K to −0.0602 cm⁻¹/K with thermal annealing temperature ranging from 473 K to 773 K, suggesting the great impact of thermal annealing on thermal transport in supported monolayer graphene. Such an impact might reveal the vital role of coupling strength on phonon scattering and on the thermal transport property of supported monolayer graphene. To further interpret the thermal annealing mechanism, the compressive stress in supported monolayer graphene, which is closely related to coupling strength and is studied through the temperature-dependent Raman spectra. It is found that the variation tendency for compressive stress induced by thermal annealing is the same as that for temperature coefficient, implying the intense connection between compressive stress and thermal transport. Actually, 773 K thermal annealing can result in 2.02 GPa compressive stress on supported monolayer graphene due to the lattice mismatch of graphene and substrate. This study proposes thermal annealing as a feasible path to modulate the thermal transport in supported graphene and to design future graphene-based devices.