Gallium Doping Effects for Improving Switching Performance of p-Type Copper(I) Oxide Thin-Film Transistors

Structural phase transition and resistive switching properties of CuxO films during post-thermal annealing

We studied the phase change and resistive switching characteristics of copper oxide (CuxO) films through post-thermal annealing. This investigation aimed to assess the material's potential for a variety of electrical devices, exploring its versatility in electronic applications. The CuxO films deposited by RF magnetron sputtering were annealed at 300, 500, and 700 °C in ambient air for 4 min by rapid thermal annealing (RTA) method, and then it was confirmed that the structural phase change from Cu2O to CuO occurred with increasing annealing temperature. Resistive random-access memory (ReRAM) devices with Au/CuxO/p+-Si structures were fabricated, and the ReRAM properties appeared in CuO-based devices, while Cu2O ReRAM devices did not exhibit resistive switching behavior. The CuO ReRAM device annealed at 500 °C showed the best properties, with a on/off ratio of 8 × 102, good switching endurance of ∼100 cycles, data retention for 104s, and stable uniformity in the cumulative probability distribution. This characteristic change could be explained by the difference in the grain size and density of defects between the Cu2O and CuO films. These results demonstrate that superior and stable resistive switching properties of RF-sputtered CuxO films can be obtained by low-temperature RTA.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

Progress, Challenges, and Opportunities in Oxide Semiconductor Devices: A Key Building Block for Applications Ranging from Display Backplanes to 3D Integrated Semiconductor Chips

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low-temperature processibility with conventional complementary-metal-oxide-semiconductor-compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high-end liquid crystal display devices and has now become a standard backplane electronic for organic light-emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next-generation electronics such as back-end-of-line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short-channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next-generation electronics are discussed.

Ambipolar operation of progressively designed symmetric bidirectional transistors fabricated using single-channel vertical transistor and electrochemically prepared copper oxide

In this study, a symmetric bidirectional transistors (SBT) is proposed. The device simultaneously implements the "strong-inversion" and "accumulation" mechanisms of a metal-oxide semiconductor field-effect transistor and TFT, respectively, in different bias directions in a single-channel vertical transistor (V-Tr). This ideal SBT device is designed and fabricated by selecting appropriate materials exhibiting a narrow bandgap and intrinsic characteristics of Sb-doped p-type Cu2O, using a V-Tr to optimize the device structure for high-field-induced short-channel and ambipolar operation, and implementing facile electrochemical deposition for channel and plasma channel treatments. To adopt artificial conductivity control for producing the transporting path of minority electron carriers, the patterned-channel-layer sidewall is locally treated using oxygen plasma, thereby suppressing the minority-carrier self-compensation. The SBT device exhibits an excellent on-current (i.e., symmetric accumulation and strong inversion modes in the p- and n-type channel regions, respectively) and excellent midregion off-current, similar to those of ideal ambipolar transistors. Moreover, owing to multilevel signals and excellent inverter behaviors, the SBT device is suitable for application in complementary-metal-oxide-semiconductors and logic memories.

Effects of Post-UV/Ozone Treatment on Electrical Characteristics of Solution-Processed Copper Oxide Thin-Film Transistors

To realize oxide semiconductor-based complementary circuits and better transparent display applications, the electrical properties of p-type oxide semiconductors and the performance improvement of p-type oxide thin-film transistors (TFTs) are required. In this study, we report the effects of post-UV/ozone (O₃) treatment on the structural and electrical characteristics of copper oxide (CuO) semiconductor films and the TFT performance. The CuO semiconductor films were fabricated using copper (II) acetate hydrate as a precursor material to solution processing and the UV/O₃ treatment was performed as a post-treatment after the CuO film was fabricated. During the post-UV/O₃ treatment for up to 13 min, the solution-processed CuO films exhibited no meaningful change in the surface morphology. On the other hand, analysis of the Raman and X-ray photoemission spectra of solution-processed CuO films revealed that the post-UV/O₃ treatment induced compressive stress in the film and increased the composition concentration of Cu-O lattice bonding. In the post-UV/O₃-treated CuO semiconductor layer, the Hall mobility increased significantly to approximately 280 cm² V^-1 s^-1, and the conductivity increased to approximately 4.57 × 10^-2 Ω^-1 cm^-1. Post-UV/O₃-treated CuO TFTs also showed improved electrical properties compared to those of untreated CuO TFTs. The field-effect mobility of the post-UV/O₃-treated CuO TFT increased to approximately 6.61 × 10^-3 cm^-2 V^-1 s^-1, and the on-off current ratio increased to approximately 3.51 × 10³. These improvements in the electrical characteristics of CuO films and CuO TFTs can be understood through the suppression of weak bonding and structural defects between Cu and O bonds after post-UV/O₃ treatment. The result demonstrates that the post-UV/O₃ treatment can be a viable method to improve the performance of p-type oxide TFTs.

Polarization-Tunable Perovskite Light-Emitting Metatransistor

Emerging immersive visual communication technologies require light sources with complex functionality for dynamic control of polarization, directivity, wavefront, spectrum, and intensity of light. Currently, this is mostly achieved by free space bulk optic elements, limiting the adoption of these technologies. Flat optics based on artificially structured metasurfaces that operate at the sub-wavelength scale are a viable solution, however, their integration into electrically driven devices remains challenging. Here, a radically new approach to monolithic integration of a dielectric metasurface into a perovskite light-emitting transistor is demonstrated. It is shown that nanogratings directly structured on top of the transistor channel yield an 8-fold increase of electroluminescence intensity and dynamic tunability of polarization. This new light-emitting metatransistor device concept opens unlimited opportunities for light management strategies based on metasurface design and integration.

Research Progress of p-Type Oxide Thin-Film Transistors

The development of transparent electronics has advanced metal–oxide–semiconductor Thin-Film transistor (TFT) technology. In the field of flat-panel displays, as basic units, TFTs play an important role in achieving high speed, brightness, and screen contrast ratio to display information by controlling liquid crystal pixel dots. Oxide TFTs have gradually replaced silicon-based TFTs owing to their field-effect mobility, stability, and responsiveness. In the market, n-type oxide TFTs have been widely used, and their preparation methods have been gradually refined; however, p-Type oxide TFTs with the same properties are difficult to obtain. Fabricating p-Type oxide TFTs with the same performance as n-type oxide TFTs can ensure more energy-efficient complementary electronics and better transparent display applications. This paper summarizes the basic understanding of the structure and performance of the p-Type oxide TFTs, expounding the research progress and challenges of oxide transistors. The microstructures of the three types of p-Type oxides and significant efforts to improve the performance of oxide TFTs are highlighted. Finally, the latest progress and prospects of oxide TFTs based on p-Type oxide semiconductors and other p-Type semiconductor electronic devices are discussed.

Progressive p-channel vertical transistors fabricated using electrodeposited copper oxide designed with grain boundary tunability

A strategically designed electrodeposition method is proposed for the coating of p-type copper(i) oxide (Cu2O) channels for oxide thin film transistors. To date, conventional p-type oxide semiconductors have revealed a poor mobility and stability and this has obstructed the development of all oxide based logic devices. Furthermore, previous studies on p-type oxide transistors have been limited by the use of a typical planar type configuration. Our Cu2O electrodeposition method designed by incorporating Sb element promotes vertical alignment of the grain boundaries (GBs) and it perfectly coincides with the charge transport direction from the source to the drain in the vertical field effect transistors. These vertically aligned GBs are bundle type GBs and are likely to be ideal for vertical transistors with supreme electrical performances owing to the structurally suppressed grain boundary charge scattering. This alignment of the GBs in the electrodeposited Sb doped Cu2O (Sb:Cu2O) also demonstrates a superior vertical taper profile with conventional wet chemical etching owing to the extremely preferential etching rate along the GBs. Surprisingly, the sidewall formation, with a smooth and steep morphology causes the formation of abrupt and non-defective gate insulator/channel interfaces for superior spacer-free vertical transistors. Consequently, the Cu2O vertical field effect transistors exhibit extraordinary transistor performances of Vth = 0.4 V, μFE = 8 cm2 V-1 s-1, subthreshold swing = 0.24 V dec-1, on/off current ratio = 2 × 108 and qualified electrical and long-term stability characteristics under various environments. To the best of our knowledge, this is the first reported study on an electrodeposited method to design troublesome p-type oxide Cu2O as novel vertical transistors. Finally, power efficient logic inverter circuits with unprecedented performances, such as good noise margins, remarkable gain values of 15.6 (2 VDD) and 62.7 (5 VDD), and high frequency operation up to 10 kHz, are demonstrated using these p-type Cu2O transistors by interconnecting n-type IGZO transistors.

Wide Bandgap Oxide Semiconductors: from Materials Physics to Optoelectronic Devices

Wide bandgap oxide semiconductors constitute a unique class of materials that combine properties of electrical conductivity and optical transparency. They are being widely used as key materials in optoelectronic device applications, including flat-panel displays, solar cells, OLED, and emerging flexible and transparent electronics. In this article, an up-to-date review on both the fundamental understanding of materials physics of oxide semiconductors, and recent research progress on design of new materials and high-performing thin film transistor (TFT) devices in the context of fundamental understanding is presented. In particular, an in depth overview is first provided on current understanding of the electronic structures, defect and doping chemistry, optical and transport properties of oxide semiconductors, which provide essential guiding principles for new material design and device optimization. With these principles, recent advances in design of p-type oxide semiconductors, new approaches for achieving cost-effective transparent (flexible) electrodes, and the creation of high mobility 2D electron gas (2DEG) at oxide surfaces and interfaces with a wealth of fascinating physical properties of great potential for novel device design are then reviewed. Finally, recent progress and perspective of oxide TFT based on new oxide semiconductors, 2DEG, and low-temperature solution processed oxide semiconductor for flexible electronics will be reviewed.

Performance Improvement in single-gate organic transistors with contacts at top and bottom: Additional p + region insertion near source and drain

This research explores performance attributes of bottom gate top contact (BGTC) and bottom gate bottom contact (BGBC) organic thin film transistors (OTFT). To upgrade the performance characteristics, a region of 5nm with high concentration of carrier is tallied neighboring contacts. The drain current for BGTC is –18.6μ A as compared to –5.1μ A of BGBC transistor. Also, it is established that the innate attributes of BGTC are better than those of their counterparts, which is typically considered because of the inadequate contact attributes and mediocre semiconductor quality of BGBC OTFT. The analysis showed that upon varying the length of the channel ranging from 5μm to 40μm, there was a significant change in the drain current of BGTC and BGBC devices. For the same values of V GS and V DS (0V to –5V) where drain current in BGTC structure varied from –129.86μ A to –13.69μ A, whereas for their counterparts it ranged from –37.10μ A to –3.76μ A for channel length equal to 5μ m and 40μ m respectively. Also, with the varying doping strength ranging from 1012 cm–3 to 1016 cm–3 for BGBC device, drain current varied from –2.15μ A to –18.52μ A for BGTC whereas for BGBC it varied from –0.19μ A to –7.09μ A keeping V GS and V DS –5 V, yielding that upon varying the doping strength, where for BGTC I D changed by a factor of 8.6, the BGBC device showed a considerable change by a factor of 37.3. Likewise, mobility, threshold voltage, sub-threshold swing and transconductance also showing better performance with the P + insertion. These variations in the innate attributes are primarily due to the deficiency of carriers at the interface of source and channel, leading to a greater drop in the potential, which is more prominent for the bottom gate bottom contact devices.

Hybrid Thin-Film Materials Combinations for Complementary Integration Circuit Implementation

Beyond conventional silicon, emerging semiconductor materials have been actively investigated for the development of integrated circuits (ICs). Considerable effort has been put into implementing complementary circuits using non-silicon emerging materials, such as organic semiconductors, carbon nanotubes, metal oxides, transition metal dichalcogenides, and perovskites. Whereas shortcomings of each candidate semiconductor limit the development of complementary ICs, an approach of hybrid materials is considered as a new solution to the complementary integration process. This article revisits recent advances in hybrid-material combination-based complementary circuits. This review summarizes the strong and weak points of the respective candidates, focusing on their complementary circuit integrations. We also discuss the opportunities and challenges presented by the prospect of hybrid integration.

Effects of Iodine Doping on Electrical Characteristics of Solution-Processed Copper Oxide Thin-Film Transistors

In order to implement oxide semiconductor-based complementary circuits, the improvement of the electrical properties of p-type oxide semiconductors and the performance of p-type oxide TFTs is certainly required. In this study, we report the effects of iodine doping on the structural and electrical characteristics of copper oxide (CuO) semiconductor films and the TFT performance. The CuO semiconductor films were fabricated using copper(II) acetate hydrate as a precursor to solution processing, and iodine doping was performed using vapor sublimated from solid iodine. Doped iodine penetrated the CuO film through grain boundaries, thereby inducing tensile stress in the film and increasing the film’s thickness. Iodine doping contributed to the improvement of the electrical properties of the solution-processed CuO semiconductor including increases in Hall mobility and hole-carrier concentration and a decrease in electrical resistivity. The CuO TFTs exhibited a conduction channel formation by holes, that is, p-type operation characteristics, and the TFT performance improved after iodine doping. Iodine doping was also found to be effective in reducing the counterclockwise hysteresis in the transfer characteristics of CuO TFTs. These results are explained by physicochemical reactions in which iodine replaces oxygen vacancies and oxygen atoms through the formation of iodide anions in CuO.

Modulation of the Al/Cu2O Schottky Barrier Height for p-Type Oxide TFTs Using a Polyethylenimine Interlayer

We introduced an organic interlayer into the Schottky contact interface to control the contact property. After inserting an 11-nm-thick polyethylenimine (PEI) interlayer between the aluminum (Al) source/drain electrode and the cuprous oxide (Cu₂O) channel layer, the Cu₂O thin-film transistors (TFTs) exhibited improved electrical characteristics compared with Cu₂O TFTs without a PEI interlayer; the field-effect mobility improved from 0.02 to 0.12 cm²/V s, the subthreshold swing decreased from 14.82 to 7.34 V/dec, and the on/off current ratio increased from 2.43 × 10² to 1.47 × 10³, respectively. Careful investigation of the contact interface between the source/drain electrode and the channel layer established that the performance improvements were caused by the formation of electric dipoles in the PEI interlayer. These electric dipoles reduced the Schottky barrier height by neutralizing the charges at the metal/oxide semiconductor interface, and the holes passed the reduced Schottky barrier by means of tunneling or thermionic injection. In this way, p-type oxide TFTs, which generally need a noble metal having a high work function as an electrode, were demonstrated with a low-work-function metal. As a basic application for logic circuits, a complementary inverter based on n-type indium-gallium-zinc oxide and p-type Cu₂O TFTs was fabricated using only Al source/drain electrodes. This research achieved advances in low-cost circuit design by broadening the electrode metals available for the manufacture of p-type oxide semiconductor-based electronics.

High Performance of Solution-Processed Amorphous p-Channel Copper-Tin-Sulfur-Gallium Oxide Thin-Film Transistors by UV/O3 Photocuring

The development of p-type metal-oxide semiconductors (MOSs) is of increasing interest for applications in next-generation optoelectronic devices, display backplane, and low-power-consumption complementary MOS circuits. Here, we report the high performance of solution-processed, p-channel copper-tin-sulfide-gallium oxide (CTSGO) thin-film transistors (TFTs) using UV/O₃ exposure. Hall effect measurement confirmed the p-type conduction of CTSGO with Hall mobility of 6.02 ± 0.50 cm² V^-1 s^-1. The p-channel CTSGO TFT using UV/O₃ treatment exhibited the field-effect mobility (μ_FE) of 1.75 ± 0.15 cm² V^-1 s^-1 and an on/off current ratio (I_ON/I_OFF) of ∼10⁴ at a low operating voltage of -5 V. The significant enhancement in the device performance is due to the good p-type CTSGO material, smooth surface morphology, and fewer interfacial traps between the semiconductor and the Al₂O₃ gate insulator. Therefore, the p-channel CTSGO TFT can be applied for CMOS MOS TFT circuits for next-generation display.