High-Speed Nanoscale Ferroelectric Tunnel Junction for Multilevel Memory and Neural Network Computing

Pure ZrO2 Ferroelectric Thin Film for Nonvolatile Memory and Neural Network Computing

The recent discovery of ferroelectricity in pure ZrO2 has drawn much attention, but the information storage and processing performances of ferroelectric ZrO2-based nonvolatile devices remain open for further exploration. Here, a ZrO2 (∼8 nm)-based ferroelectric capacitor using RuO2 oxide electrodes is fabricated, and the ferroelectric orthorhombic phase evolution under electric field cycling is studied. A ferroelectric remnant polarization (2Pr) of >30 μC/cm2, leakage current density of ∼2.79 × 10-8 A/cm2 at 1 MV/cm, and estimated polarization retention of >10 years are achieved. When the ferroelectric capacitor is connected with a transistor, a memory window of ∼0.8 V and eight distinct states can be obtained in such a ferroelectric field-effect transistor (FeFET). Through the conductance manipulation of the FeFET, a high object image recognition accuracy of ∼93.32% is achieved on the basis of the CIFAR-10 dataset in the convolutional neural network (CNN) simulation, which is close to the result of ∼94.20% obtained by floating-point-based CNN software. These results demonstrate the potential of ferroelectric ZrO2 devices for nonvolatile memory and artificial neural network computing.

Silicon-Compatible Ferroelectric Tunnel Junctions with a SiO2/Hf0.5Zr0.5O2 Composite Barrier as Low-Voltage and Ultra-High-Speed Memristors

The big data era requires ultrafast, low-power, and silicon-compatible materials and devices for information storage and processing. Here, ferroelectric tunnel junctions (FTJs) based on SiO2/Hf0.5Zr0.5O2 composite barrier and both conducting electrodes are designed and fabricated on Si substrates. The FTJ achieves the fastest write speed of 500 ps under 5 V (2 orders of magnitude faster than reported silicon-compatible FTJs) or 10 ns speed at a low voltage of 1.5 V (the lowest voltage among FTJs at similar speeds), low write current density of 1.3 × 104 A cm-2, 8 discrete states, good retention > 105 s at 85 °C, and endurance > 107. In addition, it provides a large read current (88 A cm-2) at 0.1 V, 2 orders of magnitude larger than reported FTJs. Interestingly, in FTJ-based synapses, gradually tunable conductance states (128 states) with high linearity (<1) are obtained by 10 ns pulses of <1.2 V, and a high accuracy of 91.8% in recognizing fashion product images is achieved by online neural network simulations. These results highlight that silicon-compatible HfO2-based FTJs are promising for high-performance nonvolatile memories and electrical synapses.

Giant Electroresistance in Ferroelectric Tunnel Junctions via High-Throughput Designs: Toward High-Performance Neuromorphic Computing

Ferroelectric tunnel junctions (FTJs) have been regarded as one of the most promising candidates for next-generation devices for data storage and neuromorphic computing owing to their advantages such as fast operation speed, low energy consumption, convenient 3D stack ability, etc. Here, dramatically different from the conventional engineering approaches, we have developed a tunnel barrier decoration strategy to improve the ON/OFF ratio, where the ultrathin SrTiO3 (STO) dielectric layers are periodically mounted onto the BaTiO3 (BTO) ferroelectric tunnel layer using the high-throughput technique. The inserted STO enhances the local tetragonality of the BTO, resulting in a strengthened ferroelectricity in the tunnel layer, which greatly improves the OFF state and reduces the ON state. Combined with the optimized oxygen migration, which can further manipulate the tunneling barrier, a record-high ON/OFF ratio of ∼108 has been achieved. Furthermore, utilizing these FTJ-based artificial synapses, an artificial neural network has been simulated via back-propagation algorithms, and a classification accuracy as high as 92% has been achieved. This study screens out the prominent FTJ by the high-throughput technique, advancing the tunnel layer decoration at the atomic level in the FTJ design and offering a fundamental understanding of the multimechanisms in the tunnel barrier.

Ferroelectric Transistors for Memory and Neuromorphic Device Applications

Ferroelectric materials have been intensively investigated for high-performance nonvolatile memory devices in the past decades, owing to their nonvolatile polarization characteristics. Ferroelectric memory devices are expected to exhibit lower power consumption and higher speed than conventional memory devices. However, non-complementary metal-oxide-semiconductor (CMOS) compatibility and degradation due to fatigue of traditional perovskite-based ferroelectric materials have hindered the development of high-density and high-performance ferroelectric memories in the past. The recently developed hafnia-based ferroelectric materials have attracted immense attention in the development of advanced semiconductor devices. Because hafnia is typically used in CMOS processes, it can be directly incorporated into current semiconductor technologies. Additionally, hafnia-based ferroelectrics show high scalability and large coercive fields that are advantageous for high-density memory devices. This review summarizes the recent developments in ferroelectric devices, especially ferroelectric transistors, for next-generation memory and neuromorphic applications. First, the types of ferroelectric memories and their operation mechanisms are reviewed. Then, issues limiting the realization of high-performance ferroelectric transistors and possible solutions are discussed. The experimental demonstration of ferroelectric transistor arrays, including 3D ferroelectric NAND and its operation characteristics, are also reviewed. Finally, challenges and strategies toward the development of next-generation memory and neuromorphic applications based on ferroelectric transistors are outlined.