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Yoo C, Hartanto J, Saini B, Tsai W, Thampy V, Niavol SS, Meng AC, McIntyre PC. Atomic Layer Deposition of WO 3-Doped In 2O 3 for Reliable and Scalable BEOL-Compatible Transistors. NANO LETTERS 2024; 24:5737-5745. [PMID: 38686670 DOI: 10.1021/acs.nanolett.4c00746] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 05/02/2024]
Abstract
Tungsten oxide (WO3) doped indium oxide (IWO) field-effect transistors (FET), synthesized using atomic layer deposition (ALD) for three-dimensional integration and back-end-of-line (BEOL) compatibility, are demonstrated. Low-concentration (1∼4 W atom %) WO3-doping in In2O3 films is achieved by adjusting cycle ratios of the indium and tungsten precursors with the oxidant coreactant. Such doping suppresses oxygen deficiency from In2O2.5 to In2O3 stoichiometry with only 1 atom % W, allowing devices to turn off stably and enhancing threshold voltage stability. The ALD IWO FETs exhibit superior performance, including a low subthreshold slope of 67 mV/decade and negligible hysteresis. Strong tunability of the threshold voltage (Vth) is achieved through W concentration tuning, with 2 atom % IWO FETs showing an optimized Vth for enhancement-mode and a high drain current. ALD IWO FETs have remarkable stability under bias stress and nearly ideal performance extending to sub-100 nm channel lengths, making them promising candidates for high-performance monolithic 3D integrated devices.
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Affiliation(s)
- Chanyoung Yoo
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, United States
- SLAC National Accelerator Laboratory, Menlo Park, California 94025, United States
- Department of Materials Science and Engineering, Hongik University, Seoul 04066, Republic of Korea
| | - Jonathan Hartanto
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, United States
| | - Balreen Saini
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, United States
| | - Wilman Tsai
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, United States
| | - Vivek Thampy
- SLAC National Accelerator Laboratory, Menlo Park, California 94025, United States
| | - Somayeh Saadat Niavol
- Department of Physics and Astronomy, University of Missouri, Columbia, Missouri 65211, United States
| | - Andrew C Meng
- Department of Physics and Astronomy, University of Missouri, Columbia, Missouri 65211, United States
| | - Paul C McIntyre
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, United States
- SLAC National Accelerator Laboratory, Menlo Park, California 94025, United States
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Zhang H, Moon SK. Reviews on Machine Learning Approaches for Process Optimization in Noncontact Direct Ink Writing. ACS APPLIED MATERIALS & INTERFACES 2021; 13:53323-53345. [PMID: 34042439 DOI: 10.1021/acsami.1c04544] [Citation(s) in RCA: 4] [Impact Index Per Article: 1.3] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/12/2023]
Abstract
Recently, machine learning has gained considerable attention in noncontact direct ink writing because of its novel process modeling and optimization techniques. Unlike conventional fabrication approaches, noncontact direct ink writing is an emerging 3D printing technology for directly fabricating low-cost and customized device applications. Despite possessing many advantages, the achieved electrical performance of produced microelectronics is still limited by the printing quality of the noncontact ink writing process. Therefore, there has been increasing interest in the machine learning for process optimization in the noncontact direct ink writing. Compared with traditional approaches, despite machine learning-based strategies having great potential for efficient process optimization, they are still limited to optimize a specific aspect of the printing process in the noncontact direct ink writing. Therefore, a systematic process optimization approach that integrates the advantages of state-of-the-art machine learning techniques is in demand to fully optimize the overall printing quality. In this paper, we systematically discuss the printing principles, key influencing factors, and main limitations of the noncontact direct ink writing technologies based on inkjet printing (IJP) and aerosol jet printing (AJP). The requirements for process optimization of the noncontact direct ink writing are classified into four main aspects. Then, traditional methods and the state-of-the-art machine learning-based strategies adopted in IJP and AJP for process optimization are reviewed and compared with pros and cons. Finally, to further develop a systematic machine learning approach for the process optimization, we highlight the major limitations, challenges, and future directions of the current machine learning applications.
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Affiliation(s)
- Haining Zhang
- Faculty of Mechanical and Electrical Engineering, Kunming University of Science and Technology, Kunming 650500, China
- School of Mechanical and Aerospace Engineering, Nanyang Technological University, Singapore 639798, Singapore
| | - Seung Ki Moon
- School of Mechanical and Aerospace Engineering, Nanyang Technological University, Singapore 639798, Singapore
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Sun Q, Gao T, Li X, Li W, Li X, Sakamoto K, Wang Y, Li L, Kanehara M, Liu C, Pang X, Liu X, Zhao J, Minari T. Layer-By-Layer Printing Strategy for High-Performance Flexible Electronic Devices with Low-Temperature Catalyzed Solution-Processed SiO 2. SMALL METHODS 2021; 5:e2100263. [PMID: 34927859 DOI: 10.1002/smtd.202100263] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 03/09/2021] [Revised: 04/16/2021] [Indexed: 06/14/2023]
Abstract
Additive printing techniques have been widely investigated for fabricating multilayered electronic devices. In this work, a layer-by-layer printing strategy is developed to fabricate multilayered electronics including 3D conductive circuits and thin-film transistors (TFTs) with low-temperature catalyzed, solution-processed SiO2 (LCSS) as the dielectric. Ultrafine, ultrasmooth LCSS films can be facilely formed at 90 °C on a wide variety of organic and inorganic substrates, offering a versatile platform to construct complex heterojunction structures with layer-by-layer fashion at microscale. The high-resolution 3D conductive circuits formed with gold nanoparticles inside the LCSS dielectric demonstrate a high-speed response to the transient voltage in less than 1 µs. The TFTs with semiconducting single-wall carbon nanotubes can be operated with the accumulation mode at a low voltage of 1 V and exhibit average field-effect mobility of 70 cm2 V-1 s-1 , on/off ratio of 107 , small average hysteresis of 0.1 V, and high yield up to 100% as well as long-term stability, high negative-gate bias stability, and good mechanical stability. Therefore, the layer-by-layer printing strategy with the LCSS film is promising to assemble large-scale, high-resolution, and high-performance flexible electronics and to provide a fundamental understanding for correlating dielectric properties with device performance.
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Affiliation(s)
- Qingqing Sun
- School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
| | - Tianqi Gao
- Printable Electronics Research Centre, Suzhou Institute of Nanotech and Nano-bionics, Chinese Academy of Sciences, Suzhou, 215123, P. R. China
| | - Xiaomeng Li
- School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China
| | - Wanli Li
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
| | - Xiaoqian Li
- School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China
| | - Kenji Sakamoto
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
| | - Yong Wang
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
| | - Lingying Li
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
| | | | - Chuan Liu
- Lab of Display Material and Technology School of Electronics and Information Technology, Sun Yat-Sen University, Guangdong, 510275, P. R. China
| | - Xinchang Pang
- School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China
| | - Xuying Liu
- School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China
| | - Jianwen Zhao
- Printable Electronics Research Centre, Suzhou Institute of Nanotech and Nano-bionics, Chinese Academy of Sciences, Suzhou, 215123, P. R. China
| | - Takeo Minari
- Printed Electronics Group, Research Center for Functional Materials, National Institute for Materials Science (NIMS), Tsukuba, Ibaraki, 305-0044, Japan
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Choi S, Kim KT, Park SK, Kim YH. High-Mobility Inkjet-Printed Indium-Gallium-Zinc-Oxide Thin-Film Transistors Using Sr-Doped Al₂O₃ Gate Dielectric. MATERIALS 2019; 12:ma12060852. [PMID: 30871272 PMCID: PMC6472027 DOI: 10.3390/ma12060852] [Citation(s) in RCA: 8] [Impact Index Per Article: 1.6] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 02/08/2019] [Revised: 03/06/2019] [Accepted: 03/12/2019] [Indexed: 11/19/2022]
Abstract
In this paper, we demonstrate high-mobility inkjet-printed indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) using a solution-processed Sr-doped Al2O3 (SAO) gate dielectric. Particularly, to enhance to the electrical properties of inkjet-printed IGZO TFTs, a linear-type printing pattern was adopted for printing the IGZO channel layer. Compared to dot array printing patterns (4 × 4 and 5 × 5 dot arrays), the linear-type pattern resulted in the formation of a relatively thin and uniform IGZO channel layer. Also, to improve the subthreshold characteristics and low-voltage operation of the device, a high-k and thin (~10 nm) SAO film was used as the gate dielectric layer. Compared to the devices with SiO2 gate dielectric, the inkjet-printed IGZO TFTs with SAO gate dielectric exhibited substantially high field-effect mobility (30.7 cm2/Vs). Moreover, the subthreshold slope and total trap density of states were also significantly reduced to 0.14 V/decade and 8.4 × 1011/cm2·eV, respectively.
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Affiliation(s)
- Seungbeom Choi
- SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon 16419, Korea.
| | - Kyung-Tae Kim
- School of Electrical and Electronic Engineering, Chung-Ang University, Seoul 06974, Korea.
| | - Sung Kyu Park
- School of Electrical and Electronic Engineering, Chung-Ang University, Seoul 06974, Korea.
| | - Yong-Hoon Kim
- SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon 16419, Korea.
- School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon 16419, Korea.
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