Electroplate and lift lithography for patterned micro/nanowires using ultrananocrystalline diamond (UNCD) as a reusable template

Graphene-on-diamond devices with increased current-carrying capacity: carbon sp2-on-sp3 technology

Graphene demonstrated potential for practical applications owing to its excellent electronic and thermal properties. Typical graphene field-effect transistors and interconnects built on conventional SiO(2)/Si substrates reveal the breakdown current density on the order of 1 μA/nm(2) (i.e., 10(8) A/cm(2)), which is ~100× larger than the fundamental limit for the metals but still smaller than the maximum achieved in carbon nanotubes. We show that by replacing SiO(2) with synthetic diamond, one can substantially increase the current-carrying capacity of graphene to as high as ~18 μA/nm(2) even at ambient conditions. Our results indicate that graphene's current-induced breakdown is thermally activated. We also found that the current carrying capacity of graphene can be improved not only on the single-crystal diamond substrates but also on an inexpensive ultrananocrystalline diamond, which can be produced in a process compatible with a conventional Si technology. The latter was attributed to the decreased thermal resistance of the ultrananocrystalline diamond layer at elevated temperatures. The obtained results are important for graphene's applications in high-frequency transistors, interconnects, and transparent electrodes and can lead to the new planar sp(2)-on-sp(3) carbon-on-carbon technology.