Top-gate ZnO nanowire transistors and integrated circuits with ultrathin self-assembled monolayer gate dielectric

Incorporating Hydrophobic Moieties into Self-Assembled Monolayers to Enable Electrochemical Aptamer-Based Sensors Deployed Directly in a Complex Matrix

Continuous real-time measurement of specific targets in complex biological samples is of great significance for early diagnosis and treatment of diseases and thus enables achievement of personalized medicine. Electrochemical aptamer-based (E-AB) sensors are good candidates to fill this role due to their high specificity, sensitivity, rapid detection, and simple preparation. However, this sensor class suffers from severe baseline drift in the complex matrix probably due to the nonspecific adsorption of components. Here, we introduce a series of self-assembled monolayers with a variety of hydrophobic functional groups into an E-AB sensor platform, achieving enhancement of the antifouling performance and thus the detection performance (e.g., stability, sensitivity, and specificity). We reveal that the antifouling performance enhanced by such hydrophobic SAMs is probably due to its instant adsorption of components onto the surface, rather than the repelling of these components by hydrophilic SAMs in previous reports.

Effects of Ambience on Thermal-Diffusion Type Ga-doping Process for ZnO Nanoparticles

Various annealing atmospheres were employed during our unique thermal-diffusion type Ga-doping process to investigate the surface, structural, optical, and electrical properties of Ga-doped zinc oxide (ZnO) nanoparticle (NP) layers. ZnO NPs were synthesized using an arc-discharge-mediated gas evaporation method, followed by Ga-doping under open-air, N2, O2, wet, and dry air atmospheric conditions at 800 °C to obtain the low resistive spray-coated NP layers. The I–V results revealed that the Ga-doped ZnO NP layer successfully reduced the sheet resistance in the open air (8.0 × 102 Ω/sq) and wet air atmosphere (8.8 × 102 Ω/sq) compared with un-doped ZnO (4.6 × 106 Ω/sq). Humidity plays a key role in the successful improvement of sheet resistance during Ga-doping. X-ray diffraction patterns demonstrated hexagonal wurtzite structures with increased crystallite sizes of 103 nm and 88 nm after doping in open air and wet air atmospheres, respectively. The red-shift of UV intensity indicates successful Ga-doping, and the atmospheric effects were confirmed through the analysis of the defect spectrum. Improved electrical conductivity was also confirmed using the thin-film-transistor-based structure. The current controllability by applying the gate electric-field was also confirmed, indicating the possibility of transistor channel application using the obtained ZnO NP layers.

Self-Assembled Monolayers: Versatile Uses in Electronic Devices from Gate Dielectrics, Dopants, and Biosensing Linkers

Self-assembled monolayers (SAMs), molecular structures consisting of assemblies formed in an ordered monolayer domain, are revisited to introduce their various functions in electronic devices. SAMs have been used as ultrathin gate dielectric layers in low-voltage transistors owing to their molecularly thin nature. In addition to the contribution of SAMs as gate dielectric layers, SAMs contribute to the transistor as a semiconducting active layer. Beyond the transistor components, SAMs have recently been applied in other electronic applications, including as remote doping materials and molecular linkers to anchor target biomarkers. This review comprehensively covers SAM-based electronic devices, focusing on the various applications that utilize the physical and chemical properties of SAMs.

High-mobility In and Ga co-doped ZnO nanowires for high-performance transistors and ultraviolet photodetectors

Due to their unique properties, ZnO nanostructures have received considerable attention for application in electronics and optoelectronics; however, intrinsic ZnO nanomaterials usually suffer from large concentrations of lattice defects, such as oxygen vacancies, which restricts their material performance. Here, for the first time, highly-crystalline In and Ga co-doped ZnO nanowires (NWs) are achieved by ambient-pressure chemical vapor deposition. In contrast to conventional elemental doping, this In and Ga co-doping can not only enhance the carrier concentration, but also suppresses the formation of oxygen vacancies within the host lattice of ZnO NWs. Importantly, this co-doping is also believed to effectively minimize the generation of lattice strain defects due to the optimal ionic sizes of both In and Ga dopants. When configured into field-effect transistors (FETs), these co-doped NWs exhibit an enhanced average electron mobility of 315 cm² V^-1 s^-1 and an impressive on/off current ratio of 1.87 × 10⁸, which are already higher than those of other previously reported ZnO NW devices. In addition, these NW devices demonstrate efficient ultraviolet photodetection at under 261 nm irradiation with an improved responsivity of 1.41 × 10⁷ A W^-1, an excellent EQE of up to 6.72 × 10⁹ and a fast response time down to 0.32 s. Highly-ordered NW parallel array thin-film transistors and photodetectors are also constructed to demonstrate the promising potential of the NWs for high-performance device applications.

Planar Growth, Integration, and Applications of Semiconducting Nanowires

Silicon and other inorganic semiconductor nanowires (NWs) have been extensively investigated in the last two decades for constructing high-performance nanoelectronics, sensors, and optoelectronics. For many of these applications, these tiny building blocks have to be integrated into the existing planar electronic platform, where precise location, orientation, and layout controls are indispensable. In the advent of More-than-Moore's era, there are also emerging demands for a programmable growth engineering of the geometry, composition, and line-shape of NWs on planar or out-of-plane 3D sidewall surfaces. Here, the critical technologies established for synthesis, transferring, and assembly of NWs upon planar surface are examined; then, the recent progress of in-plane growth of horizontal NWs directly upon crystalline or patterned substrates, constrained by using nanochannels, an epitaxial interface, or amorphous thin film precursors is discussed. Finally, the unique capabilities of planar growth of NWs in achieving precise guided growth control, programmable geometry, composition, and line-shape engineering are reviewed, followed by their latest device applications in building high-performance field-effect transistors, photodetectors, stretchable electronics, and 3D stacked-channel integration.

Photoluminescence Study of the Influence of Additive Ammonium Hydroxide in Hydrothermally Grown ZnO Nanowires

We report the influence of ammonium hydroxide (NH4OH), as growth additive, on zinc oxide nanomaterial through the optical response obtained by photoluminescence (PL). A low-temperature hydrothermal process is employed for the growth of ZnO nanowires (NWs) on seedless Au surface. A more than two order of magnitude change in ZnO NW density is demonstrated via careful addition of NH4OH in the growth solution. Further, we show by systematic experimental study and PL characterization data that the addition of NH4OH can degrade the optical response of ZnO NWs produced. The increase of growth solution basicity with the addition of NH4OH may slowly degrade the optical response of NWs by slowly etching its surfaces, increasing the point defects in ZnO NWs. The present study demonstrates the importance of growth nutrients to obtain quality controlled density tunable ZnO NWs on seedless conducting substrates.

Low-voltage and high-performance field-effect transistors based on ZnxSn1-xO nanofibers with a ZrOx dielectric

One-dimensional (1D) nanofibers have been considered to be important building blocks for nano-electronics due to their superior physical and chemical properties. In this report, high-performance zinc tin oxide (ZnSnO) nanofibers with various composition ratios were prepared by electrospinning. The surface morphology, crystallinity, grain size distribution, and chemical composition of the nanofibers were investigated. Meanwhile, field-effect transistors (FETs) based on ZnSnO nanofiber networks (NFNs) with various composition ratios were integrated and investigated. For optimized Zn0.3Sn0.7O NFNs FETs, the device based on an SiO2 dielectric exhibited a high electrical performance, including a high on/off current ratio (Ion/off) of 2 × 107 and a field-effect mobility (μFE) of 0.17 cm2 V-1 s-1. When a high-permittivity (κ) ZrOx thin film was employed as the dielectric in Zn0.3Sn0.7O NFNs FETs, the operating voltage was substantially reduced and a high μFE of 7.8 cm2 V-1 s-1 was achieved. These results indicate that the Zn0.3Sn0.7O NFNs/ZrOx FETs exhibit great potency in low-cost and low-voltage devices.

Realizing field-dependent conduction in ZnO nanowires without annealing

We report on the low-temperature fabrication of field-effect transistors by bridging pre-patterned electrodes using ZnO nanowires grown in situ, which operate without requiring post-growth processing or annealing. The devices show good performance using as-grown nanowires, with on-off ratios of 10⁵ and threshold voltages of 2 V. Electron microscopy shows the field-dependent nanowires hierarchically nucleate from larger ZnO nanorods, and both are oriented along a common c-axis. A high nanowire surface-to-volume ratio allows depleting electron traps on the nanowire surface to compensate intrinsic electron donors present throughout the nanowire bulk. This eliminates the need to reduce the electron concentration through high-temperature annealing, making the nanowires naturally field-dependent in their as-grown state.

Fabrication of high performance field-effect transistors and practical Schottky contacts using hydrothermal ZnO nanowires

The production of large quantities of single crystalline semiconducting ZnO nanowires (NWs) at low cost can offer practical solutions to realizing several novel electronic/optoelectronic and sensor applications on an industrial scale. The present work demonstrates high-density single crystalline NWs synthesized by a multiple cycle hydrothermal process at ∼100 °C. The high carrier concentration in such ZnO NWs is greatly suppressed by a simple low cost thermal annealing step in ambient air at ∼450 °C. Single ZnO NW FETs incorporating these modified NWs are characterized, revealing strong metal work function-dependent charge transport, unobtainable with as-grown hydrothermal ZnO NWs. Single ZnO NW FETs with Al as source and drain (s/d) contacts show excellent performance metrics, including low off-state currents (fA range), high on/off ratio (10(5)-10(7)), steep subthreshold slope (<600 mV/dec) and excellent field-effect carrier mobility (5-11 cm(2)/V-s). Modified ZnO NWs with platinum s/d contacts demonstrate excellent Schottky transport characteristics, markedly different from a reference ZnO NW device with Al contacts. This included abrupt reverse bias current-voltage saturation characteristics and positive temperature coefficient (∼0.18 eV to 0.13 eV). This work is envisaged to benefit many areas of hydrothermal ZnO NW research, such as NW FETs, piezoelectric energy recovery, piezotronics and Schottky diodes.

Improved photocatalytic activity in RuO2–ZnO nanoparticulate heterostructures due to inhomogeneous space charge effects

Vectorial charge separation! Inhomogeneous distribution of RuO₂ nanoparticles in RuO₂–ZnO nanocomposites favors vectorial charge separation of electron–hole pairs enhancing their photocatalytic properties.

Fabrication of field-effect transistors and functional nanogenerators using hydrothermally grown ZnO nanowires

We demonstrate single crystalline ZnO nanowire (NW) production using hydrothermal process. Single NW field-effect transistors (FETs) and functional piezoelectric nanogenerators (NGs) are demonstrated by thermal annealing of the NWs in air at ~450 °C.

Negative thermal quenching of photoluminescence in annealed ZnO–Al2O3 core–shell nanorods

Negative thermal quenching behavior of photoluminescence is observed in the annealed ZnO–Al₂O₃ core–shell nanorods, which is originated from the Al donor in ZnO induced through an annealing process.

High-performance ZnO nanowire transistors with aluminum top-gate electrodes and naturally formed hybrid self-assembled monolayer/AlO(x) gate dielectric

A method for the formation of a low-temperature hybrid gate dielectric for high-performance, top-gate ZnO nanowire transistors is reported. The hybrid gate dielectric consists of a self-assembled monolayer (SAM) and an aluminum oxide layer. The thin aluminum oxide layer forms naturally and spontaneously when the aluminum gate electrode is deposited by thermal evaporation onto the SAM-covered ZnO nanowire, and its formation is facilitated by the poor surface wetting of the aluminum on the hydrophobic SAM. The hybrid gate dielectric shows excellent electrical insulation and can sustain voltages up to 6 V. ZnO nanowire transistors utilizing the hybrid gate dielectric feature a large transconductance of 50 μS and large on-state currents of up to 200 μA at gate-source voltages of 3 V. The large on-state current is sufficient to drive organic light-emitting diodes with an active area of 6.7 mm(2) to a brightness of 445 cd/m(2). Inverters based on ZnO nanowire transistors and thin-film carbon load resistors operate with frequencies up to 30 MHz.

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

A ZnO nanowire-based photo-inverter with pulse-induced fast recovery

We demonstrate a fast response photo-inverter comprised of one transparent gated ZnO nanowire field-effect transistor (FET) and one opaque FET respectively as the driver and load. Under ultraviolet (UV) light the transfer curve of the transparent gate FET shifts to the negative side and so does the voltage transfer curve (VTC) of the inverter. After termination of UV exposure the recovery of photo-induced current takes a long time in general. This persistent photoconductivity (PPC) is due to hole trapping on the surface of ZnO NWs. Here, we used a positive voltage short pulse after UV exposure, for the first time resolving the PPC issue in nanowire-based photo-detectors by accumulating electrons at the ZnO/dielectric interface. We found that a pulse duration as small as 200 ns was sufficient to reach a full recovery to the dark state from the UV induced state, realizing a fast UV detector with a voltage output.

Printed, sub-2V ZnO electrolyte gated transistors and inverters on plastic

Printed, flexible sub-2 V ZnO electrolyte gated transistors (EGTs) are demonstrated. ZnO EGTs with high-capacitance ion-gel gate insulators are printed on a kapton substrate and the devices exhibit high electron mobility (1.61 cm(-2) V(-1) s(-1) ), low operation voltage (<2 V), and good electrical/mechanical stabilities.

Long single ZnO nanowire for logic and memory circuits: NOT, NAND, NOR gate, and SRAM

We demonstrate logic and static random access memory (SRAM) circuits using a 100 μm long and 100 nm thin single ZnO nanowire (NW), which acts as a channel of field-effect transistors (FETs) with Al2O3 dielectrics. NW FETs are thus arrayed in one dimension to consist of NOT, NAND, and NOR gate logic, and SRAM circuits. Two respective top-gate NW FETs with Au and indium-tin-oxide (ITO) were connected to form an inverter, the basic NOT gate component, since the former gate leads to an enhanced mode FET while the latter to depletion mode due to their work function difference. Our inverters showed a high voltage gain of 22 under a 5 V operational voltage, resulting in successful operation of all other devices. We thus conclude that our long single NW approach is quite promising to extend the field of nano-electronics.

High-mobility ZnO nanorod field-effect transistors by self-alignment and electrolyte-gating

High mobility, solution-processed field-effect transistors are important building blocks for flexible electronics. Here we demonstrate the alignment of semiconducting, colloidal ZnO nanorods by a simple solvent evaporation technique and achieve high electron mobilities in field-effect transistors at low operating voltages by electrolyte-gating with ionic liquids. The degree of alignment varies with nanorod length, concentration and solvent evaporation rate. We find a strong dependence of electron mobility on the degree of alignment but less on the length of the nanorods. Maximum field-effect mobilities reach up to 9 cm(2) V(-1) s(-1) for optimal alignment. Because of the low process temperature (150 °C), ZnO nanorod thin films are suitable for application on flexible polymer substrates.

Investigation of threshold voltage instability induced by gate bias stress in ZnO nanowire field effect transistors

We investigated the threshold voltage instability induced by gate bias (V(G)) stress in ZnO nanowire (NW) field effect transistors (FETs). By increasing the V(G) sweep ranges and repeatedly measuring the electrical characteristics of the ZnO NW FETs, the V(G) stress was produced in the dielectric layer underneath the ZnO NW. Consequently, the electrical conductance of the ZnO NW FETs decreased, and the threshold voltage shifted towards the positive V(G) direction. This threshold voltage instability induced by the V(G) stress is associated with the trapping of charges in the interface trap sites located in the ZnO NW-dielectric interface. Our study will be helpful for understanding the stability of ZnO NW FETs during repetitive operations.

Self-assembled monolayers made of 6-(5-((6-((5-hexylthiophen-2-yl)ethynyl)-9,10-bis(phenylethynyl)anthracen-2-yl)ethynyl)thiophen-2-yl)hexyl 3-(triethoxysilyl)propylcarbamate for ultrathin film transistors

A new functionalized triethoxysilane bearing an X-shaped, anthracene-based semiconducting molecule on one arm was designed and synthesized as a precursor for the preparation of a self-assembled monolayer (SAM) on a SiO(2) substrate. 3-Isocyanatopropyl triethoxysilane was reacted with a monohydroxyl-terminated X-shaped, anthracene-based semiconducting molecule in the presence of tin catalyst. The 6-(5-((6-((5-hexylthiophen-2-yl)ethynyl)-9,10-bis(phenylethynyl)anthracen-2-yl)ethynyl)thiophen-2-yl)hexyl 3-(triethoxysilyl)propylcarbamate (BATHT-TEOS) was found to be stable and sufficiently reactive to form organic monolayers on hydroxylated SiO(2) surfaces. The structures and properties of these SAMs were investigated using X-ray photoelectron spectroscopy, UV-vis absorption spectroscopy, photoluminescence (PL) spectroscopy, laser scanning confocal microscopy-PL spectrometry, and spectroscopic ellipsometry. In this work, BATHT-SAM was employed as an interfacial layer on SiO(2) to fabricate ultrathin film transistors (UTFTs, active layer thickness ∼ 16.09 nm). The device UTFT-I, made of 0.06 wt % 5,5'-(9,10-bis(phenylethynyl)anthracene-2,6-diyl)bis(ethyne-2,1-diyl)bis(2-hexylthiophene) (BATHT) solution on an n-octyltrichlorosilane-SAM/SiO(2) layer, showed no gate effect for the carrier transport behavior; however, the device UTFT-II, fabricated on BATHT-SAM/SiO(2), exhibited field effect mobilities of 0.04 cm(2) V(-1) s(-1) (I(on/off) ∼ 6.3 × 10(3) to 1.0 × 10(4)). This can be attributed to the effect of BATHT-SAM inducing uniform coverage and ordering of BATHT molecules as an upper layer.