Analog-digital hybrid computing with SnS2 memtransistor for low-powered sensor fusion

Integration of MoS2 Memtransistor Devices and Analogue Circuits for Sensor Fusion in Autonomous Vehicle Target Localization

In contemporary autonomous driving systems relying on sensor fusion, traditional digital processors encounter challenges associated with analogue-to-digital conversion and iterative vector-matrix operations, which are encumbered by limitations in terms of response time and energy consumption. In this study, we present an analogue Kalman filter circuit based on molybdenum disulfide (MoS2) memtransistor, designed to accelerate sensor fusion for precise localization in autonomous vehicle applications. The nonvolatile memory characteristics of the memtransistor allow for the storage of a fixed Kalman gain, which eliminates the data convergence and thus accelerates the processing speeds. Additionally, the modulation of multiple conductance states by the gate terminal enables fast adaptability to diverse autonomous driving scenarios by tuning multiple Kalman filter gains. Our proposed analogue Kalman filter circuit accurately estimates the position coordinates of target vehicles by fusing sensor data from light detection and ranging (LiDAR), millimeter-wave radar (Radar), and camera, and it successfully solves real-word problems in a signal-free crossroad intersection. Notably, our system achieves a 1000-fold improvement in energy efficiency compared to that of digital circuits. This work underscores the viability of a memtransistor for achieving fast, energy-efficient real-time sensing, and continuous signal processing in advanced sensor fusion technology.

Ferroelectric 2D SnS2 Analog Synaptic FET

In this study, the development and characterization of 2D ferroelectric field-effect transistor (2D FeFET) devices are presented, utilizing nanoscale ferroelectric HfZrO2 (HZO) and 2D semiconductors. The fabricated device demonstrated multi-level data storage capabilities. It successfully emulated essential biological characteristics, including excitatory/inhibitory postsynaptic currents (EPSC/IPSC), Pair-Pulse Facilitation (PPF), and Spike-Timing Dependent Plasticity (STDP). Extensive endurance tests ensured robust stability (107 switching cycles, 105 s (extrapolated to 10 years)), excellent linearity, and high Gmax/Gmin ratio (>105), all of which are essential for realizing multi-level data states (>7-bit operation). Beyond mimicking synaptic functionalities, the device achieved a pattern recognition accuracy of ≈94% on the Modified National Institute of Standards and Technology (MNIST) handwritten dataset when incorporated into a neural network, demonstrating its potential as an effective component in neuromorphic systems. The successful implementation of the 2D FeFET device paves the way for the development of high-efficiency, ultralow-power neuromorphic hardware which is in sub-femtojoule (48 aJ/spike) and fast response (1 µs), which is 104 folds faster than human synapse (≈10 ms). The results of the research underline the potential of nanoscale ferroelectric and 2D materials in building the next generation of artificial intelligence technologies.

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

Ferroelectric-defined reconfigurable homojunctions for in-memory sensing and computing

Recently, the increasing demand for data-centric applications is driving the elimination of image sensing, memory and computing unit interface, thus promising for latency- and energy-strict applications. Although dedicated electronic hardware has inspired the development of in-memory computing and in-sensor computing, folding the entire signal chain into one device remains challenging. Here an in-memory sensing and computing architecture is demonstrated using ferroelectric-defined reconfigurable two-dimensional photodiode arrays. High-level cognitive computing is realized based on the multiplications of light power and photoresponsivity through the photocurrent generation process and Kirchhoff's law. The weight is stored and programmed locally by the ferroelectric domains, enabling 51 (>5 bit) distinguishable weight states with linear, symmetric and reversible manipulation characteristics. Image recognition can be performed without any external memory and computing units. The three-in-one paradigm, integrating high-level computing, weight memorization and high-performance sensing, paves the way for a computing architecture with low energy consumption, low latency and reduced hardware overhead.

A self-tuning PID controller based on analog-digital hybrid computing with a double-gate SnS2 memtransistor

Most commercial drones utilize a traditional proportional-integral-derivative (PID) controller because of its design simplicity. However, the traditional PID controller has certain limitations in terms of optimality and robustness; it is difficult to actively adjust the PID gains under some disturbances. In this study, we demonstrated an analog-digital hybrid computing platform based on double-gate SnS2 memtransistors to implement a self-tuning/energy-efficient PID controller in drones. The customized analog circuit with memtransistors executes the PID control algorithm with low power consumption; we experimentally verified that the energy consumption of the proposed hybrid computing-based PID controller is only 63% of that of the traditional PID controller. In addition, the precise tunability of analog conductance states in the memtransistor proved to be capable of reconfiguring the performance of the PID controller, where the developed self-tuning algorithm can automatically find the optimal PID control performance.

Fixed-point iterative linear inverse solver with extended precision

Solving linear systems, often accomplished by iterative algorithms, is a ubiquitous task in science and engineering. To accommodate the dynamic range and precision requirements, these iterative solvers are carried out on floating-point processing units, which are not efficient in handling large-scale matrix multiplications and inversions. Low-precision, fixed-point digital or analog processors consume only a fraction of the energy per operation than their floating-point counterparts, yet their current usages exclude iterative solvers due to the cumulative computational errors arising from fixed-point arithmetic. In this work, we show that for a simple iterative algorithm, such as Richardson iteration, using a fixed-point processor can provide the same convergence rate and achieve solutions beyond its native precision when combined with residual iteration. These results indicate that power-efficient computing platforms consisting of analog computing devices can be used to solve a broad range of problems without compromising the speed or precision.

Dielectric-Engineered High-Speed, Low-Power, Highly Reliable Charge Trap Flash-Based Synaptic Device for Neuromorphic Computing beyond Inference

The coming of the big-data era brought a need for power-efficient computing that cannot be realized in the Von Neumann architecture. Neuromorphic computing which is motivated by the human brain can greatly reduce power consumption through matrix multiplication, and a device that mimics a human synapse plays an important role. However, many synaptic devices suffer from limited linearity and symmetry without using incremental step pulse programming (ISPP). In this work, we demonstrated a charge-trap flash (CTF)-based synaptic transistor using trap-level engineered Al₂O₃/Ta₂O₅/Al₂O₃ gate stack for successful neuromorphic computing. This novel gate stack provided precise control of the conductance with more than 6 bits. We chose the appropriate bias for highly linear and symmetric modulation of conductance and realized it with very short (25 ns) identical pulses at low voltage, resulting in low power consumption and high reliability. Finally, we achieved high learning accuracy in the training of 60000 MNIST images.

Highly Linear and Symmetric Synaptic Memtransistors Based on Polarization Switching in Two-Dimensional Ferroelectric Semiconductors

Brain-inspired neuromorphic computing hardware based on artificial synapses offers efficient solutions to perform computational tasks. However, the nonlinearity and asymmetry of synaptic weight updates in reported artificial synapses have impeded achieving high accuracy in neural networks. Here, this work develops a synaptic memtransistor based on polarization switching in a two-dimensional (2D) ferroelectric semiconductor (FES) of α-In₂ Se₃ for neuromorphic computing. The α-In₂ Se₃ memtransistor exhibits outstanding synaptic characteristics, including near-ideal linearity and symmetry and a large number of programmable conductance states, by taking the advantages of both memtransistor configuration and electrically configurable polarization states in the FES channel. As a result, the α-In₂ Se₃ memtransistor-type synapse reaches high accuracy of 97.76% for digit patterns recognition task in simulated artificial neural networks. This work opens new opportunities for using multiterminal FES memtransistors in advanced neuromorphic electronics.

The non-volatile electrostatic doping effect in MoTe2 field-effect transistors controlled by hexagonal boron nitride and a metal gate

The electrical and optical properties of transition metal dichalcogenides (TMDs) can be effectively modulated by tuning their Fermi levels. To develop a carrier-selectable optoelectronic device, we investigated intrinsically p-type MoTe₂, which can be changed to n-type by charging a hexagonal boron nitride (h-BN) substrate through the application of a writing voltage using a metal gate under deep ultraviolet light. The n-type part of MoTe₂ can be obtained locally using the metal gate pattern, whereas the other parts remain p-type. Furthermore, we can control the transition rate to n-type by applying a different writing voltage (i.e., − 2 to − 10 V), where the n-type characteristics become saturated beyond a certain writing voltage. Thus, MoTe₂ was electrostatically doped by a charged h-BN substrate, and it was found that a thicker h-BN substrate was more efficiently photocharged than a thinner one. We also fabricated a p–n diode using a 0.8 nm-thick MoTe₂ flake on a 167 nm-thick h-BN substrate, which showed a high rectification ratio of ~ 10⁻⁴. Our observations pave the way for expanding the application of TMD-based FETs to diode rectification devices, along with optoelectronic applications.