1
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He Y, Luo S, Fang C, Liang G. Direct design of ground-state probabilistic logic using many-body interactions for probabilistic computing. Sci Rep 2024; 14:15076. [PMID: 38956142 PMCID: PMC11219996 DOI: 10.1038/s41598-024-65676-z] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 11/27/2023] [Accepted: 06/24/2024] [Indexed: 07/04/2024] Open
Abstract
In this work, an innovative design model aimed at enhancing the efficacy of ground-state probabilistic logic with a binary energy landscape (GSPL-BEL) is presented. This model enables the direct conversion of conventional CMOS-based logic circuits into corresponding probabilistic graphical representations based on a given truth table. Compared to the conventional approach of solving the configuration of Ising model-basic probabilistic gates through linear programming, our model directly provides configuration parameters with embedded many-body interactions. For larger-scale probabilistic logic circuits, the GSPL-BEL model can fully utilize the dimensions of many-body interactions, achieving minimal node overhead while ensuring the simplest binary energy landscape and circumventing additional logic synthesis steps. To validate its effectiveness, hardware implementations of probabilistic logic gates were conducted. Probabilistic bits were introduced as Ising cells, and cascaded conventional XNOR gates along with passive resistor networks were precisely designed to realize many-body interactions. HSPICE circuit simulation results demonstrate that the probabilistic logic circuits designed based on this model can successfully operate in free, forward, and reverse modes, exhibiting the simplest binary probability distributions. For a 2-bit × 2-bit integer factorizer involving many-body interactions, compared to the logic synthesis approach, the GSPL-BEL model significantly reduces the number of consumed nodes, the solution space (in the free-run mode), and the number of energy levels from 12, 4096, and 9-8, 256, and 2, respectively. Our findings demonstrate the significant potential of the GSPL-BEL model in optimizing the structure and performance of probabilistic logic circuits, offering a new robust tool for the design and implementation of future probabilistic computing systems.
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Affiliation(s)
- Yihan He
- Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 117576, Singapore
| | - Sheng Luo
- Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 117576, Singapore
| | - Chao Fang
- Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 117576, Singapore
| | - Gengchiau Liang
- Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 117576, Singapore.
- Industry Academia Innovation School, National Yang-Ming Chiao Tung University, Hsinchu City, 300093, Taiwan.
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2
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Baek IK, Lee SH, Jang YH, Park H, Kim J, Cheong S, Shim SK, Han J, Han JK, Jeon GS, Shin DH, Woo KS, Hwang CS. Implementation of Bayesian networks and Bayesian inference using a Cu 0.1Te 0.9/HfO 2/Pt threshold switching memristor. NANOSCALE ADVANCES 2024; 6:2892-2902. [PMID: 38817425 PMCID: PMC11134254 DOI: 10.1039/d3na01166f] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 12/31/2023] [Accepted: 04/04/2024] [Indexed: 06/01/2024]
Abstract
Bayesian networks and Bayesian inference, which forecast uncertain causal relationships within a stochastic framework, are used in various artificial intelligence applications. However, implementing hardware circuits for the Bayesian inference has shortcomings regarding device performance and circuit complexity. This work proposed a Bayesian network and inference circuit using a Cu0.1Te0.9/HfO2/Pt volatile memristor, a probabilistic bit neuron that can control the probability of being 'true' or 'false.' Nodal probabilities within the network are feasibly sampled with low errors, even with the device's cycle-to-cycle variations. Furthermore, Bayesian inference of all conditional probabilities within the network is implemented with low power (<186 nW) and energy consumption (441.4 fJ), and a normalized mean squared error of ∼7.5 × 10-4 through division feedback logic with a variational learning rate to suppress the inherent variation of the memristor. The suggested memristor-based Bayesian network shows the potential to replace the conventional complementary metal oxide semiconductor-based Bayesian estimation method with power efficiency using a stochastic computing method.
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Affiliation(s)
- In Kyung Baek
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Soo Hyung Lee
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Yoon Ho Jang
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Hyungjun Park
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Jaehyun Kim
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Sunwoo Cheong
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Sung Keun Shim
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Janguk Han
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Joon-Kyu Han
- System Semiconductor Engineering and Department of Electronic Engineering, Sogang University 35 Baekbeom-ro, Mapo-gu Seoul 04107 Republic of Korea
| | - Gwang Sik Jeon
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Dong Hoon Shin
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Kyung Seok Woo
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
| | - Cheol Seong Hwang
- Department of Materials Science and Engineering, and Inter-University Semiconductor Research Center, Seoul National University Seoul 08826 Republic of Korea
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3
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Zheng Y, Ravichandran H, Schranghamer TF, Trainor N, Redwing JM, Das S. Hardware implementation of Bayesian network based on two-dimensional memtransistors. Nat Commun 2022; 13:5578. [PMID: 36151079 PMCID: PMC9508127 DOI: 10.1038/s41467-022-33053-x] [Citation(s) in RCA: 19] [Impact Index Per Article: 9.5] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 01/13/2022] [Accepted: 08/31/2022] [Indexed: 11/30/2022] Open
Abstract
Bayesian networks (BNs) find widespread application in many real-world probabilistic problems including diagnostics, forecasting, computer vision, etc. The basic computing primitive for BNs is a stochastic bit (s-bit) generator that can control the probability of obtaining '1' in a binary bit-stream. While silicon-based complementary metal-oxide-semiconductor (CMOS) technology can be used for hardware implementation of BNs, the lack of inherent stochasticity makes it area and energy inefficient. On the other hand, memristors and spintronic devices offer inherent stochasticity but lack computing ability beyond simple vector matrix multiplication due to their two-terminal nature and rely on extensive CMOS peripherals for BN implementation, which limits area and energy efficiency. Here, we circumvent these challenges by introducing a hardware platform based on 2D memtransistors. First, we experimentally demonstrate a low-power and compact s-bit generator circuit that exploits cycle-to-cycle fluctuation in the post-programmed conductance state of 2D memtransistors. Next, the s-bit generators are monolithically integrated with 2D memtransistor-based logic gates to implement BNs. Our findings highlight the potential for 2D memtransistor-based integrated circuits for non-von Neumann computing applications.
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Affiliation(s)
- Yikai Zheng
- Engineering Science and Mechanics, Penn State University, University Park, 16802, PA, USA
| | | | - Thomas F Schranghamer
- Engineering Science and Mechanics, Penn State University, University Park, 16802, PA, USA
| | - Nicholas Trainor
- Materials Science and Engineering, Penn State University, University Park, 16802, PA, USA
- Materials Research Institute, Penn State University, University Park, 16802, PA, USA
| | - Joan M Redwing
- Materials Science and Engineering, Penn State University, University Park, 16802, PA, USA
- Materials Research Institute, Penn State University, University Park, 16802, PA, USA
| | - Saptarshi Das
- Engineering Science and Mechanics, Penn State University, University Park, 16802, PA, USA.
- Materials Science and Engineering, Penn State University, University Park, 16802, PA, USA.
- Materials Research Institute, Penn State University, University Park, 16802, PA, USA.
- Electrical Engineering and Computer Science, Penn State University, University Park, 16802, PA, USA.
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4
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Bagheriye L, Kwisthout J. Brain-Inspired Hardware Solutions for Inference in Bayesian Networks. Front Neurosci 2021; 15:728086. [PMID: 34924925 PMCID: PMC8677599 DOI: 10.3389/fnins.2021.728086] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 06/20/2021] [Accepted: 10/11/2021] [Indexed: 11/23/2022] Open
Abstract
The implementation of inference (i.e., computing posterior probabilities) in Bayesian networks using a conventional computing paradigm turns out to be inefficient in terms of energy, time, and space, due to the substantial resources required by floating-point operations. A departure from conventional computing systems to make use of the high parallelism of Bayesian inference has attracted recent attention, particularly in the hardware implementation of Bayesian networks. These efforts lead to several implementations ranging from digital circuits, mixed-signal circuits, to analog circuits by leveraging new emerging nonvolatile devices. Several stochastic computing architectures using Bayesian stochastic variables have been proposed, from FPGA-like architectures to brain-inspired architectures such as crossbar arrays. This comprehensive review paper discusses different hardware implementations of Bayesian networks considering different devices, circuits, and architectures, as well as a more futuristic overview to solve existing hardware implementation problems.
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Affiliation(s)
- Leila Bagheriye
- Foundations of Natural and Stochastic Computing, Donders Institute for Brain, Cognition and Behaviour, Radboud University, Nijmegen, Netherlands
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5
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Goossens AS, Leiviskä MAT, Banerjee T. Anisotropy and Current Control of Magnetization in SrRuO3/SrTiO3 Heterostructures for Spin-Memristors. FRONTIERS IN NANOTECHNOLOGY 2021. [DOI: 10.3389/fnano.2021.680468] [Citation(s) in RCA: 2] [Impact Index Per Article: 0.7] [Reference Citation Analysis] [Abstract] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Indexed: 11/13/2022] Open
Abstract
Spintronics-based nonvolatile components in neuromorphic circuits offer the possibility of realizing novel functionalities at low power. Current-controlled electrical switching of magnetization is actively researched in this context. Complex oxide heterostructures with perpendicular magnetic anisotropy (PMA), consisting of SrRuO3 (SRO) grown on SrTiO3 (STO) are strong material contenders. Utilizing the crystal orientation, magnetic anisotropy in such simple heterostructures can be tuned to either exhibit a perfect or slightly tilted PMA. Here, we investigate current induced magnetization modulation in such tailored ferromagnetic layers with a material with strong spin-orbit coupling (Pt), exploiting the spin Hall effect. We find significant differences in the magnetic anisotropy between the SRO/STO heterostructures, as manifested in the first and second harmonic magnetoresistance measurements. Current-induced magnetization switching can be realized with spin-orbit torques, but for systems with perfect PMA this switching is probabilistic as a result of the high symmetry. Slight tilting of the PMA can break this symmetry and allow the realization of deterministic switching. Control over the magnetic anisotropy of our heterostructures therefore provides control over the manner of switching. Based on our findings, we propose a three-terminal spintronic memristor, with a magnetic tunnel junction design, that shows several resistive states controlled by electric charge. Non-volatile states can be written through SOT by applying an in-plane current, and read out as a tunnel current by applying a small out-of-plane current. Depending on the anisotropy of the SRO layer, the writing mechanism is either deterministic or probabilistic allowing for different functionalities to emerge. We envisage that the probabilistic MTJs could be used as synapses while the deterministic devices can emulate neurons.
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Faria R, Kaiser J, Camsari KY, Datta S. Hardware Design for Autonomous Bayesian Networks. Front Comput Neurosci 2021; 15:584797. [PMID: 33762919 PMCID: PMC7982658 DOI: 10.3389/fncom.2021.584797] [Citation(s) in RCA: 7] [Impact Index Per Article: 2.3] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 07/18/2020] [Accepted: 01/26/2021] [Indexed: 11/13/2022] Open
Abstract
Directed acyclic graphs or Bayesian networks that are popular in many AI-related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large-scale networks. Our results could be useful in the design of hardware accelerators that use energy-efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.
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Affiliation(s)
- Rafatul Faria
- Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, United States
| | - Jan Kaiser
- Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, United States
| | - Kerem Y. Camsari
- Department of Electrical and Computer Engineering, University of California, Santa Barbara, Santa Barbara, CA, United States
| | - Supriyo Datta
- Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, United States
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7
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Shao Q, Li P, Liu L, Yang H, Fukami S, Razavi A, Wu H, Wang K, Freimuth F, Mokrousov Y, Stiles MD, Emori S, Hoffmann A, Åkerman J, Roy K, Wang JP, Yang SH, Garello K, Zhang W. Roadmap of spin-orbit torques. IEEE TRANSACTIONS ON MAGNETICS 2021; 57:10.48550/arXiv.2104.11459. [PMID: 37057056 PMCID: PMC10091395 DOI: 10.48550/arxiv.2104.11459] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Grants] [Subscribe] [Scholar Register] [Indexed: 06/19/2023]
Abstract
Spin-orbit torque (SOT) is an emerging technology that enables the efficient manipulation of spintronic devices. The initial processes of interest in SOTs involved electric fields, spin-orbit coupling, conduction electron spins and magnetization. More recently interest has grown to include a variety of other processes that include phonons, magnons, or heat. Over the past decade, many materials have been explored to achieve a larger SOT efficiency. Recently, holistic design to maximize the performance of SOT devices has extended material research from a nonmagnetic layer to a magnetic layer. The rapid development of SOT has spurred a variety of SOT-based applications. In this Roadmap paper, we first review the theories of SOTs by introducing the various mechanisms thought to generate or control SOTs, such as the spin Hall effect, the Rashba-Edelstein effect, the orbital Hall effect, thermal gradients, magnons, and strain effects. Then, we discuss the materials that enable these effects, including metals, metallic alloys, topological insulators, two-dimensional materials, and complex oxides. We also discuss the important roles in SOT devices of different types of magnetic layers, such as magnetic insulators, antiferromagnets, and ferrimagnets. Afterward, we discuss device applications utilizing SOTs. We discuss and compare three-terminal and two-terminal SOT-magnetoresistive random-access memories (MRAMs); we mention various schemes to eliminate the need for an external field. We provide technological application considerations for SOT-MRAM and give perspectives on SOT-based neuromorphic devices and circuits. In addition to SOT-MRAM, we present SOT-based spintronic terahertz generators, nano-oscillators, and domain wall and skyrmion racetrack memories. This paper aims to achieve a comprehensive review of SOT theory, materials, and applications, guiding future SOT development in both the academic and industrial sectors.
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Affiliation(s)
- Qiming Shao
- Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology
| | - Peng Li
- Department of Electrical and Computer Engineering, Auburn University
| | - Luqiao Liu
- Electrical Engineering and Computer Science, Massachusetts Institute of Technology
| | - Hyunsoo Yang
- Department of Electrical and Computer Engineering, National University of Singapore
| | - Shunsuke Fukami
- Research Institute of Electrical Communication, Tohoku University
| | - Armin Razavi
- Department of Electrical and Computer Engineering, University of California, Los Angeles
| | - Hao Wu
- Department of Electrical and Computer Engineering, University of California, Los Angeles
| | - Kang Wang
- Department of Electrical and Computer Engineering, University of California, Los Angeles
| | | | | | - Mark D Stiles
- Alternative Computing Group, National Institute of Standards and Technology
| | | | - Axel Hoffmann
- Department of Materials Science and Engineering, University of Illinois Urbana-Champaign
| | | | - Kaushik Roy
- Department of Electrical and Computer Engineering, Purdue University
| | - Jian-Ping Wang
- Electrical and Computer Engineering Department, University of Minnesota
| | | | - Kevin Garello
- IMEC, Leuven, Belgium; CEA-Spintec, Grenoble, France
| | - Wei Zhang
- Physics Department, Oakland University
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8
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Debashis P, Ostwal V, Faria R, Datta S, Appenzeller J, Chen Z. Hardware implementation of Bayesian network building blocks with stochastic spintronic devices. Sci Rep 2020; 10:16002. [PMID: 32994448 PMCID: PMC7524796 DOI: 10.1038/s41598-020-72842-6] [Citation(s) in RCA: 11] [Impact Index Per Article: 2.8] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 05/16/2020] [Accepted: 09/07/2020] [Indexed: 12/20/2022] Open
Abstract
Bayesian networks are powerful statistical models to understand causal relationships in real-world probabilistic problems such as diagnosis, forecasting, computer vision, etc. For systems that involve complex causal dependencies among many variables, the complexity of the associated Bayesian networks become computationally intractable. As a result, direct hardware implementation of these networks is one promising approach to reducing power consumption and execution time. However, the few hardware implementations of Bayesian networks presented in literature rely on deterministic CMOS devices that are not efficient in representing the stochastic variables in a Bayesian network that encode the probability of occurrence of the associated event. This work presents an experimental demonstration of a Bayesian network building block implemented with inherently stochastic spintronic devices based on the natural physics of nanomagnets. These devices are based on nanomagnets with perpendicular magnetic anisotropy, initialized to their hard axes by the spin orbit torque from a heavy metal under-layer utilizing the giant spin Hall effect, enabling stochastic behavior. We construct an electrically interconnected network of two stochastic devices and manipulate the correlations between their states by changing connection weights and biases. By mapping given conditional probability tables to the circuit hardware, we demonstrate that any two node Bayesian networks can be implemented by our stochastic network. We then present the stochastic simulation of an example case of a four node Bayesian network using our proposed device, with parameters taken from the experiment. We view this work as a first step towards the large scale hardware implementation of Bayesian networks.
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Affiliation(s)
- Punyashloka Debashis
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
- Intel Corporation, Hillsboro, OR, 97124, USA
| | - Vaibhav Ostwal
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
| | - Rafatul Faria
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Intel Corporation, Hillsboro, OR, 97124, USA
| | - Supriyo Datta
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
| | - Joerg Appenzeller
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
| | - Zhihong Chen
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA.
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA.
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9
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Kim DW, Yi WS, Choi JY, Ashiba K, Baek JU, Jun HS, Kim JJ, Park JG. Double MgO-Based Perpendicular Magnetic Tunnel Junction for Artificial Neuron. Front Neurosci 2020; 14:309. [PMID: 32425744 PMCID: PMC7204637 DOI: 10.3389/fnins.2020.00309] [Citation(s) in RCA: 5] [Impact Index Per Article: 1.3] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 12/03/2019] [Accepted: 03/16/2020] [Indexed: 11/13/2022] Open
Abstract
A perpendicular spin transfer torque (p-STT)-based neuron was developed for a spiking neural network (SNN). It demonstrated the integration behavior of a typical neuron in an SNN; in particular, the integration behavior corresponding to magnetic resistance change gradually increased with the input spike number. This behavior occurred when the spin electron directions between double Co2Fe6B2 free and pinned layers in the p-STT-based neuron were switched from parallel to antiparallel states. In addition, a neuron circuit for integrate-and-fire operation was proposed. Finally, pattern-recognition simulation was performed for a single-layer SNN.
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Affiliation(s)
- Dong Won Kim
- Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South Korea
| | - Woo Seok Yi
- Department of Creative IT Engineering, Pohang University of Science and Technology, Pohang, South Korea
| | - Jin Young Choi
- MRAM Center, Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea
| | - Kei Ashiba
- Wafer Engineering Department, SUMCO Corporation, Imari, Japan
| | - Jong Ung Baek
- Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South Korea
| | - Han Sol Jun
- Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South Korea
| | - Jae Joon Kim
- Department of Creative IT Engineering, Pohang University of Science and Technology, Pohang, South Korea
| | - Jea Gun Park
- Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South Korea.,Wafer Engineering Department, SUMCO Corporation, Imari, Japan
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10
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Ostwal V, Debashis P, Faria R, Chen Z, Appenzeller J. Spin-torque devices with hard axis initialization as Stochastic Binary Neurons. Sci Rep 2018; 8:16689. [PMID: 30420701 PMCID: PMC6232168 DOI: 10.1038/s41598-018-34996-2] [Citation(s) in RCA: 21] [Impact Index Per Article: 3.5] [Reference Citation Analysis] [Abstract] [MESH Headings] [Grants] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 07/09/2018] [Accepted: 10/25/2018] [Indexed: 11/10/2022] Open
Abstract
Employing the probabilistic nature of unstable nano-magnet switching has recently emerged as a path towards unconventional computational systems such as neuromorphic or Bayesian networks. In this letter, we demonstrate proof-of-concept stochastic binary operation using hard axis initialization of nano-magnets and control of their output state probability (activation function) by means of input currents. Our method provides a natural path towards addition of weighted inputs from various sources, mimicking the integration function of neurons. In our experiment, spin orbit torque (SOT) is employed to "drive" nano-magnets with perpendicular magnetic anisotropy (PMA) -to their metastable state, i.e. in-plane hard axis. Next, the probability of relaxing into one magnetization state (+mi) or the other (-mi) is controlled using an Oersted field generated by an electrically isolated current loop, which acts as a "charge" input to the device. The final state of the magnet is read out by the anomalous Hall effect (AHE), demonstrating that the magnetization can be probabilistically manipulated and output through charge currents, closing the loop from charge-to-spin and spin-to-charge conversion. Based on these building blocks, a two-node directed network is successfully demonstrated where the status of the second node is determined by the probabilistic output of the previous node and a weighted connection between them. We have also studied the effects of various magnetic properties, such as magnet size and anisotropic field on the stochastic operation of individual devices through Monte Carlo simulations of Landau Lifshitz Gilbert (LLG) equation. The three-terminal stochastic devices demonstrated here are a critical step towards building energy efficient spin based neural networks and show the potential for a new application space.
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Affiliation(s)
- Vaibhav Ostwal
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA.
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA.
| | - Punyashloka Debashis
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
| | - Rafatul Faria
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
| | - Zhihong Chen
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
| | - Joerg Appenzeller
- School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907, USA
- Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA
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11
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Prevalence of hyperlipidemia in Shanxi Province, China and application of Bayesian networks to analyse its related factors. Sci Rep 2018; 8:3750. [PMID: 29491353 PMCID: PMC5830606 DOI: 10.1038/s41598-018-22167-2] [Citation(s) in RCA: 22] [Impact Index Per Article: 3.7] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 12/11/2017] [Accepted: 02/19/2018] [Indexed: 12/11/2022] Open
Abstract
This study aimed to obtain the prevalence of hyperlipidemia and its related factors in Shanxi Province, China using multivariate logistic regression analysis and tabu search-based Bayesian networks (BNs). A multi-stage stratified random sampling method was adopted to obtain samples among the general population aged 18 years or above. The prevalence of hyperlipidemia in Shanxi Province was 42.6%. Multivariate logistic regression analysis indicated that gender, age, region, occupation, vegetable intake level, physical activity, body mass index, central obesity, hypertension, and diabetes mellitus are associated with hyperlipidemia. BNs were used to find connections between those related factors and hyperlipidemia, which were established by a complex network structure. The results showed that BNs can not only be used to find out the correlative factors of hyperlipidemia but also to analyse how these factors affect hyperlipidemia and their interrelationships, which is consistent with practical theory, is superior to logistic regression and has better application prospects.
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