Excitatory Post-Synaptic Potential Mimicked in Indium-Zinc-Oxide Synaptic Transistors Gated by Methyl Cellulose Solid Electrolyte

Oxide Ionic Neuro-Transistors for Bio-inspired Computing

Current computing systems rely on Boolean logic and von Neumann architecture, where computing cells are based on high-speed electron-conducting complementary metal-oxide-semiconductor (CMOS) transistors. In contrast, ions play an essential role in biological neural computing. Compared with CMOS units, the synapse/neuron computing speed is much lower, but the human brain performs much better in many tasks such as pattern recognition and decision-making. Recently, ionic dynamics in oxide electrolyte-gated transistors have attracted increasing attention in the field of neuromorphic computing, which is more similar to the computing modality in the biological brain. In this review article, we start with the introduction of some ionic processes in biological brain computing. Then, electrolyte-gated ionic transistors, especially oxide ionic transistors, are briefly introduced. Later, we review the state-of-the-art progress in oxide electrolyte-gated transistors for ionic neuromorphic computing including dynamic synaptic plasticity emulation, spatiotemporal information processing, and artificial sensory neuron function implementation. Finally, we will address the current challenges and offer recommendations along with potential research directions.

Enhanced Synaptic Behaviors in Chitosan Electrolyte-Based Electric-Double-Layer Transistors with Poly-Si Nanowire Channel Structures

In this study, we enhance the synaptic behavior of artificial synaptic transistors by utilizing nanowire (NW)-type polysilicon channel structures. The high surface-to-volume ratio of the NW channels enables efficient modulation of the channel conductance, which is interpreted as the synaptic weight. As a result, NW-type synaptic transistors exhibit a larger hysteresis window compared to film-type synaptic transistors, even within the same gate voltage sweeping range. Moreover, NW-type synaptic transistors demonstrate superior short-term facilitation and long-term memory transition compared with film-type ones, as evidenced by the measured paired-pulse facilitation and excitatory post-synaptic current characteristics at varying frequencies and pulse numbers. Additionally, we observed gradual potentiation/depression characteristics, making these artificial synapses applicable to artificial neural networks. Furthermore, the NW-type synaptic transistors exhibit improved Modified National Institute of Standards and Technology pattern recognition rate of 91.2%. In conclusion, NW structure channels are expected to be a promising technology for next-generation artificial intelligence (AI) semiconductors, and the integration of NW structure channels has significant potential to advance AI semiconductor technology.

CMOS-compatible synaptic transistor gated by chitosan electrolyte-Ta2O5 hybrid electric double layer

This study proposes a hybrid electric double layer (EDL) with complementary metal-oxide semiconductor (CMOS) process compatibility by stacking a chitosan electrolyte and a Ta₂O₅ high-k dielectric thin film. Bio-inspired synaptic transistors with excellent electrical stability were fabricated using the proposed hybrid EDL for the gate dielectric layer. The Ta₂O₅ high-k dielectric layer with high chemical resistance, thermal stability, and mechanical strength enables CMOS-compatible patterning processes on biocompatible organic polymer chitosan electrolytes. This technique achieved ion-conduction from the chitosan electrolyte to the In-Ga-Zn oxide (IGZO) channel layer. The on/off current ratio, subthreshold voltage swing, and the field-effect mobility of the fabricated IGZO EDL transistors (EDLTs) exhibited excellent electrical properties of 1.80 × 10⁷, 96 mV/dec, and 3.73 cm²/V·s, respectively. A resistor-loaded inverter was constructed by connecting an IGZO EDLT with a load resistor (400 MΩ) in series. This demonstrated good inverter action and responded to the square-wave input signals. Synaptic behaviours such as the hysteresis window and excitatory post-synaptic current (EPSC) variations were evaluated for different DC gate voltage sweep ranges and different AC gate spike stimuli, respectively. Therefore, the proposed organic–inorganic hybrid EDL is expected to be useful for implementing an extremely compact neural architecture system.

Fully Solution-Processed Transparent Artificial Neural Network Using Drop-On-Demand Electrohydrodynamic Printing

Artificial neural networks (ANN), deep learning, and neuromorphic systems are exciting new processing architectures being used to implement a wide variety of intelligent and adaptive systems. To date, these architectures have been primarily realized using traditional complementary metal-oxide-semiconductor (CMOS) processes or otherwise conventional semiconductor fabrication processes. Thus, the high cost associated with the design and fabrication of these circuits has limited the broader scientific community from applying new ideas, and arguably, has slowed research progress in this exciting new area. Solution-processed electronics offer an attractive option for providing low-cost rapid prototyping of neuromorphic devices. This article proposes a novel, wholly solution-based process used to produce low-cost transparent synaptic transistors capable of emulating biological synaptic functioning and thus used to construct ANN. We have demonstrated the fabrication process by constructing an ANN that encodes and decodes a 100 × 100 pixel image. Here, the synaptic weights were configured to achieve the desired image processing functions.