Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

5 nm Ultrathin Crystalline Ferroelectric P(VDF-TrFE)-Brush Tuned for Hysteresis-Free Sub 60 mV dec-1 Negative-Capacitance Transistors

Negative-capacitance field-effect transistors (NC-FETs) have gathered enormous interest as a way to reduce subthreshold swing (SS) and overcome the issue of power dissipation in modern integrated circuits. For stable NC behavior at low operating voltages, the development of ultrathin ferroelectrics (FE), which are compatible with the industrial process, is of great interest. Here, a new scalable ultrathin ferroelectric polymer layer is developed based on trichloromethyl (CCl₃ )-terminated poly(vinylidene difluoride-co-trifloroethylene) (P(VDF-TrFE)) to achieve the state-of-the-art performance of NC-FETs. The crystalline phase of 5-10 nm ultrathin P(VDF-TrFE) is prepared on AlO_X by a newly developed brush method, which enables an FE/dielectric (DE) bilayer. FE/DE thickness ratios are then systematically tuned at ease to achieve ideal capacitance matching. NC-FETs with optimized FE/DE thickness at a thickness limit demonstrate hysteresis-free operation with an SS of 28 mV dec^-1 at ≈1.5 V, which competes with the best reports. This P(VDF-TrFE)-brush layer can be broadly adapted to NC-FETs, opening an exciting avenue for low-power devices.

Highly transparent poly(glycidyl methacrylate-co-acryloisobutyl POSS) for 100 μm-thick submicron patterns with an aspect ratio over 100

This is the first report on the fabrication of defect-free submicron structures with more than 100 μm thickness and an aspect ratio over 100. Highly transparent poly(glycidyl methacrylate-co-acryloisobutyl POSS) (PGP) was synthesized via radical polymerization. The mechanical properties of the PGP submicron structure displayed a Young's modulus of 6.09 GPa and a hardness of 0.16 GPa, 4.2 and 8 times, respectively, than those of SU8 nanopatterns. These enhancements enable the utilization of ultrathick 2D-/3D-submicron structures as an ideal platform for microelectromechanical systems, big data storage systems, energy devices, etc.

Self-Positioned Nanosized Mask for Transparent and Flexible Ferroelectric Polymer Nanodiodes Array

High density arrays of ferroelectric polymer nanodiodes have gained strong attention for next-generation transparent and flexible nonvolatile resistive memory. Here, we introduce a facile and innovative method to fabricate ferroelectric polymer nanodiode array on an ITO-coated poly(ethylene terephthalate) (PET) substrate by using block copolymer self-assembly and oxygen plasma etching. First, polystyrene-block-poly(2-vinylpyridine) copolymer (PS-b-P2VP) micelles were spin-coated on poly(vinylidene fluoride-ran-trifluoroethylene) copolymer (P(VDF-TrFE)) film/ITO-coated PET substrate. After the sample was immersed in a gold precursor (HAuCl₄) containing solution, which strongly coordinates with nitrogen group in P2VP, oxygen plasma etching was performed. During the plasma etching, coordinated gold precursors became gold nanoparticles (GNPs), which successfully acted as self-positioned etching mask to fabricate a high density array of P(VDF-TrFE)) nanoislands with GNP at the top. Each nanoisland shows clearly individual diode property, as confirmed by current-voltage (I-V) curve. Furthermore, due to the transparent and flexible nature of P(VDF-TrFE)) nanoisland as well as the substrate, the P(VDF-TrFE) nanodiode array was highly tranparent, and the diode property was maintained even after a large number of bendings (for instance, 1000 times). The array could be used as the next-generation tranparent and flexible nonvolatile memory device.