Monolayer Vacancy-Induced MXene Memory for Write-Verify-Free Programming

The fundamental logic states of 1 and 0 in Complementary Metal-Oxide-Semiconductor (CMOS) are essential for modern high-speed non-volatile solid-state memories. However, the accumulated storage signal in conventional physical components often leads to data distortion after multiple write operations. This necessitates a write-verify operation to ensure proper values within the 0/1 threshold ranges. In this work, a non-gradual switching memory with two distinct stable resistance levels is introduced, enabled by the asymmetric vertical structure of monolayer vacancy-induced oxidized Ti3C2Tx MXene for efficient carrier trapping and releasing. This non-cumulative resistance effect allows non-volatile memories to attain valid 0/1 logic levels through direct reprogramming, eliminating the need for a write-verify operation. The device exhibits superior performance characteristics, including short write/erase times (100 ns), a large switching ratio (≈3 × 104), long cyclic endurance (>104 cycles), extended retention (>4 × 106 s), and highly resistive stability (>104 continuous write operations). These findings present promising avenues for next-generation resistive memories, offering faster programming speed, exceptional write performance, and streamlined algorithms.

Short-Term Memory Characteristics of IGZO-Based Three-Terminal Devices

A three-terminal synaptic transistor enables more accurate controllability over the conductance compared with traditional two-terminal synaptic devices for the synaptic devices in hardware-oriented neuromorphic systems. In this work, we fabricated IGZO-based three-terminal devices comprising HfAlOx and CeOx layers to demonstrate the synaptic operations. The chemical compositions and thicknesses of the devices were verified by transmission electron microscopy and energy dispersive spectroscopy in cooperation. The excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), short-term potentiation (STP), and short-term depression (STD) of the synaptic devices were realized for the short-term memory behaviors. The IGZO-based three-terminal synaptic transistor could thus be controlled appropriately by the amplitude, width, and interval time of the pulses for implementing the neuromorphic systems.

Memristor Degradation Analysis Using Auxiliary Volt-Ampere Characteristics

The memristor is one of the modern microelectronics key devices. Due to the nanometer scale and complex processes physic, the development of memristor state study approaches faces limitations of classical methods to observe the processes. We propose a new approach to investigate the degradation of six Ni/Si₃N₄/p+Si-based memristors up to their failure. The basis of the proposed idea is the joint analysis of resistance change curves with the volt-ampere characteristics registered by the auxiliary signal. The paper considers the existence of stable switching regions of the high-resistance state and their interpretation as stable states in which the device evolves. The stable regions' volt-ampere characteristics were simulated using a compact mobility modification model and a first-presented target function to solve the optimization problem.

Resistive Switching and Synaptic Characteristics in ZnO/TaON-Based RRAM for Neuromorphic System

We fabricated an ITO/ZnO/TaON/TaN device as nonvolatile memory (NVM) with resistive switching for complementary metal-oxide-semiconductor (CMOS) compatibility. It is appropriate for the age of big data, which demands high speed and capacity. We produced a TaON layer by depositing a ZnO layer on a TaN layer using an oxygen-reactive radio frequency (RF) sputtering system. The bi-layer formation of ZnO and TaON interferes with the filament rupture after the forming process and then raises the current level slightly. The current levels were divided into high- and low-compliance modes. The retention, endurance, and pulse conductance were verified with a neuromorphic device. This device was stable and less consumed when it was in low mode rather than high mode.

Multifunctional Analog Resistance Switching of Si3N4-Based Memristors through Migration of Ag+ Ions and Formation of Si-Dangling Bonds

With forming-free, self-rectifying, and self-compliant properties, memristors can effectively prevent themselves from experiencing leakage currents and overshoot voltages without any additional circuitry. However, the implementation of all these features in a single memristor remains a challenge. Herein, a multifunctional Si3N4-based memristor with a structure of Ag/a-SiNx/p++-Si has been fabricated, and it was demonstrated, for the first time, that the device exhibits novel analog resistance switching behaviors, such as being forming-free, self-rectifying, and self-compliant, presenting well a coexistence of volatile and nonvolatile performance of resistance switching. The multifunctional analog resistance switching could be attributed to the formation of the Si-dangling bond channel and the migration of Ag+ ions inside the a-SiNx layer. Our current results might provide an insightful understanding of the resistance switching mechanism of Si3N4-based memristors, and the device with a large on/off ratio (>103) and robust retention (>103 s) and endurance (>103 cycles) shows potential for application in crossbar synaptic array devices.

Tailoring the Interfacial Band Offset by the Molecular Dipole Orientation for a Molecular Heterojunction Selector

Understanding and designing interfacial band alignment in a molecular heterojunction provides a foundation for realizing its desirable electronic functionality. In this study, a tailored molecular heterojunction selector is implemented by controlling its interfacial band offset between the molecular self-assembled monolayer with opposite dipole orientations and the 2D semiconductor (1L -MoS2 or 1L -WSe2 ). The molecular dipole moment direction determines the direction of the band bending of the 2D semiconductors, affecting the dominant transport pathways upon voltage application. Notably, in the molecular heterostructure with 1L -WSe2 , the opposite rectification direction is observed depending on the molecular dipole moment direction, which does not hold for the case with 1L -MoS2 . In addition, the nonlinearity of the molecular heterojunction selector can be significantly affected by the molecular dipole moment direction, type of 2D semiconductor, and metal work function. According to the choice of these heterojunction constituents, the nonlinearity is widely tuned from 1.0 × 101 to 3.6 × 104 for the read voltage scheme and from 0.4 × 101 to 2.0 × 105 for the half-read voltage scheme, which can be scaled up to an ≈482 Gbit crossbar array.

Resistive Switching Characteristics of ZnO-Based RRAM on Silicon Substrate

In this work, we conducted the following analysis of Ni/ZnO (20 nm)/n-type Si RRAM device with three different compliance currents (CCs). We compared I–V curves, including set, reset voltages, and resistance of LRS, HRS states for each CCs. For an accurate comparison of each case, statistical analysis is presented. In each case, the average value and the relative standard deviation (RSD) of resistance are calculated to analyze the characteristics of the distribution. The best variability is observed at higher CC (5 mA). In addition, we validated the non-volatile properties of the device using the retention data for each of the CCs. Based on this comparison, we proposed the most appropriate CC of the device operation. Also, a pulse was applied to measure the current waveform and demonstrate the regular operation of the device. Finally, the resistance of LRS and HRS states was measured by pulse. We statistically compared the measured pulse data with the DC data.

In-Memory-Computing Realization with a Photodiode/Memristor Based Vision Sensor

State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiNx) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.

Charge transport mechanism in the forming-free memristor based on silicon nitride

Nonstoichiometric silicon nitride SiNx is a promising material for developing a new generation of high-speed, reliable flash memory device based on the resistive effect. The advantage of silicon nitride over other dielectrics is its compatibility with the silicon technology. In the present work, a silicon nitride-based memristor deposited by the plasma-enhanced chemical vapor deposition method was studied. To develop a memristor based on silicon nitride, it is necessary to understand the charge transport mechanisms in all states. In the present work, it was established that the charge transport in high-resistance states is not described by the Frenkel effect model of Coulomb isolated trap ionization, Hill-Adachi model of overlapping Coulomb potentials, Makram-Ebeid and Lannoo model of multiphonon isolated trap ionization, Nasyrov-Gritsenko model of phonon-assisted tunneling between traps, Shklovskii-Efros percolation model, Schottky model and the thermally assisted tunneling mechanisms. It is established that, in the initial state, low-resistance state, intermediate-resistance state and high-resistance state, the charge transport in the forming-free SiNx-based memristor is described by the space charge limited current model. The trap parameters responsible for the charge transport in various memristor states are determined.

Self-Rectifying Resistive Switching and Short-Term Memory Characteristics in Pt/HfO2/TaOx/TiN Artificial Synaptic Device

Here, we propose a Pt/HfO₂/TaO_x/TiN artificial synaptic device that is an excellent candidate for artificial synapses. First, XPS analysis is conducted to provide the dielectric (HfO₂/TaO_x/TiN) information deposited by DC sputtering and atomic layer deposition (ALD). The self-rectifying resistive switching characteristics are achieved by the asymmetric device stack, which is an advantage of the current suppression in the crossbar array structure. The results show that the programmed data are lost over time and that the decay rate, which is verified from the retention test, can be adjusted by controlling the compliance current (CC). Based on these properties, we emulate bio-synaptic characteristics, such as short-term plasticity (STP), long-term plasticity (LTP), and paired-pulse facilitation (PPF), in the self-rectifying I–V characteristics of the Pt/HfO₂/TaO_x/TiN bilayer memristor device. The PPF characteristics are mimicked by replacing the bio-stimulation with the interval time of paired pulse inputs. The typical potentiation and depression are also implemented by optimizing the set and reset pulse. Finally, we demonstrate the natural depression by varying the interval time between pulse inputs.

Development of Catalytic-CVD SiNx Passivation Process for AlGaN/GaN-on-Si HEMTs

We optimized a silicon nitride (SiNx) passivation process using a catalytic-chemical vapor deposition (Cat-CVD) system to suppress the current collapse phenomenon of AlGaN/GaN-on-Si high electron mobility transistors (HEMTs). The optimized Cat-CVD SiNx film exhibited a high film density of 2.7 g/cm3 with a low wet etch rate (buffered oxide etchant (BOE) 10:1) of 2 nm/min and a breakdown field of 8.2 MV/cm. The AlGaN/GaN-on-Si HEMT fabricated by the optimized Cat-CVD SiNx passivation process, which had a gate length of 1.5 μm and a source-to-drain distance of 6 μm, exhibited the maximum drain current density of 670 mA/mm and the maximum transconductance of 162 mS/mm with negligible hysteresis. We found that the optimized SiNx film had positive charges, which were responsible for suppressing the current collapse phenomenon.

Memristive and Synaptic Characteristics of Nitride-Based Heterostructures on Si Substrate

Brain-inspired artificial synaptic devices and neurons have the potential for application in future neuromorphic computing as they consume low energy. In this study, the memristive switching characteristics of a nitride-based device with two amorphous layers (SiN/BN) is investigated. We demonstrate the coexistence of filamentary (abrupt) and interface (homogeneous) switching of Ni/SiN/BN/n⁺⁺-Si devices. A better gradual conductance modulation is achieved for interface-type switching as compared with filamentary switching for an artificial synaptic device using appropriate voltage pulse stimulations. The improved classification accuracy for the interface switching (85.6%) is confirmed and compared to the accuracy of the filamentary switching mode (75.1%) by a three-layer neural network (784 × 128 × 10). Furthermore, the spike-timing-dependent plasticity characteristics of the synaptic device are also demonstrated. The results indicate the possibility of achieving an artificial synapse with a bilayer SiN/BN structure.

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

A feasible approach is reported to reduce the switching current and increase the nonlinearity in a complementary metal-oxide-semiconductor (CMOS)-compatible Ti/SiN_x /p⁺ -Si memristor by simply reducing the cell size down to sub-100 nm. Even though the switching voltages gradually increase with decreasing device size, the reset current is reduced because of the reduced current overshoot effect. The scaled devices (sub-100 nm) exhibit gradual reset switching driven by the electric field, whereas that of the large devices (≥1 µm) is driven by Joule heating. For the scaled cell (60 nm), the current levels are tunable by adjusting the reset stop voltage for multilevel cells. It is revealed that the nonlinearity in the low-resistance state is attributed to Fowler-Nordheim tunneling dominating in the high-voltage regime (≥1 V) for the scaled cells. The experimental findings demonstrate that the scaled metal-nitride-silicon memristor device paves the way to realize CMOS-compatible high-density crosspoint array applications.

Analog Synaptic Behavior of a Silicon Nitride Memristor

In this paper, we present a synapse function using analog resistive-switching behaviors in a SiN_x-based memristor with a complementary metal-oxide-semiconductor compatibility and expandability to three-dimensional crossbar array architecture. A progressive conductance change is attainable as a result of the gradual growth and dissolution of the conducting path, and the series resistance of the AlO_y layer in the Ni/SiN_x/AlO_y/TiN memristor device enhances analog switching performance by reducing current overshoot. A continuous and smooth gradual reset switching transition can be observed with a compliance current limit (>100 μA), and is highly suitable for demonstrating synaptic characteristics. Long-term potentiation and long-term depression are obtained by means of identical pulse responses. Moreover, symmetric and linear synaptic behaviors are significantly improved by optimizing pulse response conditions, which is verified by a neural network simulation. Finally, we display the spike-timing-dependent plasticity with the multipulse scheme. This work provides a possible way to mimic biological synapse function for energy-efficient neuromorphic systems by using a conventional passive SiN_x layer as an active dielectric.