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Njeim J, Alamarguy D, Tu X, Durnez A, Lafosse X, Chretien P, Madouri A, Ren Z, Brunel D. Effect of the Al 2O 3 Deposition Method on Parylene C: Highlights on a Nanopillar-Shaped Surface. ACS OMEGA 2020; 5:15828-15834. [PMID: 32656403 PMCID: PMC7345438 DOI: 10.1021/acsomega.0c00735] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 02/19/2020] [Accepted: 06/05/2020] [Indexed: 06/11/2023]
Abstract
Parylene C (PC) has attracted tremendous attention throughout the past few years due to its extraordinary properties such as high mechanical strength and biocompatibility. When used as a flexible substrate and combined with high-κ dielectrics such as aluminum oxide (Al2O3), the Al2O3/PC stack becomes very compelling for various applications in fields such as biomedical microsystems and microelectronics. For the latter, the atomic layer deposition of oxides is particularly needed as it allows the deposition of high-quality and nanometer-scale oxide thicknesses. In this work, atomic layer deposition (ALD) and electron beam physical vapor deposition (EBPVD) of Al2O3 on a 15 μm-thick PC layer are realized and their effects on the Al2O3/PC resulting stack are investigated via X-ray photoelectron spectroscopy combined with atomic force microscopy. An ALD-based Al2O3/PC stack is found to result in a nanopillar-shaped surface, while an EBPVD-based Al2O3/PC stack yields an expected smooth surface. In both cases, the Al2O3/PC stack can be easily peeled off from the reusable SiO2 substrate, resulting in a flexible Al2O3/PC film. These fabrication processes are economic, high yielding, and suitable for mass production. Although ALD is particularly appreciated in the semiconducting industry, EBPVD is here found to be better for the realization of the Al2O3/PC flexible substrate for micro- and nanoelectronics.
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Affiliation(s)
- Joanna Njeim
- Sorbonne
Université, CNRS, Laboratoire de Génie Electrique et
Electronique de Paris, 75252 Paris, France
| | - David Alamarguy
- Université
Paris-Saclay, CentraleSupélec, CNRS, Laboratoire de Génie
Electrique et Electronique de Paris, 91192 Gif-sur-Yvette, France
| | - Xiaolong Tu
- Sorbonne
Université, PSL Université, Ecole Normale Supérieure,
PASTEUR, Département de Chimie, CNRS, 75005 Paris, France
| | - Alan Durnez
- Université
Paris-Saclay, CNRS, Centre de Nanosciences et de Nanotechnologies, 91120 Palaiseau, France
| | - Xavier Lafosse
- Université
Paris-Saclay, CNRS, Centre de Nanosciences et de Nanotechnologies, 91120 Palaiseau, France
| | - Pascal Chretien
- Université
Paris-Saclay, CentraleSupélec, CNRS, Laboratoire de Génie
Electrique et Electronique de Paris, 91192 Gif-sur-Yvette, France
| | - Ali Madouri
- Université
Paris-Saclay, CNRS, Centre de Nanosciences et de Nanotechnologies, 91120 Palaiseau, France
| | - Zhuoxiang Ren
- Sorbonne
Université, CNRS, Laboratoire de Génie Electrique et
Electronique de Paris, 75252 Paris, France
| | - David Brunel
- Sorbonne
Université, CNRS, Laboratoire de Génie Electrique et
Electronique de Paris, 75252 Paris, France
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Transferless Inverted Graphene/Silicon Heterostructures Prepared by Plasma-Enhanced Chemical Vapor Deposition of Amorphous Silicon on CVD Graphene. NANOMATERIALS 2020; 10:nano10030589. [PMID: 32213885 PMCID: PMC7153506 DOI: 10.3390/nano10030589] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.3] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 02/14/2020] [Revised: 03/19/2020] [Accepted: 03/19/2020] [Indexed: 11/25/2022]
Abstract
The heterostructures of two-dimensional (2D) and three-dimensional (3D) materials represent one of the focal points of current nanotechnology research and development. From an application perspective, the possibility of a direct integration of active 2D layers with exceptional optoelectronic and mechanical properties into the existing semiconductor manufacturing processes is extremely appealing. However, for this purpose, 2D materials should ideally be grown directly on 3D substrates to avoid the transferring step, which induces damage and contamination of the 2D layer. Alternatively, when such an approach is difficult—as is the case of graphene on noncatalytic substrates such as Si—inverted structures can be created, where the 3D material is deposited onto the 2D substrate. In the present work, we investigated the possibility of using plasma-enhanced chemical vapor deposition (PECVD) to deposit amorphous hydrogenated Si (a-Si:H) onto graphene resting on a catalytic copper foil. The resulting stacks created at different Si deposition temperatures were investigated by the combination of Raman spectroscopy (to quantify the damage and to estimate the change in resistivity of graphene), temperature-dependent dark conductivity, and constant photocurrent measurements (to monitor the changes in the electronic properties of a-Si:H). The results indicate that the optimum is 100 °C deposition temperature, where the graphene still retains most of its properties and the a-Si:H layer presents high-quality, device-ready characteristics.
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Current Modulation of a Heterojunction Structure by an Ultra-Thin Graphene Base Electrode. MATERIALS 2018; 11:ma11030345. [PMID: 29495480 PMCID: PMC5872924 DOI: 10.3390/ma11030345] [Citation(s) in RCA: 10] [Impact Index Per Article: 1.7] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 01/26/2018] [Revised: 02/21/2018] [Accepted: 02/23/2018] [Indexed: 11/29/2022]
Abstract
Graphene has been proposed as the current controlling element of vertical transport in heterojunction transistors, as it could potentially achieve high operation frequencies due to its metallic character and 2D nature. Simulations of graphene acting as a thermionic barrier between the transport of two semiconductor layers have shown cut-off frequencies larger than 1 THz. Furthermore, the use of n-doped amorphous silicon, (n)-a-Si:H, as the semiconductor for this approach could enable flexible electronics with high cutoff frequencies. In this work, we fabricated a vertical structure on a rigid substrate where graphene is embedded between two differently doped (n)-a-Si:H layers deposited by very high frequency (140 MHz) plasma-enhanced chemical vapor deposition. The operation of this heterojunction structure is investigated by the two diode-like interfaces by means of temperature dependent current-voltage characterization, followed by the electrical characterization in a three-terminal configuration. We demonstrate that the vertical current between the (n)-a-Si:H layers is successfully controlled by the ultra-thin graphene base voltage. While current saturation is yet to be achieved, a transconductance of ~230 μS was obtained, demonstrating a moderate modulation of the collector-emitter current by the ultra-thin graphene base voltage. These results show promising progress towards the application of graphene base heterojunction transistors.
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