Exchange coupling between laterally adjacent nanomagnets

Interlayer exchange couple based reliable and robust 3-input adder design methodology

In this paper, a novel inter-layer exchange coupled (IEC) based 3-input full adder design methodology is proposed and subsequently the architecture has been implemented on the widely accepted micromagnetic OOMMF platform. The impact of temperature on the IEC coupled full-adder design has been analyzed up to Curie temperature. It was observed that even up to Curie temperature the IEC based adder design was able to operate at sub-50 nm as contrast to dipole coupled adder design which failed at 5 K for sub 50 nm. Simulation results obtained from OOMMF micromagnetic simulator shows, the IEC based adder design was at a lower energy state as compared to the dipole coupled adder indicating a more stable system and as the temperature of the design was increased, the total energy increased resulting in reduced stability. Potential explanation for the thermodynamic stability of IEC model lies in its energetically favored architecture, such that the total energy was lower than its dipole coupled counterparts. IEC architecture demonstrates supremacy in reliability and strength enabling NML to march towards beyond CMOS devices.

A novel and reliable interlayer exchange coupled nanomagnetic universal logic gate design

In this paper, we propose an interlayer exchange coupling (IEC) based 3D universal NAND/NOR gate design methodology for the reliable and robust implementation of nanomagnetic logic design as compared to the state-of-the art architectures. Owing to stronger coupling scheme as compared to the conventional dipole coupling, the random flip of the states of the nanomagnets (i.e. the soft error) is reduced resulting in greater scalability and better data retention at the deep sub-micron level. Results obtained from Object Oriented Micromagnetic Framework micromagnetic simulation show even at a Curie temperature of the nanomagnets coupled through IEC, the logic function works properly as opposed to dipole coupled nanomagnets which fails at 5 K when scaled down to sub 50 nm. Contemplating the fabrication challenges, the robustness of the IEC design was studied for structural defects, positional misalignment, shape, and size variations. This proposed 3D universal gate design methodology benefits from the miniaturization of nanomagnets as well as reduces the effect of thermally induced errors resulting in opening up a new perspective for nanomagnet based design in magneto-logic devices.