In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory

Indium-Gallium-Zinc Oxide-Based Synaptic Charge Trap Flash for Spiking Neural Network-Restricted Boltzmann Machine

Recently, neuromorphic computing has been proposed to overcome the drawbacks of the current von Neumann computing architecture. Especially, spiking neural network (SNN) has received significant attention due to its ability to mimic the spike-driven behavior of biological neurons and synapses, potentially leading to low-power consumption and other advantages. In this work, we designed the indium-gallium-zinc oxide (IGZO) channel charge-trap flash (CTF) synaptic device based on a HfO2/Al2O3/Si3N4/Al2O3 layer. Our IGZO-based CTF device exhibits synaptic functions with 128 levels of synaptic weight states and spike-timing-dependent plasticity. The SNN-restricted Boltzmann machine was used to simulate the fabricated CTF device to evaluate the efficiency for the SNN system, achieving the high pattern-recognition accuracy of 83.9%. We believe that our results show the suitability of the fabricated IGZO CTF device as a synaptic device for neuromorphic computing.

Review of Semiconductor Flash Memory Devices for Material and Process Issues

Vertically integrated NAND (V-NAND) flash memory is the main data storage in modern handheld electronic devices, widening its share even in the data centers where installation and operation costs are critical. While the conventional scaling rule has been applied down to the design rule of ≈15 nm (year 2013), the current method of increasing device density is stacking up layers. Currently, 176-layer-stacked V-NAND flash memory is available on the market. Nonetheless, increasing the layers invokes several challenges, such as film stress management and deep contact hole etching. Also, there should be an upper bound for the attainable stacking layers (400-500) due to the total allowable chip thickness, which will be reached within 6-7 years. This review summarizes the current status and critical challenges of charge-trap-based flash memory devices, with a focus on the material (floating-gate vs charge-trap-layer), array-level circuit architecture (NOR vs NAND), physical integration structure (2D vs 3D), and cell-level programming technique (single vs multiple levels). Current efforts to improve fabrication processes and device performances using new materials are also introduced. The review suggests directions for future storage devices based on the ionic mechanism, which may overcome the inherent problems of flash memory devices.

Memory Characteristics of Thin Film Transistor with Catalytic Metal Layer Induced Crystallized Indium-Gallium-Zinc-Oxide (IGZO) Channel

The memory characteristics of a flash memory device using c-axis aligned crystal indium gallium zinc oxide (CAAC-IGZO) thin film as a channel material were demonstrated. The CAAC-IGZO thin films can replace the current poly-silicon channel, which has reduced mobility because of grain-induced degradation. The CAAC-IGZO thin films were achieved using a tantalum catalyst layer with annealing. A thin film transistor (TFT) with SiO2/Si3N4/Al2O3 and CAAC-IGZO thin films, where Al2O3 was used for the tunneling layer, was evaluated for a flash memory application and compared with a device using an amorphous IGZO (a-IGZO) channel. A source and drain using indium-tin oxide and aluminum were also evaluated for TFT flash memory devices with crystallized and amorphous channel materials. Compared with the a-IGZO device, higher on-current (Ion), improved field effect carrier mobility (μFE), a lower body trap (Nss), a wider memory window (ΔVth), and better retention and endurance characteristics were attained using the CAAC-IGZO device.

High-Performance Thin-Film Transistors with an Atomic-Layer-Deposited Indium Gallium Oxide Channel: A Cation Combinatorial Approach

The effect of gallium (Ga) concentration on the structural evolution of atomic-layer-deposited indium gallium oxide (IGO) (In_1-xGa_xO) films as high-mobility n-channel semiconducting layers was investigated. Different Ga concentrations in 10-13 nm thick In_1-xGa_xO films allowed versatile phase structures to be amorphous, highly ordered, and randomly oriented crystalline by thermal annealing at either 400 or 700 °C for 1 h. Heavy Ga concentrations above 34 atom % caused a phase transformation from a polycrystalline bixbyite to an amorphous IGO film at 400 °C, while proper Ga concentration produced a highly ordered bixbyite crystal structure at 700 °C. The resulting highly ordered In_0.66Ga_0.34O film show unexpectedly high carrier mobility (μ_FE) values of 60.7 ± 1.0 cm² V^-1 s^-1, a threshold voltage (V_TH) of -0.80 ± 0.05 V, and an I_ON/OFF ratio of 5.1 × 10⁹ in field-effect transistors (FETs). In contrast, the FETs having polycrystalline In_1-xGa_xO films with higher In fractions (x = 0.18 and 0.25) showed reasonable μ_FE values of 40.3 ± 1.6 and 31.5 ± 2.4 cm² V^-1 s^-1, V_TH of -0.64 ± 0.40 and -0.43 ± 0.06 V, and I_ON/OFF ratios of 2.5 × 10⁹ and 1.4 × 10⁹, respectively. The resulting superior performance of the In_0.66Ga_0.34O-film-based FET was attributed to a morphology having fewer grain boundaries, with higher mass densification and lower oxygen vacancy defect density of the bixbyite crystallites. Also, the In_0.66Ga_0.34O transistor was found to show the most stable behavior against an external gate bias stress.

Boosting carrier mobility and stability in indium-zinc-tin oxide thin-film transistors through controlled crystallization

We investigated the effect of film thickness (geometrical confinement) on the structural evolution of sputtered indium-zinc-tin oxide (IZTO) films as high mobility n-channel semiconducting layers during post-treatment at different annealing temperatures ranging from 350 to 700 °C. Different thicknesses result in IZTO films containing versatile phases, such as amorphous, low-, and high-crystalline structures even after annealing at 700 °C. A 19-nm-thick IZTO film clearly showed a phase transformation from initially amorphous to polycrystalline bixbyite structures, while the ultra-thin film (5 nm) still maintained an amorphous phase. Transistors including amorphous and low crystalline IZTO films fabricated at 350 and 700 °C show reasonable carrier mobility (µFE) and on/off current ratio (ION/OFF) values of 22.4-35.9 cm2 V-1 s-1 and 1.0-4.0 × 108, respectively. However, their device instabilities against positive/negative gate bias stresses (PBS/NBS) are unacceptable, originating from unsaturated bonding and disordered sites in the metal oxide films. In contrast, the 19-nm-thick annealed IZTO films included highly-crystalline, 2D spherulitic crystallites and fewer grain boundaries. These films show the highest µFE value of 39.2 cm2 V-1 s-1 in the transistor as well as an excellent ION/OFF value of 9.7 × 108. Simultaneously, the PBS/NBS stability of the resulting transistor is significantly improved under the same stress condition. This promising superior performance is attributed to the crystallization-induced lattice ordering, as determined by highly-crystalline structures and the associated formation of discrete donor levels (~ 0.31 eV) below the conduction band edge.