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He Y, Zhu Y, Wan Q. Oxide Ionic Neuro-Transistors for Bio-inspired Computing. NANOMATERIALS (BASEL, SWITZERLAND) 2024; 14:584. [PMID: 38607119 PMCID: PMC11013937 DOI: 10.3390/nano14070584] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 02/20/2024] [Revised: 03/24/2024] [Accepted: 03/25/2024] [Indexed: 04/13/2024]
Abstract
Current computing systems rely on Boolean logic and von Neumann architecture, where computing cells are based on high-speed electron-conducting complementary metal-oxide-semiconductor (CMOS) transistors. In contrast, ions play an essential role in biological neural computing. Compared with CMOS units, the synapse/neuron computing speed is much lower, but the human brain performs much better in many tasks such as pattern recognition and decision-making. Recently, ionic dynamics in oxide electrolyte-gated transistors have attracted increasing attention in the field of neuromorphic computing, which is more similar to the computing modality in the biological brain. In this review article, we start with the introduction of some ionic processes in biological brain computing. Then, electrolyte-gated ionic transistors, especially oxide ionic transistors, are briefly introduced. Later, we review the state-of-the-art progress in oxide electrolyte-gated transistors for ionic neuromorphic computing including dynamic synaptic plasticity emulation, spatiotemporal information processing, and artificial sensory neuron function implementation. Finally, we will address the current challenges and offer recommendations along with potential research directions.
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Affiliation(s)
- Yongli He
- Yongjiang Laboratory (Y-LAB), Ningbo 315202, China; (Y.H.); (Y.Z.)
- National Laboratory of Solid-State Microstructures, Collaborative Innovation Center of Advanced Microstructures, School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China
| | - Yixin Zhu
- Yongjiang Laboratory (Y-LAB), Ningbo 315202, China; (Y.H.); (Y.Z.)
- National Laboratory of Solid-State Microstructures, Collaborative Innovation Center of Advanced Microstructures, School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China
| | - Qing Wan
- Yongjiang Laboratory (Y-LAB), Ningbo 315202, China; (Y.H.); (Y.Z.)
- National Laboratory of Solid-State Microstructures, Collaborative Innovation Center of Advanced Microstructures, School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China
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Fan ZY, Tang Z, Fang JL, Jiang YP, Liu QX, Tang XG, Zhou YC, Gao J. Neuromorphic Computing of Optoelectronic Artificial BFCO/AZO Heterostructure Memristors Synapses. NANOMATERIALS (BASEL, SWITZERLAND) 2024; 14:583. [PMID: 38607116 PMCID: PMC11013421 DOI: 10.3390/nano14070583] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 02/28/2024] [Revised: 03/19/2024] [Accepted: 03/25/2024] [Indexed: 04/13/2024]
Abstract
Compared with purely electrical neuromorphic devices, those stimulated by optical signals have gained increasing attention due to their realistic sensory simulation. In this work, an optoelectronic neuromorphic device based on a photoelectric memristor with a Bi2FeCrO6/Al-doped ZnO (BFCO/AZO) heterostructure is fabricated that can respond to both electrical and optical signals and successfully simulate a variety of synaptic behaviors, such as STP, LTP, and PPF. In addition, the photomemory mechanism was identified by analyzing the energy band structures of AZO and BFCO. A convolutional neural network (CNN) architecture for pattern classification at the Mixed National Institute of Standards and Technology (MNIST) was used and improved the recognition accuracy of the MNIST and Fashion-MNIST datasets to 95.21% and 74.19%, respectively, by implementing an improved stochastic adaptive algorithm. These results provide a feasible approach for future implementation of optoelectronic synapses.
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Affiliation(s)
- Zhao-Yuan Fan
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Zhenhua Tang
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Jun-Lin Fang
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Yan-Ping Jiang
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Qiu-Xiang Liu
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Xin-Gui Tang
- School of Physics and Optoelectric Engineering, Guangdong University of Technology, Guangzhou Higher Education Mega Center, Guangzhou 510006, China; (Z.-Y.F.)
| | - Yi-Chun Zhou
- School of Advanced Materials and Nanotechnology, Xidian University, Xi’an 710126, China
| | - Ju Gao
- Department of Physics, The University of Hong Kong, Hong Kong 999077, China
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Kim T, Yun KS. Photonic synaptic transistors with new electron trapping layer for high performance and ultra-low power consumption. Sci Rep 2023; 13:12583. [PMID: 37537256 PMCID: PMC10400596 DOI: 10.1038/s41598-023-39646-w] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 01/26/2023] [Accepted: 07/28/2023] [Indexed: 08/05/2023] Open
Abstract
Photonic synaptic transistors are being investigated for their potential applications in neuromorphic computing and artificial vision systems. Recently, a method for establishing a synaptic effect by preventing the recombination of electron-hole pairs by forming an energy barrier with a double-layer consisting of a channel and a light absorption layer has shown effective results. We report a triple-layer device created by coating a novel electron-trapping layer between the light-absorption layer and the gate-insulating layer. Compared to the conventional double-layer photonic synaptic structure, our triple-layer device significantly reduces the recombination rate, resulting in improved performance in terms of the output photocurrent and memory characteristics. Furthermore, our photonic synaptic transistor possesses excellent synaptic properties, such as paired-pulse facilitation (PPF), short-term potentiation (STP), and long-term potentiation (LTP), and demonstrates a good response to a low operating voltage of - 0.1 mV. The low power consumption experiment shows a very low energy consumption of 0.01375 fJ per spike. These findings suggest a way to improve the performance of future neuromorphic devices and artificial vision systems.
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Affiliation(s)
- Taewoo Kim
- Department of Electronic Engineering, Sogang University, 35 Baekbeom-ro, Mapo-gu, Seoul, 04107, Korea
| | - Kwang-Seok Yun
- Department of Electronic Engineering, Sogang University, 35 Baekbeom-ro, Mapo-gu, Seoul, 04107, Korea.
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Fu YM, Li H, Wei T, Huang L, Hidayati F, Song A. Sputtered Electrolyte-Gated Transistor with Temperature-Modulated Synaptic Plasticity Behaviors. ACS APPLIED ELECTRONIC MATERIALS 2022; 4:2933-2942. [PMID: 35782154 PMCID: PMC9245437 DOI: 10.1021/acsaelm.2c00395] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.5] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 03/28/2022] [Accepted: 04/25/2022] [Indexed: 05/17/2023]
Abstract
Temperature has always been considered as an essential factor for almost all kinds of semiconductor-based electronic components. In this work, temperature-dependent synaptic plasticity behaviors, which are mimicked by the indium-gallium-zinc oxide thin-film transistors gated with sputtered SiO2 electrolytes, have been studied. With the temperature increasing from 303 to 323 K, the electrolyte capacitance decreases from 0.42 to 0.11 μF cm-2. The mobility increases from 1.4 to 3.7 cm2 V-1 s-1, and the threshold voltage negatively shifts from -0.23 to -0.51 V. Synaptic behaviors under both a single pulse and multiple pulses are employed to study the temperature dependence. With the temperature increasing from 303 to 323 K, the post-synaptic current (PSC) at the resting state increases from 1.8 to 7.3 μA. Under a single gate pulse of 1 V and 1 s, the PSC signal altitude and the PSC retention time decrease from 2.0 to 0.7 μA and 5.1 × 102 to 2.5 ms, respectively. A physical model based on the electric field-induced ion drifting, ionic-electronic coupling, and gradient-coordinated ion diffusion is proposed to understand these temperature-dependent synaptic behaviors. Based on the experimental data on individual transistors, temperature-modulated pattern learning and memorizing behaviors are conceptually demonstrated. The in-depth investigation of the temperature dependence helps pave the way for further electrolyte-gated transistor-based neuromorphic applications.
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Affiliation(s)
- Yang Ming Fu
- Department
of Electrical and Electronic Engineering, The University of Manchester, Manchester M13 9PL, U.K.
| | - Hu Li
- Shandong
Technology Center of Nanodevices and Integration, State Key Laboratory
of Crystal Materials, School of Microelectronics, Shandong University, Jinan 250101, China
| | - Tianye Wei
- Department
of Electrical and Electronic Engineering, The University of Manchester, Manchester M13 9PL, U.K.
| | - Long Huang
- Department
of Electrical and Electronic Engineering, The University of Manchester, Manchester M13 9PL, U.K.
| | - Faricha Hidayati
- Department
of Electrical and Electronic Engineering, The University of Manchester, Manchester M13 9PL, U.K.
| | - Aimin Song
- Department
of Electrical and Electronic Engineering, The University of Manchester, Manchester M13 9PL, U.K.
- Shandong
Technology Center of Nanodevices and Integration, State Key Laboratory
of Crystal Materials, School of Microelectronics, Shandong University, Jinan 250101, China
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Yang Q, Yang H, Lv D, Yu R, Li E, He L, Chen Q, Chen H, Guo T. High-Performance Organic Synaptic Transistors with an Ultrathin Active Layer for Neuromorphic Computing. ACS APPLIED MATERIALS & INTERFACES 2021; 13:8672-8681. [PMID: 33565852 DOI: 10.1021/acsami.0c22271] [Citation(s) in RCA: 4] [Impact Index Per Article: 1.3] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/12/2023]
Abstract
In recent years, much attention has been focused on two-dimensional (2D) material-based synaptic transistor devices because of their inherent advantages of low dimension, simultaneous read-write operation and high efficiency. However, process compatibility and repeatability of these materials are still a big challenge, as well as other issues such as complex transfer process and material selectivity. In this work, synaptic transistors with an ultrathin organic semiconductor layer (down to 7 nm) were obtained by the simple dip-coating process, which exhibited a high current switch ratio up to 106, well off state as low as nearly 10-12 A, and low operation voltage of -3 V. Moreover, various synaptic behaviors were successfully simulated including excitatory postsynaptic current, paired pulse facilitation, long-term potentiation, and long-term depression. More importantly, under ultrathin conditions, excellent memory preservation, and linearity of weight update were obtained because of the enhanced effect of defects and improved controllability of the gate voltage on the ultrathin active layer, which led to a pattern recognition rate up to 85%. This is the first work to demonstrate that the pattern recognition rate, a crucial parameter for neuromorphic computing can be significantly improved by reducing the thickness of the channel layer. Hence, these results not only reveal a simple and effective way to improve plasticity and memory retention of the artificial synapse via thickness modulation but also expand the material selection for the 2D artificial synaptic devices.
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Affiliation(s)
- Qian Yang
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Zhicheng College, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
| | - Huihuang Yang
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
| | - Dongxu Lv
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Rengjian Yu
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Enlong Li
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Lihua He
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Qizhen Chen
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Huipeng Chen
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
| | - Tailiang Guo
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
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Yu R, Li E, Wu X, Yan Y, He W, He L, Chen J, Chen H, Guo T. Electret-Based Organic Synaptic Transistor for Neuromorphic Computing. ACS APPLIED MATERIALS & INTERFACES 2020; 12:15446-15455. [PMID: 32153175 DOI: 10.1021/acsami.9b22925] [Citation(s) in RCA: 30] [Impact Index Per Article: 7.5] [Reference Citation Analysis] [Abstract] [Key Words] [MESH Headings] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/10/2023]
Abstract
Neuromorphic computing inspired by the neural systems in human brain will overcome the issue of independent information processing and storage. An artificial synaptic device as a basic unit of a neuromorphic computing system can perform signal processing with low power consumption, and exploring different types of synaptic transistors is essential to provide suitable artificial synaptic devices for artificial intelligence. Hence, for the first time, an electret-based synaptic transistor (EST) is presented, which successfully shows synaptic behaviors including excitatory/inhibitory postsynaptic current, paired-pulse facilitation/depression, long-term memory, and high-pass filtering. Moreover, a neuromorphic computing simulation based on our EST is performed using the handwritten artificial neural network, which exhibits an excellent recognition accuracy (85.88%) after 120 learning epochs, higher than most reported organic synaptic transistors and close to the ideal accuracy (92.11%). Such a novel synaptic device enriches the diversity of synaptic transistors, laying the foundation for the diversified development of the next generation of neuromorphic computing systems.
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Affiliation(s)
- Rengjian Yu
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Enlong Li
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Xiaomin Wu
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Yujie Yan
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Weixin He
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Lihua He
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Jinwei Chen
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
| | - Huipeng Chen
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
| | - Tailiang Guo
- Institute of Optoelectronic Display, National & Local United Engineering Lab of Flat Panel Display Technology, Fuzhou University, Fuzhou 350002, China
- Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China
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