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For: Sivasubramani S, Mattela V, P R, Pal C, Acharyya A. Nanomagnetic logic based runtime Reconfigurable area efficient and high speed adder design methodology. Nanotechnology 2020;31:18LT02. [PMID: 31986497 DOI: 10.1088/1361-6528/ab704b] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.2] [Reference Citation Analysis] [What about the content of this article? (0)] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/10/2023]
Number Cited by Other Article(s)
1
Sivasubramani S, Debroy S, Acharyya A. Area efficient in-plane nanomagnetic multiplier and convolution architecture design. NANO EXPRESS 2021. [DOI: 10.1088/2632-959x/abf524] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 11/12/2022]
2
Mattela V, Debroy S, Sivasubramani S, Acharyya A. A novel and reliable interlayer exchange coupled nanomagnetic universal logic gate design. NANOTECHNOLOGY 2021;32:095205. [PMID: 33197897 DOI: 10.1088/1361-6528/abcac9] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/11/2023]
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