Photoinduced-reset and multilevel storage transistor memories based on antimony-doped tin oxide nanoparticles floating gate

Spacer Engineering Enables Fine-Tuned Thin Film Microstructure and Efficient Charge Transport for Ultrasensitive 2D Perovskite-Based Heterojunction Phototransistors and Optoelectronic Synapses

2D Ruddlesden-Popper phase layered perovskites (RPLPs) hold great promise for optoelectronic applications. In this study, a series of high-performance heterojunction phototransistors (HPTs) based on RPLPs with different organic spacer cations (namely butylammonium (BA+), cyclohexylammonium (CyHA+), phenethylammonium (PEA+), p-fluorophenylethylammonium (p-F-PEA+), and 2-thiophenethylammonium (2-ThEA+)) are fabricated successfully, in which high-mobility organic semiconductor 2,7-dioctyl[1]benzothieno[3,2-b]benzothiophene is adopted to form type II heterojunction channels with RPLPs. The 2-ThEA+-RPLP-based HPTs show the highest photosensitivity of 3.18 × 107 and the best detectivity of 9.00 × 1018 Jones, while the p-F-PEA+-RPLP-based ones exhibit the highest photoresponsivity of 5.51 × 106 A W-1 and external quantum efficiency of 1.32 × 109%, all of which are among the highest reported values to date. These heterojunction systems also mimicked several optically controllable fundamental characteristics of biological synapses, including excitatory postsynaptic current, paired-pulse facilitation, and the transition from short-term memory to long-term memory states. The device based on 2-ThEA+-RPLP film shows an ultra-high PPF index of 234%. Moreover, spacer engineering brought fine-tuned thin film microstructures and efficient charge transport/transfer, which contributes to the superior photodetection performance and synaptic functions of these RPLP-based HPTs. In-depth structure-property correlations between the organic spacer cations/RPLPs and thin film microstructure/device performance are systematically investigated.

Organic multilevel (opto)electronic memories towards neuromorphic applications

In the past decades, neuromorphic computing has attracted the interest of the scientific community due to its potential to circumvent the von Neumann bottleneck. Organic materials, owing to their fine tunablility and their ability to be used in multilevel memories, represent a promising class of materials to fabricate neuromorphic devices with the key requirement of operation with synaptic weight. In this review, recent studies of organic multilevel memory are presented. The operating principles and the latest achievements obtained with devices exploiting the main approaches to reach multilevel operation are discussed, with emphasis on organic devices using floating gates, ferroelectric materials, polymer electrets and photochromic molecules. The latest results obtained using organic multilevel memories for neuromorphic circuits are explored and the major advantages and drawbacks of the use of organic materials for neuromorphic applications are discussed.

Controlling the Carrier Injection Efficiency in 3D Nanocrystalline Silicon Floating Gate Memory by Novel Design of Control Layer

Three-dimensional NAND flash memory with high carrier injection efficiency has been of great interest to computing in memory for its stronger capability to deal with big data than that of conventional von Neumann architecture. Here, we first report the carrier injection efficiency of 3D NAND flash memory based on a nanocrystalline silicon floating gate, which can be controlled by a novel design of the control layer. The carrier injection efficiency in nanocrystalline Si can be monitored by the capacitance-voltage (C-V) hysteresis direction of an nc-Si floating-gate MOS structure. When the control layer thickness of the nanocrystalline silicon floating gate is 25 nm, the C-V hysteresis always maintains the counterclockwise direction under different step sizes of scanning bias. In contrast, the direction of the C-V hysteresis can be changed from counterclockwise to clockwise when the thickness of the control barrier is reduced to 22 nm. The clockwise direction of the C-V curve is due to the carrier injection from the top electrode into the defect state of the SiN_x control layer. Our discovery illustrates that the thicker SiN_x control layer can block the transfer of carriers from the top electrode to the SiN_x, thereby improving the carrier injection efficiency from the Si substrate to the nc-Si layer. The relationship between the carrier injection and the C-V hysteresis direction is further revealed by using the energy band model, thus explaining the transition mechanism of the C-V hysteresis direction. Our report is conducive to optimizing the performance of 3D NAND flash memory based on an nc-Si floating gate, which will be better used in the field of in-memory computing.