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For: Hussain I, Singh A, Chaudhury S. A Review on the Effects of Technology on CMOS and CPL Logic Style on Performance, Speed and Power Dissipation. 2018 IEEE Electron Devices Kolkata Conference (EDKCON) 2018. [DOI: 10.1109/edkcon.2018.8770506] [Citation(s) in RCA: 2] [Impact Index Per Article: 0.3] [Reference Citation Analysis] [What about the content of this article? (0)] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 07/19/2023]
Number Cited by Other Article(s)
1
Hussain I, Chaudhury S. Fast and High-Performing 1-Bit Full Adder Circuit Based on Input Switching Activity Patterns and Gate Diffusion Input Technique. CIRCUITS, SYSTEMS, AND SIGNAL PROCESSING 2021;40:1762-1787. [DOI: 10.1007/s00034-020-01550-3] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Track Full Text] [Subscribe] [Scholar Register] [Received: 11/21/2019] [Revised: 09/10/2020] [Accepted: 09/13/2020] [Indexed: 07/19/2023]
2
Hussain I, Chaudhury S. A New 4-2 Compressor for VLSI Circuits and Systems. ADVANCES IN INTELLIGENT SYSTEMS AND COMPUTING 2021:409-414. [DOI: 10.1007/978-981-15-5029-4_33] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.3] [Reference Citation Analysis] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 07/19/2023]
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