A 1.2-V 140-nW 10-bit Sigma-Delta Modulator for Electroencephalogram Applications

Progress in Data Acquisition of Wearable Sensors

Wearable sensors have demonstrated wide applications from medical treatment, health monitoring to real-time tracking, human-machine interface, smart home, and motion capture because of the capability of in situ and online monitoring. Data acquisition is extremely important for wearable sensors, including modules of probes, signal conditioning, and analog-to-digital conversion. However, signal conditioning, analog-to-digital conversion, and data transmission have received less attention than probes, especially flexible sensing materials, in research on wearable sensors. Here, as a supplement, this paper systematically reviews the recent progress of characteristics, applications, and optimizations of transistor amplifiers and typical filters in signal conditioning, and mainstream analog-to-digital conversion strategies. Moreover, possible research directions on the data acquisition of wearable sensors are discussed at the end of the paper.

15-nW Biopotential LPFs in 0.35- μm CMOS using subthreshold-source-follower Biquads with and without gain compensation

Most biopotential readout front-ends rely on the g m- C lowpass filter (LPF) for forefront signal conditioning. A small g m realizes a large time constant ( τ = C / g m) suitable for ultra-low-cutoff filtering, saving both power and area. Yet, the noise and linearity can be compromised, given that each g m cell can involve one or several noisy and nonlinear V- I conversions originated from the active devices. This paper proposes the subthreshold-source-follower (SSF) Biquad as a prospective alternative. It features: 1) a very small number of active devices reducing the noise and nonlinearity footsteps; 2) No explicit feedback in differential implementation, and 3) extension of filter order by cascading. This paper presents an in-depth treatment of SSF Biquad in the nW-power regime, analyzing its power and area tradeoffs with gain, linearity and noise. A gain-compensation (GC) scheme addressing the gain-loss problem of NMOS-based SSF Biquad due to the body effect is also proposed. Two 100-Hz 4th-order Butterworth LPFs using the SSF Biquads with and without GC were fabricated in 0.35- μm CMOS. Measurement results show that the non-GC (GC) LPF can achieve a DC gain of -3.7 dB (0 dB), an input-referred noise of 36 μV rms (29 μV rms ), a HD3@60 Hz of -55.2 dB ( - 60.7 dB) and a die size of 0.11 mm² (0.08 mm²). Both LPFs draw 15 nW at 3 V. The achieved figure-of-merits (FoMs) are favorably comparable with the state-of-the-art.

A 1V low power second-order delta-sigma modulator for biomedical signal application

This paper presents the design and implementation of a low-power delta-sigma modulator for biomedical application with a standard 90 nm CMOS technology. The delta-sigma architecture is implemented as 2nd order feedforward architecture. A low quiescent current operational transconductance amplifier (OTA) is utilized to reduce power consumption. This delta-sigma modulator operated in 1V power supply, and achieved 64.87 dB signal to noise distortion ratio (SNDR) at 10 KHz bandwidth with an oversampling ratio (OSR) of 64. The power consumption is 17.14 µW, and the figure-of-merit (FOM) is 0.60 pJ/conv.

Analog integrated circuits design for processing physiological signals

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.