An Implantable Versatile Electrode-Driving ASIC for Chronic Epidural Stimulation in Rats

A multi-channel stimulator with an active electrode array implant for vagal-cardiac neuromodulation studies

BACKGROUND

Implantable vagus nerve stimulation is a promising approach for restoring autonomic cardiovascular functions after heart transplantation. For successful treatment a system should have multiple electrodes to deliver precise stimulation and complex neuromodulation patterns.

METHODS

This paper presents an implantable multi-channel stimulation system for vagal-cardiac neuromodulation studies in swine species. The system comprises an active electrode array implant percutaneously connected to an external wearable controller. The active electrode array implant has an integrated stimulator ASIC mounted on a ceramic substrate connected to an intraneural electrode array via micro-rivet bonding. The implant is silicone encapsulated for biocompatibility and implanted lifetime. The stimulation parameters are remotely transmitted via a Bluetooth telemetry link.

RESULTS

The size of the encapsulated active electrode array implant is 8 mm × 10 mm × 3 mm. The stimulator ASIC has 10-bit current amplitude resolution and 16 independent output channels, each capable of delivering up to 550 µA stimulus current and a maximum voltage of 20 V. The active electrode array implant was subjected to in vitro accelerated lifetime testing at 70 °C for 7 days with no degradation in performance. After over 2 h continuous stimulation, the surface temperature change of the implant was less than 0.5 °C. In addition, in vivo testing on the sciatic nerve of a male Göttingen minipig demonstrated that the implant could effectively elicit an EMG response that grew progressively stronger on increasing the amplitude of the stimulation.

CONCLUSIONS

The multi-channel stimulator is suitable for long term implantation. It shows potential as a useful tool in vagal-cardiac neuromodulation studies in animal models for restoring autonomic cardiovascular functions after heart transplantation.

An Energy-Efficient, Inexpensive, Spinal Cord Stimulator with Adaptive Voltage Compliance for Freely Moving Rats

This paper presents the design and fabrication of an implantable control unit intended for epidural spinal cord stimulation (ESCS) in rats. The device offers full programmability over stimulation parameters and delivers a constant current to an electrode array to be located within the spinal canal. It implements an adaptive voltage compliance in order to reduce the unnecessary power dissipation often experienced in current-controlled stimulation (CCS) devices. The compliance is provided by an adjustable boost converter that offers a voltage output in the range of 6.24 V to 28 V, allowing the device to deliver currents up to 1 mA through loads up to $25 \mathrm {k}\Omega $. The system has been fabricated using discrete components, paving the way to an inexpensive product that can easily be manufactured and batch produced. The control unit occupies a total volume of ~13.5 cm³ and therefore fulfills the size restrictions of a system to be implanted in a rat. Results indicate that by adjusting the voltage compliance a total power efficiency up to 35.5% can be achieved, saving around 60 mW when using lower stimulation currents or operating on smaller impedances. The achieved efficiency is the highest compared to similar stateof-the-art systems.

An ASIC for Recording and Stimulation in Stacked Microchannel Neural Interfaces

This paper presents an active microchannel neural interface (MNI) using seven stacked application specific integrated circuits (ASICs). The approach provides a solution to the present problem of interconnect density in three-dimensional (3-D) MNIs. The 4 mm² ASIC is implemented in 0.35 μm high-voltage CMOS technology. Each ASIC is the base for seven microchannels each with three electrodes in a pseudo-tripolar arrangement. Multiplexing allows stimulating or recording from any one of 49 channels, across seven ASICs. Connections to the ASICs are made with a five-line parallel bus. Current controlled biphasic stimulation from 5 to 500 μA has been demonstrated with switching between channels and ASICs. The high-voltage technology gives a compliance of 40 V for stimulation, appropriate for the high impedances within microchannels. High frequency biphasic stimulation, up to 40 kHz is achieved, suitable for reversible high frequency nerve blockades. Recording has been demonstrated with mV level signals; common-mode inputs are differentially distorted and limit the CMRR to 40 dB. The ASIC has been used in vitro in conjunction with an oversize (2 mm diameter) microchannel in phosphate buffered saline, demonstrating attenuation of interference from outside the microchannel and tripolar recording of signals from within the microchannel. By using five-lines for 49 active microchannels the device overcomes limitations when connecting many electrodes in a 3-D miniaturized nerve interface.

A Multichannel High-Frequency Power-Isolated Neural Stimulator With Crosstalk Reduction

In neuroprostheses applications requiring simultaneous stimulations on a multielectrode array, electric crosstalk, the spatial interaction between electric fields from various electrodes is a major limitation to the performance of multichannel stimulation. This paper presents a multichannel stimulator design that combines high-frequency current stimulation (using biphasic charge-balanced chopped pulse profile) with a switched-capacitor power isolation method. The approach minimizes crosstalk and is particularly suitable for fully integrated realization. A stimulator fabricated in a 0.6 μm CMOS high-voltage technology is presented. It is used to implement a multichannel, high-frequency, power-isolated stimulator. Crosstalk reduction is demonstrated with electrodes in physiological media while the efficacy of the high-frequency stimulator chip is proven in vivo. The stimulator provides fully independent operation on multiple channels and full flexibility in the design of neural modulation protocols.

Realizing flexible bioelectronic medicines for accessing the peripheral nerves - technology considerations

Patients suffering from conditions such as paralysis, diabetes or rheumatoid arthritis could in the future be treated in a personalised manner using bioelectronic medicines (BEms) (Nat Rev Drug Discov 13:399–400, 2013, Proc Natl Acad Sci USA 113:8284–9, 2016, J Intern Med 282:37–45, 2017). To deliver this personalised therapy based on electricity, BEms need to target various sites in the human body and operate in a closed-loop manner. The specific conditions and anatomy of the targeted sites pose unique challenges in the development of BEms. With a focus on BEms based on flexible substrates for accessing small peripheral nerves, this paper discusses several system-level technology considerations related to the development of such devices. The focus is mainly on miniaturisation and long-term operation. We present an overview of common substrate and electrode materials, related processing methods, and discuss assembly, miniaturisation and long-term stability issues.

Four-Wire Interface ASIC for a Multi-Implant Link

This paper describes an on-chip interface for recovering power and providing full-duplex communication over an AC-coupled 4-wire lead between active implantable devices. The target application requires two modules to be implanted in the brain (cortex) and upper chest; connected via a subcutaneous lead. The brain implant consists of multiple identical "optrodes" that facilitate a bidirectional neural interface (electrical recording and optical stimulation), and the chest implant contains the power source (battery) and processor module. The proposed interface is integrated within each optrode ASIC allowing full-duplex and fully-differential communication based on Manchester encoding. The system features a head-to-chest uplink data rate (up to 1.6 Mbps) that is higher than that of the chest-to-head downlink (100 kbps), which is superimposed on a power carrier. On-chip power management provides an unregulated 5-V dc supply with up to 2.5-mA output current for stimulation, and two regulated voltages (3.3 and 3 V) with 60-dB power supply rejection ratio for recording and logic circuits. The 4-wire ASIC has been implemented in a 0.35-[Formula: see text] CMOS technology, occup-ying a 1.5-mm2 silicon area, and consumes a quiescent current of [Formula: see text]. The system allows power transmission with measured efficiency of up to 66% from the chest to the brain implant. The downlink and uplink communication are successfully tested in a system with two optrodes and through a 4-wire implantable lead.

16-Channel biphasic current-mode programmable charge balanced neural stimulation

BACKGROUND

Neural stimulation is an important method used to activate or inhibit action potentials of the neuronal anatomical targets found in the brain, central nerve and peripheral nerve. The neural stimulator system produces biphasic pulses that deliver balanced charge into tissue from single or multichannel electrodes. The timing and amplitude of these biphasic pulses are precisely controlled by the neural stimulator software or imbedded algorithms. Amplitude mismatch between the anodic current and cathodic current of the biphasic pulse will cause permanently damage for the neural tissues. The main goal of our circuit and layout design is to implement a 16-channel biphasic current mode programmable neural stimulator with calibration to minimize the current mismatch caused by inherent complementary metal oxide semiconductor (CMOS) manufacturing processes.

METHODS

This paper presents a 16-channel constant current mode neural stimulator chip. Each channel consists of a 7-bit controllable current DAC used as sink and source current driver. To reduce the LSB quantization error and the current mismatch, an automatic calibration circuit and flow diagram is presented in this paper. There are two modes of operation of the stimulator chip-namely, stimulation mode and calibration mode. The chip also includes a digital interface used to control the stimulator parameters and calibration levels specific for each individual channel.

RESULTS

This stimulator Application Specific Integrated Circuit (ASIC) is designed and fabricated in a 0.18 μm High-Voltage CMOS technology that allows for ±20 V power supply. The full-scale stimulation current was designed to be at 1 mA per channel. The output current was shown to be constant throughout the timing cycles over a wide range of electrode load impedances. The calibration circuit was also designed to reduce the effect of CMOS process variation of the P-channel metal oxide semiconductor (PMOS) and N-channel metal oxide semiconductor (NMOS) devices that will result in charge delivery to have less than 0.13% error.

CONCLUSIONS

A 16-channel integrated biphasic neural stimulator chip with calibration is presented in this paper. The stimulator circuit design was simulated and the chip layout was completed. The chip layout was verified using design rules check (DRC) and layout versus schematic (LVS) design check using computer aided design (CAD) software. The test results we presented show constant current stimulation with charge balance error within 0.13% least-significant-bit (LSB). This LSB error was consistent throughout a variety stimulation patterns and electrode load impedances.

A Fully Integrated Wireless SoC for Motor Function Recovery After Spinal Cord Injury

This paper presents a wirelessly powered, fully integrated system-on-a-chip (SoC) supporting 160-channel stimulation, 16-channel recording, and 48-channel bio-impedance characterization to enable partial motor function recovery through epidural spinal cord electrical stimulation. A wireless transceiver is designed to support quasi full-duplex data telemetry at a data rate of 2 Mb/s. Furthermore, a unique in situ bio-impedance characterization scheme based on time-domain analysis is implemented to derive the Randles cell electrode model of the electrode-electrolyte interface. The SoC supports concurrent stimulation and recording while the high-density stimulator array meets an output compliance voltage of up to ±10 V with versatile stimulus programmability. The SoC consumes 18 mW and occupies a chip area of 5.7 mm × 4.4 mm using 0.18 μm high-voltage CMOS process. In our in vivo rodent experiment, the SoC is used to perform wireless recording of EMG responses while stimulation is applied to enable the standing and stepping of a paralyzed rat. To facilitate the system integration, a novel thin film polymer packaging technique is developed to provide a heterogeneous integration of the SoC, coils, discrete components, and high-density flexible electrode array, resulting in a miniaturized prototype implant with a weight and form factor of 0.7 g and 0.5 cm3, respectively.

Vagus nerve stimulation: state of the art of stimulation and recording strategies to address autonomic function neuromodulation

OBJECTIVE

Neural signals along the vagus nerve (VN) drive many somatic and autonomic functions. The clinical interest of VN stimulation (VNS) is thus potentially huge and has already been demonstrated in epilepsy. However, side effects are often elicited, in addition to the targeted neuromodulation.

APPROACH

This review examines the state of the art of VNS applied to two emerging modulations of autonomic function: heart failure and obesity, especially morbid obesity.

MAIN RESULTS

We report that VNS may benefit from improved stimulation delivery using very advanced technologies. However, most of the results from fundamental animal studies still need to be demonstrated in humans.

Flexible active electrode arrays with ASICs that fit inside the rat's spinal canal

Epidural spinal cord electrical stimulation (ESCS) has been used as a means to facilitate locomotor recovery in spinal cord injured humans. Electrode arrays, instead of conventional pairs of electrodes, are necessary to investigate the effect of ESCS at different sites. These usually require a large number of implanted wires, which could lead to infections. This paper presents the design, fabrication and evaluation of a novel flexible active array for ESCS in rats. Three small (1.7 mm²) and thin (100 μm) application specific integrated circuits (ASICs) are embedded in the polydimethylsiloxane-based implant. This arrangement limits the number of communication tracks to three, while ensuring maximum testing versatility by providing independent access to all 12 electrodes in any configuration. Laser-patterned platinum-iridium foil forms the implant’s conductive tracks and electrodes. Double rivet bonds were employed for the dice microassembly. The active electrode array can deliver current pulses (up to 1 mA, 100 pulses per second) and supports interleaved stimulation with independent control of the stimulus parameters for each pulse. The stimulation timing and pulse duration are very versatile. The array was electrically characterized through impedance spectroscopy and voltage transient recordings. A prototype was tested for long term mechanical reliability when subjected to continuous bending. The results revealed no track or bond failure. To the best of the authors’ knowledge, this is the first time that flexible active electrode arrays with embedded electronics suitable for implantation inside the rat’s spinal canal have been proposed, developed and tested in vitro.