Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing

An electrode-impedance-aware neurostimulator IC that achieves low-power consumption and fast charge balance

Implantable neural stimulation is becoming increasingly popular for treating neurologically impaired patients, restoring neural functions which would otherwise be lost due to diseases or injuries. The charge balance of the stimulus pulses is of paramount importance for the long-term safety of the electrode-tissue interface. This paper presents a novel neurostimulator integrated circuit in which two novel charge balancing schemes are proposed. One is based on acquiring the access resistance part (RS) of the inter-electrode impedance. Thanks to its adaptive anodic phase, the RS-based charge balance circuit does not require an additional discharge phase, achieving faster charge balance than most existing stimulator ICs. The other scheme is based on acquiring the double-layer capacitance part (CDL) of the inter-electrode impedance and the entire charge balancing process (inc. monitoring, computation and compensation) is performed in the analog domain. This is in sharp contrast to the existing electrode-impedance-aware charge balancing schemes which require ADCs and compute the net charge in the digital domain. Hence the new impedance-aware charge-balancing scheme is faster and more power friendly. The impedance-aware stimulator ASIC has been implemented using X-FAB's 180-nm CMOS process. The post-layout simulation results suggest a good charge balance is achieved as the voltage deviation from the electrode offset voltage on the electrode after the charge compensation reduces to 2.64 mV and -1.39 mV under the RS-based and CDL-based charge balancing schemes, respectively. The additional power overhead due to the proposed CDL-based charge balancer circuit is 2.46 μW at a stimulation rate of 400 Hz.

A Definition of Neuromodulation and Classification of Implantable Electrical Modulation for Chronic Pain

OBJECTIVES

Neuromodulation therapies use a variety of treatment modalities (eg, electrical stimulation) to treat chronic pain. These therapies have experienced rapid growth that has coincided with escalating confusion regarding the nomenclature surrounding these neuromodulation technologies. Furthermore, studies are often published without a complete description of the effective stimulation dose, making it impossible to replicate the findings. To improve clinical care and facilitate dissemination among the public, payors, research groups, and regulatory bodies, there is a clear need for a standardization of terms.

APPROACH

We formed an international group of authors comprising basic scientists, anesthesiologists, neurosurgeons, and engineers with expertise in neuromodulation. Because the field of neuromodulation is extensive, we chose to focus on creating a taxonomy and standardized definitions for implantable electrical modulation of chronic pain.

RESULTS

We first present a consensus definition of neuromodulation. We then describe a classification scheme based on the 1) intended use (the site of modulation and its indications) and 2) physical properties (waveforms and dose) of a neuromodulation therapy.

CONCLUSIONS

This framework will help guide future high-quality studies of implantable neuromodulatory treatments and improve reporting of their findings. Standardization with this classification scheme and clear definitions will help physicians, researchers, payors, and patients better understand the applications of implantable electrical modulation for pain and guide informed treatment decisions.

Trends in volumetric-energy efficiency of implantable neurostimulators: a review from a circuits and systems perspective

This paper presents a comprehensive review of state-of-the-art, commercially available neurostimulators. We analyse key design parameters and performance metrics of 45 implantable medical devices across six neural target categories: deep brain, vagus nerve, spinal cord, phrenic nerve, sacral nerve and hypoglossal nerve. We then benchmark these alongside modern cardiac pacemaker devices that represent a more established market. This work studies trends in device size, electrode number, battery technology (i.e., primary and secondary use and chemistry), power consumption and longevity. This information is analysed to show the course of design decisions adopted by industry and identifying opportunity for further innovation. We identify fundamental limits in power consumption, longevity and size as well as the interdependencies and trade-offs. We propose a figure of merit to quantify volumetric efficiency within specific therapeutic targets, battery technologies/capacities, charging capabilities and electrode count. Finally, we compare commercially available implantable medical devices with recently developed systems in the research community. We envisage this analysis to aid circuit and system designers in system optimisation and identifying innovation opportunities, particularly those related to low power circuit design techniques.

On the Design of an Efficient Inductive Wireless Power Transfer for Passive Neurostimulation Systems

In this paper, a minimally invasive wireless powered electronic lens (e-lens) with passive electrodes is presented for an ocular electrical stimulation. Previous research has focused on the differentiation property of the induction phenomenon and half wave rectifiers. However, these approaches are generally application specific, non efficient, suitable for low current, and deliver monophasic current stimulation. Existing rectifier-based techniques can lead to safety concerns as the offset voltage could change unpredictably. A new wireless power transfer circuit is presented for the design of an efficient system to wirelessly deliver charge-balanced biphasic waveforms through passive electrodes for transcorneal electrical stimulation. The absence of active components allows the development of a flexible e-lens system for therapeutic electrical stimulation of the eye.

A Charge Balanced Neural Stimulator Silicon Chip for Human-Machine Interface

This paper proposes a neural stimulator silicon chip design with an improved charge balancing technology. The proposed neural stimulation integrated circuit (IC) uses two charge balancing modules including synchronous charge detection module and short-time pulse insertion module. The synchronous charge detection module is designed based on a current splitter with ultra-small output current and an integrator circuit for neural stimulation pulse width control, which greatly reduces the residual charge remained on the electrode-tissue interface. The short-time pulse insertion module is designed based on the electrode voltage detection and compensation current control, which further reduces the accumulated residual charge and keeps the electrode voltage within a safety range of ±25 mV during multiple stimulation cycles. Finally, this neural stimulator is implemented in TSMC 0.18-μm CMOS process technology, and the chip function is tested and verified in both experiments with the electrode-tissue RC model and the PBS saline solution environment. The measurement result shows the neural stimulator chip achieves improved charge balancing with the residual charge smaller than 0.95 nC, which is the lowest compared to the traditional neural stimulator chips.

Advances in Neural Recording and Stimulation Integrated Circuits

In the past few decades, driven by the increasing demands in the biomedical field aiming to cure neurological diseases and improve the quality of daily lives of the patients, researchers began to take advantage of the semiconductor technology to develop miniaturized and power-efficient chips for implantable applications. The emergence of the integrated circuits for neural prosthesis improves the treatment process of epilepsy, hearing loss, retinal damage, and other neurological diseases, which brings benefits to many patients. However, considering the safety and accuracy in the neural prosthesis process, there are many research directions. In the process of chip design, designers need to carefully analyze various parameters, and investigate different design techniques. This article presents the advances in neural recording and stimulation integrated circuits, including (1) a brief introduction of the basics of neural prosthesis circuits and the repair process in the bionic neural link, (2) a systematic introduction of the basic architecture and the latest technology of neural recording and stimulation integrated circuits, (3) a summary of the key issues of neural recording and stimulation integrated circuits, and (4) a discussion about the considerations of neural recording and stimulation circuit architecture selection and a discussion of future trends. The overview would help the designers to understand the latest performances in many aspects and to meet the design requirements better.

Design of Dual-Mode Stimulus Chip With Built-In High Voltage Generator for Biomedical Applications

In this work, a dual-mode stimulus chip with a built-in high voltage generator was proposed to offer a broad-range current or voltage stimulus patterns for biomedical applications. With an on-chip and built-in high voltage generator, this stimulus chip could generate the required high voltage supply without additional supply voltage. With a nearly 20 V operating voltage, the overstress and reliability issues of the stimulus circuits were thoroughly considered and carefully addressed in this work. This stimulus system only requires an area of 0.22 mm² per single channel and is fully on-chip implemented without any additional external components. The dual-mode stimulus chip was fabricated in a 0.25-μm 2.5V/5V/12V CMOS (complementary metal-oxide-semiconductor) process, which can generate the biphasic current or voltage stimulus pulses. The current level of stimulus is up to 5 mA, and the voltage level of stimulus can be up to 10 V. Moreover, this chip has been successfully applied to stimulate a guinea pig in an animal experiment. The proposed dual-mode stimulus system has been verified in electrical tests and also demonstrated its stimulation function in animal experiments.

An Ultra High-Frequency 8-Channel Neurostimulator Circuit With [Formula: see text] Peak Power Efficiency

In order to recruit neurons in excitable tissue, constant current neural stimulators are commonly used. Recently, ultra high-frequency (UHF) stimulation has been proposed and proven to have the same efficacy as constant-current stimulation. UHF stimulation uses a fundamentally different way of activating the tissue: each stimulation phase is made of a burst of current pulses with adjustable amplitude injected into the tissue at a high (e.g., [Formula: see text]) frequency. This paper presents the design, integrated circuit (IC) implementation, and measurement results of a power efficient multichannel UHF neural stimulator. The core of the neurostimulator is based on our previously proposed architecture of an inductor-based buck-boost dc-dc converter without the external output capacitor. The ultimate goal of this work is to increase the power efficiency of the UHF stimulator for multiple-channel operation, while keeping the number of external components minimal. To this end, a number of novel approaches were employed in the integrated circuit design domain. More specifically, a novel zero-current detection scheme is proposed. It allows to remove the freewheel diode typically used in dc-dc converters to prevent current to flow back from the load to the inductor. Furthermore, a gate-driver circuit is implemented which allows the use of thin gate-oxide transistors as high-voltage switches. By doing so, and exploiting the fundamental working principle of the proposed current-controlled UHF stimulator, the need for a high-voltage supply is eliminated and the stimulator is powered up from a [Formula: see text] input voltage. Both the current detection technique and the gate driving circuit of the current implementation allow to boost the power efficiency up to [Formula: see text] when compared to previous UHF stimulator works. A peak power efficiency of [Formula: see text] is achieved, while 8 independent channels with 16 fully configurable electrodes are used. The circuit is implemented in a [Formula: see text] HV process, and the total chip area is [Formula: see text].

Comments on "Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing"

This manuscript points out some mistakes in the Introduction and in the table of comparison of a paper already published in this journal by Hsu and Schmid [1]. Although the main claim of [1] is still preserved, we believe the paper needs to be rectified for scientific correctness of the work.

A Multichannel High-Frequency Power-Isolated Neural Stimulator With Crosstalk Reduction

In neuroprostheses applications requiring simultaneous stimulations on a multielectrode array, electric crosstalk, the spatial interaction between electric fields from various electrodes is a major limitation to the performance of multichannel stimulation. This paper presents a multichannel stimulator design that combines high-frequency current stimulation (using biphasic charge-balanced chopped pulse profile) with a switched-capacitor power isolation method. The approach minimizes crosstalk and is particularly suitable for fully integrated realization. A stimulator fabricated in a 0.6 μm CMOS high-voltage technology is presented. It is used to implement a multichannel, high-frequency, power-isolated stimulator. Crosstalk reduction is demonstrated with electrodes in physiological media while the efficacy of the high-frequency stimulator chip is proven in vivo. The stimulator provides fully independent operation on multiple channels and full flexibility in the design of neural modulation protocols.