A Real-Time Vital-Sign Monitoring in the Physical Domain on a Mixed-Signal Reconfigurable Platform

A 2.2 nW Analog Electrocardiogram Processor based on Stochastic Resonance Achieving a 99.94% QRS Complex Detection Sensitivity

This paper presents an ultra-low power electrocardiogram (ECG) processor that can detect QRS-waves in real time as the data streams in. The processor performs out-of-band noise suppression via a linear filter, and in-band noise suppression via a nonlinear filter. The nonlinear filter also enhances the QRS-waves by facilitating stochastic resonance. The processor identifies the QRS-waves on noise-suppressed and enhanced recordings using a constant threshold detector. For energy-efficiency and compactness, the processor exploits current-mode analog signal processing techniques, which significantly reduces the design complexity when implementing the second-order dynamics of the nonlinear filter. The processor is designed and implemented in TSMC 65 nm CMOS technology. In terms of detection performance, the processor achieves an average F1 = 99.88% over the MIT-BIH Arrhythmia database and outperforms all previous ultra-low power ECG processors. The processor is the first that is validated against noisy ECG recordings of MIT-BIH NST and TELE databases, where it achieves better detection performances than most digital algorithms run on digital platforms. The design has a footprint of 0.08 mm² and dissipates 2.2 nW when supplied by a single 1V supply, making it the first ultra-low power and real-time processor that facilitates stochastic resonance.

A Stochastic Resonance P- and T-wave Detection Algorithm

An algorithm to detect P- and T-waves in an electrocardiogram (ECG) signal is presented. The algorithm has physical origins inspired by weak signal detection by leveraging stochastic resonance (SR) in a well potential. Specifically, a particle inside an underdamped monostable well is introduced with the ECG signal. The parameters defining the well and system characteristics are optimized towards enhancing the P-, R-, and T -waves while suppressing the other portions including noise-only sections. The enhanced features are detected by thresholding. Based on the performance obtained from the QT database, the algorithm achieves an average sensitivity of 99.97% for P-waves and an average sensitivity of 99.35% for T-waves, better than most P- and T-wave detection algorithms reported. Clinical Relevance- The proposed SR algorithm achieves high P- and T-wave detection performance and can potentially be integrated with implantable long-term cardiac monitors for patients experiencing rare symptoms without deteriorating the battery life.

A Reconfigurable Differential-to-Single-Ended Autonomous Current Adaptation Buffer Amplifier Suitable for Biomedical Applications

A reconfigurable differential-to-single-ended autonomous current adaptation buffer amplifier (ACABA) is proposed. The ACABA, based on floating-gate technologies, is a capacitive circuit, of which output DC level and bandwidth can be adjusted by programming charges on floating nodes. The gain is variable by switching different amounts of capacitors without altering the output DC level. Without extra sensing and control circuitries, the current consumption of the proposed ACABA increases spontaneously when the input signal is fast or large, achieving a high slew rate. The supply current dwindles back to the low quiescent level autonomously when the output voltage reaches equilibrium. Therefore, the proposed ACABA is power-efficient and suitable for processing physiological signals. A prototype ACABA has been designed and fabricated in a [Formula: see text] CMOS process occupying an area of [Formula: see text]. When loaded by a [Formula: see text] capacitor, it consumes [Formula: see text] to achieve a unity-gain bandwidth of [Formula: see text] with a measured IIP2 value of [Formula: see text] and a slew rate of [Formula: see text].

MBioTracker: Multimodal Self-Aware Bio-Monitoring Wearable System for Online Workload Detection

Cognitive workload affects operators' performance principally in high-risk or time-demanding situations and when multitasking is required. An online cognitive workload monitoring system can provide valuable inputs to decision-making instances, such as the operator's state of mind and resulting performance. Therefore, it can allow potential adaptive support to the operator. This work presents a new design of a wearable embedded system for online cognitive workload monitoring. This new wearable system consists of, on the hardware side, a multi-channel physiological signals acquisition (respiration cycles, heart rate, skin temperature, and pulse waveform) and a low-power processing platform. Further, on the software side, our wearable embedded system includes a novel energy-aware bio-signal processing algorithm. We also use the concept of application self-awareness to enable energy-scalable embedded machine learning algorithms and methods for online subjects' cognitive workload monitoring. Our results show that this new wearable system can continuously monitor multiple bio-signals, compute their key features, and provide reliable detection of high and low cognitive workload levels with a time resolution of 1 minute and a battery lifetime of 14.58 h in our experimental conditions. It achieves a detection accuracy of 76.6% (2.6% lower than analogous offline computer-based analysis) with a sensitivity of 77.04% and a specificity of 81.75%, on a simulated drone rescue mission task. Moreover, by applying our self-aware monitoring to exploit different energy-scalable modes, we can increase battery lifetime by 51.6% (up to 22.11 hours) while incurring an insignificant accuracy loss of 1.07%.

A 1.2nW Analog Electrocardiogram Processor Achieving a 99.63% QRS Complex Detection Sensitivity

An energy-efficient electrocardiogram (ECG) processor for real-time QRS detection is presented. The proposed algorithm is based on the Pan-Tompkins algorithm and it is implemented in the analog domain leveraging ultra-low power analog electronics biased in subthreshold. Operational transconductance amplifiers with ∼100 mV linear range are used in almost all of the processing blocks, while squaring is performed on current signals. Additionally, instead of adaptive thresholding, a fixed-level thresholding is performed, thereby eliminating the need for additional blocks such as memory and threshold update. The processor is designed in 65 nm TSMC CMOS technology and has a footprint of 0.078 mm². When supplied by a 1 V supply, the processor consumes 1.2 nW. Using the recordings in the MIT-BIH database, the processor achieves an average QRS detection sensitivity of 99.63% and positive predictivity of 99.47%.

Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays

Floating-gate (FG) transistors are a primary means of providing nonvolatile digital memory in standard CMOS processes, but they are also key enablers for large-scale programmable analog systems, as well. Such programmable analog systems are often designed for battery-powered and resource-constrained applications, which require the memory cells to program quickly and with low infrastructural overhead. To meet these needs, we present a four-transistor analog floating-gate memory cell that offers both voltage and current outputs and has linear programming characteristics. Furthermore, we present a simple programming circuit that forces the memory cell to converge to targets with 13.0 bit resolution. Finally, we demonstrate how to use the FG memory cell and the programmer circuit in array configurations. We show how to program an array in either a serial or parallel fashion and demonstrate the effectiveness of the array programming with an application of a bandpass filter array.