Spatial Information Based OSort for Real-Time Spike Sorting Using FPGA

Automatical Spike Sorting With Low-Rank and Sparse Representation

Spikesorting is crucial in studying neural individually and synergistically encoding and decoding behaviors. However, existent spike sorting algorithms perform unsatisfactorily in real scenarios where heavy noises and overlapping samples are commonly in the spikes, and the spikes from different neurons are similar. To address such challenging scenarios, we propose an automatic spike sporting method in this paper, which integrally combines low-rank and sparse representation (LRSR) into a unified model. In particular, LRSR models spikes through low-rank optimization, uncovering global data structure for handling similar and overlapped samples. To eliminate the influence of the embedded noises, LRSR uses a sparse constraint, effectively separating spikes from noise. The optimization is solved using alternate augmented Lagrange multipliers methods. Moreover, we conclude with an automatic spike-sorting framework that employs the spectral clustering theorem to estimate the number of neurons. Extensive experiments over various simulated and real-world datasets demonstrate that our proposed method, LRSR, can handle spike sorting effectively and efficiently.

Application of ArcGIS 3D modeling technology in the study of land use policy decision making in China

In this paper, a land use management information system based on ArcGIS 3D modeling technology is constructed to process land use policy decisions through ArcSDE spatial data engine and Oracle relational database to realize a land use planning management information system. Using genetic algorithm in order to use for regional land use optimization allocation, the introduction of multi-intelligent body system in this algorithm will be able to enhance the optimization search ability of the algorithm and make the genetic algorithm to obtain land use planning supported. The behavior of the main body of the integrated land use planning decision maker will guide the development of the quantitative structure of land use in terms of spatial layout toward sustainability. The experimental results prove that the target is better than the other three types of scenarios under the integrated benefit model, then it is reduced by 18.67%, 15.98% and 16.61%, and the number of spatially contiguous areas is increased by 9.4%, 13.8% and 0.8%, respectively. The proposed model can reasonably configure the regional land use quantitative results and spatial layout, and coordinate the needs of different land use decision makers.

An unsupervised real-time spike sorting system based on optimized OSort

Objective. The OSort algorithm, a pivotal unsupervised spike sorting method, has been implemented in dedicated hardware devices for real-time spike sorting. However, due to the inherent complexity of neural recording environments, OSort still grapples with numerous transient cluster occurrences during the practical sorting process. This leads to substantial memory usage, heavy computational load, and complex hardware architectures, especially in noisy recordings and multi-channel systems.Approach. This study introduces an optimized OSort algorithm (opt-OSort) which utilizes correlation coefficient (CC), instead of Euclidean distance as classification criterion. TheCCmethod not only bolsters the robustness of spike classification amidst the diverse and ever-changing conditions of physiological and recording noise environments, but also can finish the entire sorting procedure within a fixed number of cluster slots, thus preventing a large number of transient clusters. Moreover, the opt-OSort incorporates two configurable validation loops to efficiently reject cluster outliers and track recording variations caused by electrode drifting in real-time.Main results. The opt-OSort significantly reduces transient cluster occurrences by two orders of magnitude and decreases memory usage by 2.5-80 times in the number of pre-allocated transient clusters compared with other hardware implementations of OSort. The opt-OSort maintains an accuracy comparable to offline OSort and other commonly-used algorithms, with a sorting time of 0.68µs as measured by the hardware-implemented system in both simulated datasets and experimental data. The opt-OSort's ability to handle variations in neural activity caused by electrode drifting is also demonstrated.Significance. These results present a rapid, precise, and robust spike sorting solution suitable for integration into low-power, portable, closed-loop neural control systems and brain-computer interfaces.

A Five-Channel Weighted Real-Time Algorithm for High-Density Electrodes Spike Sorting

With the application of high-density neural probes, a neuron can be detected by multiple adjacent probes, and the traditional single-channel spike sorting is no longer suitable. In this paper, we propose a five-channel weighted real-time spike sorting algorithm based on template-matching to process neural signals recorded by high-density probes. This work uses the signals of the center channel and the adjacent four channels to form a five-channel template by weighting, and employs a modified OSort algorithm with unsupervised learning to update the template. We implemented automatic online spike sorting, and tested it with both ground truth recordings and simulated datasets. The experiments show that our algorithm utilizing the information of adjacent channels has a higher sorting accuracy than traditional single-channel spike sorting. The average sorting accuracy reaches 89%, compared to 78% for single-channel.

Edge computing on TPU for brain implant signal analysis

The ever-increasing number of recording sites of silicon-based probes imposes a great challenge for detecting and evaluating single-unit activities in an accurate and efficient manner. Currently separate solutions are available for high precision offline evaluation and separate solutions for embedded systems where computational resources are more limited. We propose a deep learning-based spike sorting system, that utilizes both unsupervised and supervised paradigms to learn a general feature embedding space and detect neural activity in raw data as well as predict the feature vectors for sorting. The unsupervised component uses contrastive learning to extract features from individual waveforms, while the supervised component is based on the MobileNetV2 architecture. One of the key advantages of our system is that it can be trained on multiple, diverse datasets simultaneously, resulting in greater generalizability than previous deep learning-based models. We demonstrate that the proposed model does not only reaches the accuracy of current state-of-art offline spike sorting methods but has the unique potential to run on edge Tensor Processing Units (TPUs), specialized chips designed for artificial intelligence and edge computing. We compare our model performance with state of art solutions on paired datasets as well as on hybrid recordings as well. The herein demonstrated system paves the way to the integration of deep learning-based spike sorting algorithms into wearable electronic devices, which will be a crucial element of high-end brain-computer interfaces.

Proof of Concept for Sustainable Manufacturing of Neural Electrode Array for In Vivo Recording

Increasing requirements for neural implantation are helping to expand our understanding of nervous systems and generate new developmental approaches. It is thanks to advanced semiconductor technologies that we can achieve the high-density complementary metal-oxide-semiconductor electrode array for the improvement of the quantity and quality of neural recordings. Although the microfabricated neural implantable device holds much promise in the biosensing field, there are some significant technological challenges. The most advanced neural implantable device relies on complex semiconductor manufacturing processes, which are required for the use of expensive masks and specific clean room facilities. In addition, these processes based on a conventional photolithography technique are suitable for mass production, which is not applicable for custom-made manufacturing in response to individual experimental requirements. The microfabricated complexity of the implantable neural device is increasing, as is the associated energy consumption, and corresponding emissions of carbon dioxide and other greenhouse gases, resulting in environmental deterioration. Herein, we developed a fabless fabricated process for a neural electrode array that was simple, fast, sustainable, and customizable. An effective strategy to produce conductive patterns as the redistribution layers (RDLs) includes implementing microelectrodes, traces, and bonding pads onto the polyimide (PI) substrate by laser micromachining techniques combined with the drop coating of the silver glue to stack the laser grooving lines. The process of electroplating platinum on the RDLs was performed to increase corresponding conductivity. Sequentially, Parylene C was deposited onto the PI substrate to form the insulation layer for the protection of inner RDLs. Following the deposition of Parylene C, the via holes over microelectrodes and the corresponding probe shape of the neural electrode array was also etched by laser micromachining. To increase the neural recording capability, three-dimensional microelectrodes with a high surface area were formed by electroplating gold. Our eco-electrode array showed reliable electrical characteristics of impedance under harsh cyclic bending conditions of over 90 degrees. For in vivo application, our flexible neural electrode array demonstrated more stable and higher neural recording quality and better biocompatibility as well during the 2-week implantation compared with those of the silicon-based neural electrode array. In this study, our proposed eco-manufacturing process for fabricating the neural electrode array reduced 63 times of carbon emissions compared to the traditional semiconductor manufacturing process and provided freedom in the customized design of the implantable electronic devices as well.

From End to End: Gaining, Sorting, and Employing High-Density Neural Single Unit Recordings

The meaning behind neural single unit activity has constantly been a challenge, so it will persist in the foreseeable future. As one of the most sourced strategies, detecting neural activity in high-resolution neural sensor recordings and then attributing them to their corresponding source neurons correctly, namely the process of spike sorting, has been prevailing so far. Support from ever-improving recording techniques and sophisticated algorithms for extracting worthwhile information and abundance in clustering procedures turned spike sorting into an indispensable tool in electrophysiological analysis. This review attempts to illustrate that in all stages of spike sorting algorithms, the past 5 years innovations' brought about concepts, results, and questions worth sharing with even the non-expert user community. By thoroughly inspecting latest innovations in the field of neural sensors, recording procedures, and various spike sorting strategies, a skeletonization of relevant knowledge lays here, with an initiative to get one step closer to the original objective: deciphering and building in the sense of neural transcript.

A Neuromorphic Brain Interface based on RRAM Crossbar Arrays for High Throughput Real-time Spike Sorting

Real-time spike sorting and processing are crucial for closed-loop brain-machine interfaces and neural prosthetics. Recent developments in high-density multi-electrode arrays with hundreds of electrodes have enabled simultaneous recordings of spikes from a large number of neurons. However, the high channel count imposes stringent demands on real-time spike sorting hardware regarding data transmission bandwidth and computation complexity. Thus, it is necessary to develop a specialized real-time hardware that can sort neural spikes on the fly with high throughputs while consuming minimal power. Here, we present a real-time, low latency spike sorting processor that utilizes high-density CuO_x resistive crossbars to implement in-memory spike sorting in a massively parallel manner. We developed a fabrication process which is compatible with CMOS BEOL integration. We extensively characterized switching characteristics and statistical variations of the CuO_x memory devices. In order to implement spike sorting with crossbar arrays, we developed a template matching-based spike sorting algorithm that can be directly mapped onto RRAM crossbars. By using synthetic and in vivo recordings of extracellular spikes, we experimentally demonstrated energy efficient spike sorting with high accuracy. Our neuromorphic interface offers substantial improvements in area (~1000× less area), power (~200× less power), and latency (4.8μs latency for sorting 100 channels) for real-time spike sorting compared to other hardware implementations based on FPGAs and microcontrollers.

Algorithm and hardware considerations for real-time neural signal on-implant processing

Objective Various on-workstation neural-spike-based brain machine interface(BMI) systems have reached the point of in-human trials, but on-node and on-implant BMI systems are still under exploration. Such systems are constrained by the area and battery. Researchers should consider the algorithm complexity, available resources, power budgets, CMOS technologies, and the choice of platforms when designing BMI systems. However, the effect of these factors is currently still unclear. Approaches. Here we have proposed a novel real-time 128 channel spike detection algorithm and optimised it on Microcontroller(MCU) and Field Programmable Gate Array(FPGA) platforms towards consuming minimal power and memory/resources. It is presented as a use case to explore the different considerations in system design. Main results. The proposed spike detection algorithm achieved over 97% sensitivity and a smaller than 3% false detection rate. The MCU implementation occupies less than 3KB RAM and consumes 31.5μW/ch. The FPGA platform only occupies 299 logic cells and 3KB RAM for 128 channels and consumes 0.04μW/ch. Significance. On the spike detection algorithm front, we have eliminated the processing bottleneck by reducing the dynamic power consumption to lower than the hardware static power, without sacrificing detection performance. More importantly, we have explored the considerations in algorithm and hardware design with respect to scalability, portability, and costs. These findings can facilitate and guide the future development of real-time on-implant neural signal processing platforms.

A Vector Quantization-Based Spike Compression Approach Dedicated to Multichannel Neural Recording Microsystems

Implantable high-density multichannel neural recording microsystems provide simultaneous recording of brain activities. Wireless transmission of the entire recorded data causes high bandwidth usage, which is not tolerable for implantable applications. As a result, a hardware-friendly compression module is required to reduce the amount of data before it is transmitted. This paper presents a novel compression approach that utilizes a spike extractor and a vector quantization (VQ)-based spike compressor. In this approach, extracted spikes are vector quantized using an unsupervised learning process providing a high spike compression ratio (CR) of 10-80. A combination of extracting and compressing neural spikes results in a significant data reduction as well as preserving the spike waveshapes. The compression performance of the proposed approach was evaluated under variant conditions. We also developed new architectures such that the hardware blocks of our approach can be implemented more efficiently. The compression module was implemented in a 180-nm standard CMOS process achieving a SNDR of 14.49[Formula: see text]dB and a classification accuracy (CA) of 99.62% at a CR of 20, while consuming 4[Formula: see text][Formula: see text]W power and 0.16[Formula: see text]mm² chip area per channel.