Optical systolic array processor using residue arithmetic

Matrix-vector multiplication using digital partitioning for more accurate optical computing

Digital partitioning offers a flexible means of increasing the accuracy of an optical matrix-vector processor. This algorithm can be implemented with the same architecture required for a purely analog processor, which gives optical matrix-vector processors the ability to perform high-accuracy calculations at speeds comparable with or greater than electronic computers as well as the ability to perform analog operations at a much greater speed. Digital partitioning is compared with digital multiplication by analog convolution, residue number systems, and redundant number representation in terms of the size and the speed required for an equivalent throughput as well as in terms of the hardware requirements. Digital partitioning and digital multiplication by analog convolution are found to be the most efficient algorithms if coding time and hardware are considered, and the architecture for digital partitioning permits the use of analog computations to provide the greatest throughput for a single processor. To our knowledge this is the first study to propose the use of digital partitioning for optical matrix processing.

Array processors using a quadratic residue number system

Algorithms and architectures are described for optical matrix-matrix and matrix-vector processing. Implementations are based on quadratic residue number system coding which has the remarkable property that computations in the real and imaginary channels are performed in parallel without any interactions. This approach significantly reduces the complexity of implementation. Residue-based processing provides increased dynamic range and a reduced number of computations with high speed and parallelism of the optics fully utilized. Several architectures of optical processors described in this paper include systolic and data flow arrays.

Error-free parallel rational arithmetic for optical and VLSI computing

An error-free carry-free (parallel) rational arithmetic system based on residue and p-adic representation is introduced. In this system, Farey rational numbers, whose numerators and denominators are bounded, are encoded into Para-Hensel codes (parallel rational Hensel code), and the parallel element-wise arithmetic is performed using these codes. The algorithms for encoding into and decoding from the Para-Hensel code and the arithmetic algorithms are described. This system will have extensive applications in massively parallel processors.