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Kim Y, Kim H, Oh K, Park JH, Kong BD, Baek CK. Low-energy and tunable LIF neuron using SiGe bandgap-engineered resistive switching transistor. DISCOVER NANO 2024; 19:132. [PMID: 39177916 PMCID: PMC11343930 DOI: 10.1186/s11671-024-04079-5] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 05/28/2024] [Accepted: 08/13/2024] [Indexed: 08/24/2024]
Abstract
We have proposed leaky integrate-and-fire (LIF) neuron having low-energy consumption and tunable functionality without external circuit components. Our LIF neuron has a simple configuration consisting of only three components: one bandgap-engineered resistive switching transistor (BE-RST), one capacitor, and one resistor. Here, the crucial point is that BE-RST with a silicon-germanium heterojunction possesses an amplified hysteric current switching with a low latch-up voltage due to improved hole storage capability and impact ionization coefficient. Therefore, the proposed neuron utilizing BE-RST requires an energy consumption of 0.36 pJ/spike, which is approximately six times lower than 2.08 pJ/spike of pure silicon-RST based neuron. In addition, the spiking properties can be tuned by modulating the leakage rate and threshold through gate bias, which contributes to energy-efficient sparse-activity and high learning accuracy. As a result, our proposed neuron can be a promising candidate for executing various spiking neural network applications.
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Affiliation(s)
- Yijoon Kim
- Department of Convergence IT Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
| | - Hyangwoo Kim
- Future IT Innovation Laboratory, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea.
| | - Kyounghwan Oh
- Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
| | - Ju Hong Park
- Department of Convergence IT Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
| | - Byoung Don Kong
- Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
| | - Chang-Ki Baek
- Department of Convergence IT Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
- Future IT Innovation Laboratory, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
- Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 37673, South Korea
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Yadav R, Poudyal S, Rajarapu R, Biswal B, Barman PK, Kasiviswanathan S, Novoselov KS, Misra A. Low Power Volatile and Nonvolatile Memristive Devices from 1D MoO 2-MoS 2 Core-Shell Heterostructures for Future Bio-Inspired Computing. SMALL (WEINHEIM AN DER BERGSTRASSE, GERMANY) 2024; 20:e2309163. [PMID: 38150637 DOI: 10.1002/smll.202309163] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 10/11/2023] [Revised: 12/05/2023] [Indexed: 12/29/2023]
Abstract
Memristors-based integrated circuits for emerging bio-inspired computing paradigms require an integrated approach utilizing both volatile and nonvolatile memristive devices. Here, an innovative architecture comprising of 1D CVD-grown core-shell heterostructures (CSHSs) of MoO2-MoS2 is employed as memristors manifesting both volatile switching (with high selectivity of 107 and steep slope of 0.6 mV decade-1) and nonvolatile switching phenomena (with Ion/Ioff ≈103 and switching speed of 60 ns). In these CSHSs, the metallic core MoO2 with high current carrying capacity provides a conformal and immaculate interface with semiconducting MoS2 shells and therefore it acts as a bottom electrode for the memristors. The power consumption in volatile devices is as low as 50 pW per set transition and 0.1 fW in standby mode. Voltage-driven current spikes are observed for volatile devices while with nonvolatile memristors, key features of a biological synapse such as short/long-term plasticity and paired pulse facilitation are emulated suggesting their potential for the development of neuromorphic circuits. These CSHSs offer an unprecedented solution for the interfacial issues between metallic electrodes and the layered materials-based switching element with the prospects of developing smaller footprint memristive devices for future integrated circuits.
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Affiliation(s)
- Renu Yadav
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
| | - Saroj Poudyal
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
| | - Ramesh Rajarapu
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
| | - Bubunu Biswal
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
| | - Prahalad Kanti Barman
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
| | - S Kasiviswanathan
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
| | - Kostya S Novoselov
- Institute for Functional Intelligent Materials, National University of Singapore, Singapore, 117544, Singapore
| | - Abhishek Misra
- Department of Physics, Indian Institute of Technology Madras, Chennai, 600036, India
- Centre for 2D Materials Research and Innovation, Indian Institute of Technology Madras, Chennai, 600036, India
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Fida AA, Mittal S, Khanday FA. Mott memristor based stochastic neurons for probabilistic computing. NANOTECHNOLOGY 2024; 35:295201. [PMID: 38593756 DOI: 10.1088/1361-6528/ad3c4b] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 11/25/2023] [Accepted: 04/09/2024] [Indexed: 04/11/2024]
Abstract
Many studies suggest that probabilistic spiking in biological neural systems is beneficial as it aids learning and provides Bayesian inference-like dynamics. If appropriately utilised, noise and stochasticity in nanoscale devices can benefit neuromorphic systems. In this paper, we build a stochastic leaky integrate and fire (LIF) neuron, utilising a Mott memristor's inherent stochastic switching dynamics. We demonstrate that the developed LIF neuron is capable of biological neural dynamics. We leverage these characteristics of the proposed LIF neuron by integrating it into a population-coded spiking neural network and a spiking restricted Boltzmann machine (sRBM), thereby showcasing its ability to implement probabilistic learning and inference. The sRBM achieves a software-comparable accuracy of 87.13%. Unlike CMOS-based probabilistic neurons, our design does not require any external noise sources. The designed neurons are highly energy efficient and ultra-compact, requiring only three components: a resistor, a capacitor and a memristor device.
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Affiliation(s)
- Aabid Amin Fida
- Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, Uttrakhand, India
| | - Sparsh Mittal
- Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, Uttrakhand, India
| | - Farooq Ahmad Khanday
- Electronics and Instrumentation Technology, University of Kashmir, Srinagar, J&K, India
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Cheng L, Gao L, Zhang X, Wu Z, Zhu J, Yu Z, Yang Y, Ding Y, Li C, Zhu F, Wu G, Zhou K, Wang M, Shi T, Liu Q. A bioinspired configurable cochlea based on memristors. Front Neurosci 2022; 16:982850. [PMID: 36263363 PMCID: PMC9574047 DOI: 10.3389/fnins.2022.982850] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 06/30/2022] [Accepted: 09/08/2022] [Indexed: 11/13/2022] Open
Abstract
Cochleas are the basis for biology to process and recognize speech information, emulating which with electronic devices helps us construct high-efficient intelligent voice systems. Memristor provides novel physics for performing neuromorphic engineering beyond complementary metal-oxide-semiconductor technology. This work presents an artificial cochlea based on the shallen-key filter model configured with memristors, in which one filter emulates one channel. We first fabricate a memristor with the TiN/HfOx/TaOx/TiN structure to implement such a cochlea and demonstrate the non-volatile multilevel states through electrical operations. Then, we build the shallen-key filter circuit and experimentally demonstrate the frequency-selection function of cochlea’s five channels, whose central frequency is determined by the memristor’s resistance. To further demonstrate the feasibility of the cochlea for system applications, we use it to extract the speech signal features and then combine it with a convolutional neural network to recognize the Free Spoken Digit Dataset. The recognition accuracy reaches 92% with 64 channels, compatible with the traditional 64 Fourier transform transformation points of mel-frequency cepstral coefficients method with 95% recognition accuracy. This work provides a novel strategy for building cochleas, which has a great potential to conduct configurable, high-parallel, and high-efficient auditory systems for neuromorphic robots.
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Affiliation(s)
- Lingli Cheng
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Lili Gao
- Zhejiang Laboratory, Hangzhou, China
| | - Xumeng Zhang
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
- *Correspondence: Xumeng Zhang,
| | - Zuheng Wu
- School of Integrated Circuit, Anhui University, Hefei, China
| | - Jiaxue Zhu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Zhaoan Yu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Yue Yang
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Yanting Ding
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Chao Li
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- School of Integrated Circuits, University of Chinese Academy of Sciences, Beijing, China
| | - Fangduo Zhu
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Guangjian Wu
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Keji Zhou
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Ming Wang
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
| | - Tuo Shi
- Zhejiang Laboratory, Hangzhou, China
| | - Qi Liu
- Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
- Frontier Institute of Chip and System, Fudan University, Shanghai, China
- State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China
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