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Hwang E, Choi J, Hong S. Emerging laser-assisted vacuum processes for ultra-precision, high-yield manufacturing. NANOSCALE 2022; 14:16065-16076. [PMID: 36278425 DOI: 10.1039/d2nr03649e] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/16/2023]
Abstract
Laser technology is a cutting-edge process with a unique photothermal response, precise site selectivity, and remote controllability. Laser technology has recently emerged as a novel tool in the semiconductor, display, and thin film industries by providing additional capabilities to existing high-vacuum equipment. The in situ and in operando laser assistance enables using multiple process environments with a level of complexity unachievable with conventional vacuum equipment. This broadens the usable range of process parameters and directly improves material properties, product precision, and device performance. This review paper examines the recent research trends in laser-assisted vacuum processes (LAVPs) as a vital tool for innovation in next-generation manufacturing processing equipment and addresses the unique characteristics and mechanisms of lasers exclusively used in each study. All the findings suggest that the LAVP can lead to methodological breakthroughs in dry etching, 2D material synthesis, and chemical vapor deposition for optoelectronic devices.
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Affiliation(s)
- Eunseung Hwang
- Department of Mechanical Design Engineering, Hanyang University, 222 Wangsimni-ro, Seongdong-gu, Seoul 04763, Republic of Korea.
- Department of Mechanical Engineering, BK21 FOUR ERICA-ACE Center, Hanyang University, 55 Hanyangdaehak-ro, Sangnok-gu, Ansan 15588, Republic of Korea
| | - Joonmyung Choi
- Department of Mechanical Design Engineering, Hanyang University, 222 Wangsimni-ro, Seongdong-gu, Seoul 04763, Republic of Korea.
- Department of Mechanical Engineering, BK21 FOUR ERICA-ACE Center, Hanyang University, 55 Hanyangdaehak-ro, Sangnok-gu, Ansan 15588, Republic of Korea
| | - Sukjoon Hong
- Department of Mechanical Design Engineering, Hanyang University, 222 Wangsimni-ro, Seongdong-gu, Seoul 04763, Republic of Korea.
- Department of Mechanical Engineering, BK21 FOUR ERICA-ACE Center, Hanyang University, 55 Hanyangdaehak-ro, Sangnok-gu, Ansan 15588, Republic of Korea
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Kang IH, Hwang SH, Baek YJ, Kim SG, Han YL, Kang MS, Woo JG, Lee JM, Yu ES, Bae BS. Interfacial Oxidized Gate Insulators for Low-Power Oxide Thin-Film Transistors. ACS OMEGA 2021; 6:2717-2726. [PMID: 33553889] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Subscribe] [Scholar Register] [Received: 10/08/2020] [Accepted: 01/06/2021] [Indexed: 06/12/2023]
Abstract
Low power consumption is essential for wearable and internet-of-things applications. An effective way of reducing power consumption is to reduce the operation voltage using a very thin and high-dielectric gate insulator. In an oxide thin-film transistor (TFT), the channel layer is an oxide material in which oxygen reacts with metal to form a thin insulator layer. The interfacial oxidation between the gate metal and In-Ga-Zn oxide (IGZO) was investigated with Al, Ti, and Mo. Positive bias was applied to the gate metal for enhanced oxygen diffusion since the migration of oxygen is an important factor in interfacial oxidation. Through interfacial oxidation, a top-gate oxide TFT was developed with low source-drain voltages below 0.5 V and a gate voltage swing less than 1 V, which provide low power consumption.
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Affiliation(s)
- In Hye Kang
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Sang Ho Hwang
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Young Jo Baek
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Seo Gwon Kim
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Ye Lin Han
- Department of NanoBioTronics, Hoseo University, Asan, Chungnam 31499, Korea
| | - Min Su Kang
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Jae Geun Woo
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Jong Mo Lee
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Eun Seong Yu
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Byung Seong Bae
- School of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
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Kang IH, Hwang SH, Baek YJ, Kim SG, Han YL, Kang MS, Woo JG, Lee JM, Yu ES, Bae BS. Interfacial Oxidized Gate Insulators for Low-Power Oxide Thin-Film Transistors. ACS OMEGA 2021; 6:2717-2726. [PMID: 33553889 PMCID: PMC7860086 DOI: 10.1021/acsomega.0c04924] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.3] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Received: 10/08/2020] [Accepted: 01/06/2021] [Indexed: 06/18/2023]
Abstract
Low power consumption is essential for wearable and internet-of-things applications. An effective way of reducing power consumption is to reduce the operation voltage using a very thin and high-dielectric gate insulator. In an oxide thin-film transistor (TFT), the channel layer is an oxide material in which oxygen reacts with metal to form a thin insulator layer. The interfacial oxidation between the gate metal and In-Ga-Zn oxide (IGZO) was investigated with Al, Ti, and Mo. Positive bias was applied to the gate metal for enhanced oxygen diffusion since the migration of oxygen is an important factor in interfacial oxidation. Through interfacial oxidation, a top-gate oxide TFT was developed with low source-drain voltages below 0.5 V and a gate voltage swing less than 1 V, which provide low power consumption.
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Affiliation(s)
- In Hye Kang
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Sang Ho Hwang
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Young Jo Baek
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Seo Gwon Kim
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Ye Lin Han
- Department
of NanoBioTronics, Hoseo University, Asan, Chungnam 31499, Korea
| | - Min Su Kang
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Jae Geun Woo
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Jong Mo Lee
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Eun Seong Yu
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
| | - Byung Seong Bae
- School
of Electronics and Display Engineering, Hoseo University, Asan, Chungnam 31499, Korea
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Editorial for the Special Issue on the ICAE 2019. MICROMACHINES 2020; 11:mi11090874. [PMID: 32962209 PMCID: PMC7570300 DOI: 10.3390/mi11090874] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Track Full Text] [Download PDF] [Subscribe] [Scholar Register] [Received: 09/10/2020] [Accepted: 09/18/2020] [Indexed: 11/23/2022]
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