Column Row Convolutional Neural Network: Reducing Parameters for Efficient Image Processing

Recent advancements in deep learning have achieved significant progress by increasing the number of parameters in a given model. However, this comes at the cost of computing resources, prompting researchers to explore model compression techniques that reduce the number of parameters while maintaining or even improving performance. Convolutional neural networks (CNN) have been recognized as more efficient and effective than fully connected (FC) networks. We propose a column row convolutional neural network (CRCNN) in this letter that applies 1D convolution to image data, significantly reducing the number of learning parameters and operational steps. The CRCNN uses column and row local receptive fields to perform data abstraction, concatenating each direction's feature before connecting it to an FC layer. Experimental results demonstrate that the CRCNN maintains comparable accuracy while reducing the number of parameters and compared to prior work. Moreover, the CRCNN is employed for one-class anomaly detection, demonstrating its feasibility for various applications.

Grain-size adjustment in Hf0.5Zr0.5O2ferroelectric film to improve the switching time in Hf0.5Zr0.5O2-based ferroelectric capacitor

By adjusting the rising time in annealing ferroelectric HfO2-based films, the grain size of the film can be controlled. In this study, we found that increasing the rising time from 10 to 30 s at an annealing temperature of 700 °C in N2atmosphere resulted in improved ferroelectric switching speed. This is because the larger grain size reduces the internal resistance components, such as the grain bulk resistance and grain boundary resistance, of the HZO film. This in turn lowers the overall equivalent resistance. By minimizing the RC time constants, increasing the grain size plays a key role in improving the polarization switching speed of ferroelectric films.

Experimental study of endurance characteristics of Al-doped HfO2ferroelectric capacitor

In this work, the endurance characteristics of Al-doped HfO₂(HAO)-based metal-ferroelectric-metal (MFM) capacitors (which were annealed at 1000 °C) with various doping concentrations were investigated. The doping concentration was optimized for the high annealing temperature (1000 °C) process. To investigate the impact of cycling pulses on the endurance characteristics of HAO-based MFM capacitor, the rise/fall time (t_r/f) and hold time (t_h) for the cycling pulses were varied. Moreover, by adopting the recoverable fatigue process, the endurance characteristics under repetitive wake-up/fatigue processes were studied. The HAO capacitors achieved the remnant polarization (2P_r) of 23.767μC cm^-2at pristine state under the high annealing temperature. Furthermore, it was demonstrated that the endurance characteristics (∼10⁸cycles) of the HAO capacitors were comparable to them of other HfO₂-based ferroelectric capacitors. Lastly but not least, it turned out that the amount of oxygen and oxygen vacancies in the HAO thin film was dependent of doping concentrations for the film. The impact of oxygen and oxygen vacancies was quantitatively analyzed, in detail, with TEM, XPS and GIXRD analysis.

Improved remnant polarization of Zr-doped HfO2 ferroelectric film by CF4/O2 plasma passivation

In this work, the impact of fluorine (CF₄) and oxygen (O₂) plasma passivation on HfZrO_x (HZO) based ferroelectric capacitor was investigated. By the fluorine passivation, the surface trap density and oxygen vacancies in the HZO-based Metal–ferroelectric–insulator–semiconductor (MFIS) capacitors were suppressed, resulting in the increased pristine remnant polarization (2P_r). The pristine value (2P_r) of baseline samples annealed at 500 °C and 600 °C were 11.4 µC/cm² and 24.4 µC/cm², respectively. However, with the F–passivation, the 2P_r values were increased to 30.8 µC/cm² and 48.2 µC/cm² for 500 °C and 600 °C, respectively. The amount of surface defects and oxygen vacancies are quantitatively confirmed by the conductance method and XPS analysis. However, due to the incorporation of fluorine atoms into the ferroelectric–insulator films, undesirable degradation on endurance characteristics were observed.

Vertical Gate-All-Around Device Architecture to Improve the Device Performance for Sub-5-nm Technology

In this work, we propose a vertical gate-all-around device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE). The GAA-FinFET was built using the technology computer-aided design (TCAD) simulation tool, and then, its electrical characteristics were quantitatively evaluated. The electrical characteristics of the GAA-FinFET were compared to those of conventional FinFET and nano-sheet FET (NSFET) at 7 nm or 5 nm nodes. When comparing the GAA-FinFET against the FinFET, it achieved not only better SCE characteristics, but also higher on-state drive current due to its gate-all-around device structure. This helps to improve the ratio of effective drive current to off-state leakage current (i.e., I_eff/I_off) by ~30%, resulting in an improvement in DC device performance by ~10%. When comparing the GAA-FinFET against the NSFET, it exhibited SCE characteristics that were comparable or superior thanks to its improved sub-channel leakage suppression. It turned out that the proposed GAA-FinFET (compared to conventional FinFET at the 7 nm or 5 nm nodes, or even beyond) is an attractive option for improving device performance in terms of SCE and series resistance. Furthermore, it is expected that the device structure of GAA-FinFET is very similar to that of conventional FinFET, resulting in further improvement to its electrical characteristics as a result of its gate-all-around device structure without significant modification with respect to the processing steps for conventional FinFET.

Simulation Study: The Impact of Structural Variations on the Characteristics of a Buried-Channel-Array Transistor (BCAT) in DRAM

As the physical dimensions of cell transistors in dynamic random-access memory (DRAM) have been aggressively scaled down, buried-channel-array transistors (BCATs) have been adopted in industry to suppress short channel effects and to achieve a better performance. In very aggressively scaled-down BCATs, the impact of structural variations on the electrical characteristics can be more significant than expected. Using a technology computer-aided design (TCAD) tool, the structural variations in BCAT (e.g., the aspect ratio of the BCAT recess-to-gate length, BCAT depth, junction depth, fin width, and fin fillet radius) were simulated to enable a quantitative understanding of its impact on the device characteristics, such as the input/output characteristics, threshold voltage, subthreshold swing, on-/off-current ratio, and drain-induced barrier lowering. This work paves the road for the design of a variation-robust BCAT.

Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages

Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated. In order to reasonably predict those challenges, a TCAD (technology computer-aided design) simulation for 3D NAND structure in mass production has been run. By aggressively stacking-up and scaling-down bit cells in a string, the structure of channel hole was varied from a macaroni to nanowire. This causes the threshold voltage difference (ΔV_th) between the top cell and bottom cell in the same string. In detail, ΔV_th between the top cell and bottom cell mostly depends on the xy-scaling, but the way how ΔV_th is affected is not very dependent on the stack height.

Ferroelectric Field-Effect-Transistor Integrated with Ferroelectrics Heterostructure

To address the demands of emerging data-centric computing applications, ferroelectric field-effect transistors (Fe-FETs) are considered the forefront of semiconductor electronics owing to their energy and area efficiency and merged logic-memory functionalities. Herein, the fabrication and application of an Fe-FET, which is integrated with a van der Waals ferroelectrics heterostructure (CuInP₂ S₆ /α-In₂ Se₃ ), is reported. Leveraging enhanced polarization originating from the dipole coupling of CIPS and α-In₂ Se₃ , the fabricated Fe-FET exhibits a large memory window of 14.5 V at V_GS = ±10 V, reaching a memory window to sweep range of ≈72%. Piezoelectric force microscopy measurements confirm the enhanced polarization-induced wider hysteresis loop of the double-stacked ferroelectrics compared to single ferroelectric layers. The Landau-Khalatnikov theory is extended to analyze the ferroelectric characteristics of a ferroelectric heterostructure, providing detailed explanations of the hysteresis behaviors and enhanced memory window formation. The fabricated Fe-FET shows nonvolatile memory characteristics, with a high on/off current ratio of over 10⁶ , long retention time (>10⁴ s), and stable cyclic endurance (>10⁴ cycles). Furthermore, the applicability of the ferroelectrics heterostructure is investigated for artificial synapses and for hardware neural networks through training and inference simulation. These results provide a promising pathway for exploring low-dimensional ferroelectronics.

Impact of Chamber/Annealing Temperature on the Endurance Characteristic of Zr:HfO2 Ferroelectric Capacitor

The endurance characteristic of Zr-doped HfO₂ (HZO)-based metal-ferroelectric-metal (MFM) capacitors fabricated under various deposition/annealing temperatures in the atomic layer deposition (ALD) process was investigated. The chamber temperature in the ALD process was set to 120 °C, 200 °C, or 250 °C, and the annealing temperature was set to 400 °C, 500 °C, 600 °C, or 700 °C. For the given annealing temperature of 700 °C, the remnant polarization (2P_r) was 17.21 µC/cm², 26.37 µC/cm², and 31.8 µC/cm² at the chamber temperatures of 120 °C, 200 °C, and 250 °C, respectively. For the given/identical annealing temperature, the largest remnant polarization (P_r) was achieved when using the chamber temperature of 250 °C. At a higher annealing temperature, the grain size in the HZO layer becomes smaller, and thereby, it enables to boost up P_r. It was observed that the endurance characteristics for the capacitors fabricated under various annealing/chamber temperatures were quite different. The different endurance characteristics are due to the oxygen and oxygen vacancies in ferroelectric films, which affects the wakeup/fatigue behaviors. However, in common, all the capacitors showed no breakdown for an externally applied pulse (up to 10⁸ cycles of the pulse).

Strain-Dependent Photoacoustic Characteristics of Free-Standing Carbon-Nanocomposite Transmitters

In this paper we demonstrate strain-dependent photoacoustic (PA) characteristics of free-standing nanocomposite transmitters that are made of carbon nanotubes (CNT) and candle soot nanoparticles (CSNP) with an elastomeric polymer matrix. We analyzed and compared PA output performances of these transmitters which are prepared first on glass substrates and then in a delaminated free-standing form for strain-dependent characterization. This confirms that the nanocomposite transmitters with lower concentration of nanoparticles exhibit more flexible and stretchable property in terms of Young’s modulus in a range of 4.08–10.57 kPa. Then, a dynamic endurance test was performed revealing that both types of transmitters are reliable with pressure amplitude variation as low as 8–15% over 100–800 stretching cycles for a strain level of 5–28% with dynamic endurance in range of 0.28–2.8%. Then, after 2000 cycles, the transmitters showed pressure amplitude variation of 6–29% (dynamic endurance range of 0.21–1.03%) at a fixed strain level of 28%. This suggests that the free-standing nanocomposite transmitters can be used as a strain sensor under a variety of environments providing robustness under repeated stretching cycles.

A Soft Pressure Sensor Array Based on a Conducting Nanomembrane

Although skin-like pressure sensors exhibit high sensitivity with a high performance over a wide area, they have limitations owing to the critical issue of being linear only in a narrow strain range. Various strategies have been proposed to improve the performance of soft pressure sensors, but such a nonlinearity issue still exists and the sensors are only effective within a very narrow strain range. Herein, we fabricated a highly sensitive multi-channel pressure sensor array by using a simple thermal evaporation process of conducting nanomembranes onto a stretchable substrate. A rigid-island structure capable of dissipating accumulated strain energy induced by external mechanical stimuli was adopted for the sensor. The performance of the sensor was precisely controlled by optimizing the thickness of the stretchable substrate and the number of serpentines of an Au membrane. The fabricated sensor exhibited a sensitivity of 0.675 kPa^-1 in the broad pressure range of 2.3-50 kPa with linearity (~0.990), and good stability (>300 Cycles). Finally, we successfully demonstrated a mapping of pressure distribution.

Gate-Stack Engineering to Improve the Performance of 28 nm Low-Power High-K/Metal-Gate Device

In this study, a gate-stack engineering technique is proposed as a means of improving the performance of a 28 nm low-power (LP) high-k/metal-gate (HK/MG) device. In detail, it was experimentally verified that HfSiO thin films can replace HfSiON congeners, where the latter are known to have a good thermal budget and/or electrical characteristics, to boost the device performance under a limited thermal budget. TiN engineering for the gate-stack in the 28 nm LP HK/MG device was used to suppress the gate leakage current. Using the proposed fabrication method, the on/off current ratio (I_on/I_off) was improved for a given target I_on, and the gate leakage current was appropriately suppressed. Comparing the process-of-record device against the 28 nm LP HK/MG device, the thickness of the electrical oxide layer in the new device was reduced by 3.1% in the case of n-type field effect transistors and by 10% for p-type field effect transistors. In addition, the reliability (e.g., bias temperature instability, hot carrier injury, and time-dependent dielectric breakdown) of the new device was evaluated, and it was observed that there was no conspicuous risk. Therefore, the HfSiO film can afford reliable performance enhancement when employed in the 28 nm LP HK/MG device with a limited thermal budget.

Experimental study of threshold voltage shift for Si:HfO2based ferroelectric field effect transistor

For a given three different Si doping concentrations at room and high temperatures, the threshold voltage shift (ΔV_th) on silicon-doped hafnium-oxide-based ferroelectric field effect transistor (FeFET) is experimentally investigated. It turned out that charge trapping in the gate stack of FeFET (versus polarization switching in the gate stack of FeFET) adversely affects ΔV_th. Charge trapping causes the positive ΔV_th, while polarization switching causes the negative ΔV_th. The dominance of polarization switching is predominantly determined by the total remnant polarization (2P_r), which can be controlled by adjusting Si doping concentration in the hafnium-oxide layer. As the Si doping concentration increases from 2.5% to 3.6%, and 5.0%, 2P_rdecreases 19.8μC cm^-2to 15.25μC cm^-2, and 12.5μC cm^-2, which leads to ΔV_thof -0.8 V, -0.09 V, and +0.1 V, respectively, at room temperature. At high temperature, the effect of polarization switching is degraded due to the decreasedP_r, while the effect of charge trapping is very independent of temperature. For those three different Si doping concentrations (i.e. 2.5%, 3.6%, and 5.0%), at the high temperature, ΔV_thof FeFET is -0.675 V, -0.075 V, and +0.15 V, respectively. This experimental work should provide an insight for designing FeFET for memory and logic applications.

Recent Studies on Supercapacitors with Next-Generation Structures

Supercapacitors have shown great potential as a possible solution to the increasing global demand for next-generation energy storage systems. Charge repositioning is based on physical or chemical mechanisms. There are three types of supercapacitors-the electrochemical double layer, the pseudocapacitor, and a hybrid of both. Each type is further subdivided according to the material used. Herein, a detailed overview of the working mechanism as well as a new method for capacitance enhancement are presented.

“Duodenal Submucosal Glandular Lesion with Brunner and Paneth Cell Differentiation”: A Variant of Pyloric Gland Adenoma? Morphologic and Immunohistochemical Similarities and Differences

Introduction/Objective

Duodenal epithelial polyps are reported in up to 3% of patients referred for upper endoscopy. Most include non-neoplastic lesions such as Brunner gland nodule/polyp and pancreatic or gastric heterotopia.

Neoplastic lesions such as pyloric gland adenomas (PGA) are less frequently encountered and have the propensity to progress to adenocarcinoma. Herein we report a duodenal submucosal glandular lesion that has a morphologic resemblance to PGA, but very different in several aspects. We compare and contrast the characteristics of these two lesions.

Methods

This was a 63-year-old man referred for an upper GI endoscopy for complaints of indigestion, dyspepsia, and weight fluctuation. Endoscopy showed a 13 mm polypoid lesion in the second portion of the duodenum, opposite to and separate from the ampulla. An en-bloc hot snare was used to resect the polyp. Histopathologic examination showed features reminiscent of PGA, namely a complex submucosal proliferation of tightly packed variably dilated glands and villous fronds lined by a monolayer of columnar cells with basally located round nuclei and prominent nucleoli. In contrast, however, the columnar cells in most of the lesion contained abundant mucinous cytoplasm resembling Brunner’s glands as well as areas of prominent paneth cell differentiation. The characteristic amphophilic ground glass cytoplasm of PGAs was only noted in a minor component of the lesion. MUC6 and MUC5AC, immunostains that are typically expressed in PGA, were negative. Additionally, p53 showed a wild-type pattern, beta- catenin showed normal membranous staining, and the Ki-67 index was low.

Results

After review of the literature and expert consultation, we were not able to fully classify this lesion under any documented entity, however, we believe that it could be akin to PGA. Authors hypothesized that PGAs may originate from stem cells within Brunner glands as a response to chronic injury. These cells may then differentiate upwards, forming gastric foveolar metaplasia or downwards giving rise to Brunner gland hyperplasia.

Conclusion

Based on this hypothesis, the proliferating cells are prone to mutations resulting in a hyperplasia/metaplasia to dysplasia sequence that leads to the formation of PGAs or lesions such as the one demonstrated here.

Quantitative ultrasound of the tongue: Echo intensity is a potential biomarker of bulbar dysfunction in amyotrophic lateral sclerosis

OBJECTIVES

To learn if quantitative ultrasound (QUS) distinguishes the tongues of healthy participants and amyotrophic lateral sclerosis (ALS) patients by echo intensity (EI) and to evaluate if EI correlates with measures of bulbar function.

METHODS

Ultrasound was performed along the midline of the anterior tongue surface in 16 ALS patients and 16 age-matched controls using a linear hockey stick 16-7 MHz transducer. A region of interest was manually drawn and then EI was determined for the upper 1/3 of the muscle. For patients, the ALS functional rating scale - revised (ALSFRS-R) was used to calculate bulbar sub-scores and the Iowa Oral Performance Instrument (IOPI) was used to measure tongue strength.

RESULTS

EI was significantly higher in ALS patients than in healthy participants (49.8 versus 37.8 arbitrary units, p < 0.01). In the patient group, EI was negatively correlated with ALSFRS-R bulbar sub-score (R_S = -0.65, p < 0.01). An inverse correlation between EI and tongue strength did not reach significance (R_S = -0.34, p = 0.28).

CONCLUSIONS

This study suggests that EI can differentiate healthy from diseased tongue muscle, and correlates with a standard functional measure in ALS patients.

SIGNIFICANCE

Tongue EI may represent a novel biomarker for bulbar dysfunction in ALS.

Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

In this work, the measured electrical characteristics of a fully depleted silicon-on-insulator (FDSOI) device and fin-shaped field-effect transistor (FinFET), whose gate electrode is connected in series to the bottom electrode of a ferroelectric capacitor (FE-FDSOI/FE-FinFET), are experimentally studied. The hysteretic property in input transfer characteristic of those devices is desirable for memory device applications, so that the understanding and modulating the hysteresis window is a key knob in designing the devices. It is experimentally observed that the hysteresis window of FE-FDSOI/FE-FinFET is decreased with (i) increasing the area of the ferroelectric capacitor and/or (ii) decreasing the gate area of baseline FET. The way how to control the hysteresis window of FE-FDSOI/FE-FinFET is proposed and discussed in detail.

0887 Diaphragm Pacer Malfunctions Requiring Surgical Repair in CCHS Patients

Introduction

Congenital Central Hypoventilation Syndrome (CCHS) is a genetic disorder that results in the loss of autonomic ventilatory control, and patients require ventilatory support during sleep or both sleep and wakefulness. One method of ventilatory support is diaphragm pacing (DP), where electrodes surgically placed on the phrenic nerve are connected to subcutaneously implanted receivers that communicate with external antennas and transmitter. There are limited data on the frequency of DP malfunctions that require surgical revision.

Methods

We reviewed the records of 24 CCHS patients ventilated by DP followed at CHLA from 1990-2019. Records were examined for demographics, PHOX2B mutation, pacing duration/day, date and type of malfunctions, age and time since implantation at malfunction occurrence, and repair success rate.

Results

All 24 patients had thoracoscopic electrode placement. 17/24 (71%) of patients used DP while asleep; 3/24 (13%) during wakefulness only. 4/24 (17%) were not currently using their pacers. 10/24 (42%) patients required at least one surgical intervention (Age at implantation 9 ± 4.6 (SD) years; age at malfunction 12.5 ± 7.4 years). The average time from pacer implantation to malfunction was 3.8 ± 3.5 years. Malfunctions included defective receivers (6), insulation leaks (1), defective electrodes (4), and hardware infection (1). Of 12 unique component repairs, 6/12 (50%) involved changing receivers, 1/12 (8%) involved repairing an insulation leak, 4/12 (33%) involved replacing the electrodes and receivers, and 1/12 (8%) involved hardware extraction. Of the 12 malfunctions, 10 (83%) had successful surgical revision. 2/12 (17%) repairs were not attempted. While awaiting surgical revision, patients were successfully ventilated by unilateral DP.

Conclusion

Nearly half of CCHS patients on DP experienced malfunctions within 11 years of implantation. The most common DP repair was receiver replacement. Patients who are waiting for repair often successfully ventilate while pacing unilaterally.

Support

None

Superaerophobic hydrogels for enhanced electrochemical and photoelectrochemical hydrogen production

The efficient removal of gas bubbles in (photo)electrochemical gas evolution reactions is an important but underexplored issue. Conventionally, researchers have attempted to impart bubble-repellent properties (so-called superaerophobicity) to electrodes by controlling their microstructures. However, conventional approaches have limitations, as they are material specific, difficult to scale up, possibly detrimental to the electrodes' catalytic activity and stability, and incompatible with photoelectrochemical applications. To address these issues, we report a simple strategy for the realization of superaerophobic (photo)electrodes via the deposition of hydrogels on a desired electrode surface. For a proof-of-concept demonstration, we deposited a transparent hydrogel assembled from M13 virus onto (photo)electrodes for a hydrogen evolution reaction. The hydrogel overlayer facilitated the elimination of hydrogen bubbles and substantially improved the (photo)electrodes' performances by maintaining high catalytic activity and minimizing the concentration overpotential. This study can contribute to the practical application of various types of (photo)electrochemical gas evolution reactions.

Comprehensive study of high pressure annealing on the ferroelectric properties of Hf0.5Zr0.5O2 thin films

Thin films of ferroelectric materials are potential candidates to be implemented in the unfolding of a new paradigm in high-density memory devices. As the thickness of these films reaches the sub-10 nm level, the interface properties between the electrode and ferroelectric material undergo significant changes that play a crucial role in governing the ferroelectric behavior. The present state-of-the-art approach presents a detailed investigation of different high pressure annealing (HPA) conditions through simulation studies. The simulation studies were performed using Landau-Khalatnikov equations, with Landau's parameters calculated using the least regression method as described in the Method S1. The extracted coefficients were used to determine various relationships (free energy, ferroelectric potential and negative capacitance) with which to observe the impact of HPA on the negative capacitance (NC) effect on account of the majority ferroelectric phase. To verify the simulation results, pulse transient switching measurements were conducted using Pt/Ti/TiN/Hf_0.5Zr_0.5O₂/TiN-based metal-ferroelectric-metal (MFM) devices to study the coercive field, interfacial capacitance and load resistance behavior. The results suggest that the non-ferroelectric portion (t-phase) coexists with the ferroelectric (o-phase) within the thin layer of the MFM capacitor adjacent to TiN electrode, which undergoes a phase transformation from the t-phase to the o-phase when exposed to different HPA conditions as well as electric field cycling during PS measurements. The simulation and experimental results confirm that the 550 °C at 50 atm N₂ environment provides the best possibility of achieving the highest ferroelectric characteristics with the lowest proportion of the non-ferroelectric phase and thus the maximum NC effect as well.

Rhenium Diselenide (ReSe2) Near-Infrared Photodetector: Performance Enhancement by Selective p-Doping Technique

In this study, a near-infrared photodetector featuring a high photoresponsivity and a short photoresponse time is demonstrated, which is fabricated on rhenium diselenide (ReSe2) with a relatively narrow bandgap (0.9-1.0 eV) compared to conventional transition-metal dichalcogenides (TMDs). The excellent photo and temporal responses, which generally show a trade-off relation, are achieved simultaneously by applying a p-doping technique based on hydrochloric acid (HCl) to a selected ReSe2 region. Because the p-doping of ReSe2 originates from the charge transfer from un-ionized Cl molecules in the HCl to the ReSe2 surface, by adjusting the concentration of the HCl solution from 0.1 to 10 m, the doping concentration of the ReSe2 is controlled between 3.64 × 1010 and 3.61 × 1011 cm-2. Especially, the application of the selective HCl doping technique to the ReSe2 photodetector increases the photoresponsivity from 79.99 to 1.93 × 103 A W-1, and it also enhances the rise and decay times from 10.5 to 1.4 ms and from 291 to 3.1 ms, respectively, compared with the undoped ReSe2 device. The proposed selective p-doping technique and its fundamental analysis will provide a scientific foundation for implementing high-performance TMD-based electronic and optoelectronic devices.

Impact of Ferroelectric Capacitor's Electrode Area on the Performance of Negative Capacitance Field Effect Transistor

To overcome the Boltzmann limit of Metal Oxide Semiconductor Field Effect Transistor (MOSFET), negative (differential) capacitance FET (NCFET) has been under development since 2008. NCFET enables to implement the internal amplification of gate voltage, resulting in a high on/off-current ratio, and good compatibility with current CMOS technology. The hysteresis window of NCFET, however, is the conspicuous obstacle for its commercialization (especially, for CMOS logic device application). It is well known that there are various factors, which affect the hysteresis window of NCFET, such as the thickness of ferroelectric capacitor, the kinds of ferroelectric material, etc. While the thickness of ferroelectric capacitor and the kinds of ferroelectric material have been widely studied, the impact of ferroelectric capacitor's electrode area on the performance of NCFET has never been investigated. In this work, the aforementioned impact is analyzed with preliminary experiment data.

Steep Slope Silicon-on-Insulator Field Effect Transistor with Negative Capacitance: Analysis on Hysteresis

In recent 10 years, many studies have investigated/considered negative capacitance field effect transistor (NCFET) as future low-power device. In addition to the experimental demonstration of NC planar bulk MOSFET, the state-of-the-art 14 nm FinFET technology has adopted the benefits of using negative capacitance and therefore, the NC-FinFET is expected to be available in market. However, there is a lack of experimental study on NC Silicon-on-Insulator (SOI) FET, which should be another candidate for ultra-low-power device. To complement the lack of such studies, in this work, the experimental study on NCSOI device (e.g., the degree of hysteresis, steep switching characteristic, and so on) has been done with reliable 10 nm hafnium-based ferroelectric capacitor.

Process-Induced Random Variation: Work-Function Variation in Stacked Nanowire Field Effect Transistor

Using the technology computer-aided design (TCAD) tool, the impact of work function variation (WFV) in stacked nanowire field effect transistor (stacked NWFET) is investigated. To study the WFV-induced device performance variation, the metal grain granularity with the work function values and probabilities, which are corresponding to the gate material in the high-k/metal gate of stacked NWFET, is formed and applied in the stacked NWFET. It turned out that, in the gate-all-around nanowire device structure, the WFV-induced threshold voltage (V_T) variation can be effectively suppressed because the effective grain size around the channel region is smaller than the actual grain size. To explore the WFV-induced V_T variation in stacked NWFET, the number of stacks (i.e., single, 2-/3-stacked NWFET) and distance in-between nanowires (i.e., 10.5, 13.5, 16.5, 19.5, and 22.5 nm) are quantitatively varied. In stacked NWFET, the WFV-induced V_T variation is effectively suppressed as the number of stacked nanowires increases. On the other hand, it is revealed that the distance in-between nanowires in stacked NWFET has nothing to do with the WFV-induced V_T variation.

Polarity control in a single transition metal dichalcogenide (TMD) transistor for homogeneous complementary logic circuits

Recently, there have been various attempts to demonstrate the feasibility of transition metal dichalcogenide (TMD) transistors for digital logic circuits. A complementary inverter circuit, which is a basic building block of a logic circuit, was implemented in earlier works by heterogeneously integrating n- and p-channel transistors fabricated on different TMD materials. Subsequently, to simplify the circuit design and fabrication process, complementary inverters were constructed on single-TMD materials using ambipolar transistors. However, continuous transition from the electron-conduction to the hole-conduction state in the ambipolar devices led to the problem of a high leakage current. Here, we report a polarity-controllable TMD transistor that can operate as both an n- and a p-channel transistor with a low leakage current of a few picoamperes. The device polarity can be switched simply by converting the sign of the drain voltage. This is because a metal-like tungsten ditelluride (WTe₂) with a low carrier concentration is used as a drain contact, which subsequently allows selective carrier injection at the palladium/tungsten diselenide (WSe₂) junction. In addition, by using the operating principle of the polarity-controllable transistor, we demonstrate a complementary inverter circuit on a single TMD channel material (WSe₂), which exhibits a very low static power consumption of a few hundred picowatts. Finally, we confirm the expandability of this polarity-controllable transistor toward more complex logic circuits by presenting the proper operation of a three-stage ring oscillator.

Precise control of nanoscale spacing between electrodes using different natured self-assembled monolayers

Herein, we introduce an interdigitated horizontal electrode (IHE) structure with a metal-based electron-collecting (or -injecting) electrode and a hole-collecting (or -injecting) electrode composed of a conductive polymeric material that has a nanoscale distance and is horizontally separated. In the IHE, a metal electrode is fabricated on a silicon-oxide substrate, and a self-assembled monolayer (SAM) is selectively bonded to the metal and the oxide to form a conductive polymer electrode by dip coating. Each of the SAM materials is composed of a head part bonded to the substrate surface and a tail part that is hydrophilic or hydrophobic. This inherent property makes the metal electrode hydrophobic and the oxide substrate hydrophilic. Ag is used as a metal electrode material and is combined with alkanethiol SAMs. The alkylsilane SAMs are combined with the silicon oxide substrate to make them hydrophilic, using poly (3, 4-ethylenedioxythiophene)-poly (PEDOT: PSS) as the conductive polymer material. In this study, we have found that there is a difference in the spacing between the two electrodes that depends on the combination of SAM materials. Each interval was spaced from a minimum of 140 nm to a maximum of 385 nm.

Simulation Techniques for Nanoelectromechanical (NEM) Relay

Nanoelectromechanical (NEM) relays have been studied for use in low-power logic applications because of their conspicuous features of (i) zero off-state leakage and (ii) abrupt on/off switching behavior in principle. In this study, a lateral NEM relay is analytically modeled. Then, the pull-in/out voltages, which work as turn-on/off voltages for the device, are estimated quantitatively using equations that explain the operational principle of the NEM relay. Exemplary design parameters are proposed to ensure the operation of the NEM relay as a logic device, and its transfer characteristics are analyzed.

Steep switching devices for low power applications: negative differential capacitance/resistance field effect transistors

Simply including either single ferroelectric oxide layer or threshold selector, we can make conventional field effect transistor to have super steep switching characteristic, i.e., sub-60-mV/decade of subthreshold slope. One of the representative is negative capacitance FET (NCFET), in which a ferroelectric layer is added within its gate stack. The other is phase FET (i.e., negative resistance FET), in which a threshold selector is added to an electrode (e.g., source or drain) of conventional field effect transistor. Although the concept of the aforementioned two devices was presented more or less recently, numerous studies have been published. In this review paper, by reviewing the published studies over the last decade, we shall de-brief and discuss the history and the future perspectives of NCFET/phase FET, respectively. The background, experimental investigation, and future direction for developing the aforementioned two representative steep switching devices (i.e., NCFET and phase FET/negative resistance FET) are to be discussed in detail.

Fermi-Level Unpinning Technique with Excellent Thermal Stability for n-Type Germanium

A metal-interlayer-semiconductor (M-I-S) structure with excellent thermal stability and electrical performance for a nonalloyed contact scheme is developed, and considerations for designing thermally stable M-I-S structure are demonstrated on the basis of n-type germanium (Ge). A thermal annealing process makes M-I-S structures lose their Fermi-level unpinning and electron Schottky barrier height reduction effect in two mechanisms: (1) oxygen (O) diffusion from the interlayer to the contact metal due to high reactivity of a pure metal contact with O and (2) interdiffusion between the contact metal and semiconductor through grain boundaries of the interlayer. A pure metal contact such as titanium (Ti) provides very poor thermal stability due to its high reactivity with O. A structure with a tantalum nitride (TaN) metal contact and a titanium dioxide (TiO₂) interlayer exhibits moderate thermal stability up to 400 °C because TaN has much lower reactivity with O than with Ti. However, the TiO₂ interlayer cannot prevent the interdiffusion process because it is easily crystallized during thermal annealing and its grain boundaries act as diffusion path. A zinc oxide (ZnO) interlayer doped with group-III elements, such as an aluminum-doped ZnO (AZO) interlayer, acts as a good diffusion barrier due to its high crystallization temperature. A TaN/AZO/n-Ge structure provides excellent thermal stability above 500 °C as it can prevent both O diffusion and interdiffusion processes; hence, it exhibits Ohmic contact properties for all thermal annealing temperatures. This work shows that, to fabricate a thermally stable and low resistive M-I-S contact structure, the metal contact should have low reactivity with O and a low work-function, and the interlayer should have a high crystallization temperature and a low conduction band offset to Ge. Furthermore, new insights are provided for designing thermally stable M-I-S contact schemes for any semiconductor material that suffers from the Fermi-level pinning problem.

Silver Nanowire/Colorless-Polyimide Composite Electrode: Application in Flexible and Transparent Resistive Switching Memory

Improving the performance of resistive switching memories, while providing high transparency and excellent mechanical stability, has been of great interest because of the emerging need for electronic wearable devices. However, it remains a great challenge to fabricate fully flexible and transparent resistive switching memories because not enough research on flexible and transparent electrodes, for their application in resistive switching memories, has been conducted. Therefore, it has not been possible to obtain a nonvolatile memory with commercial applications. Recently, an electrode composed of a networked structure of Ag nanowires (AgNWs) embedded in a polymer, such as colorless polyimide (cPI), has been attracting increasing attention because of its high electrical, optical, and mechanical stability. However, for an intended use as a transparent electrode and substrate for resistive switching memories, it still has the crucial disadvantage of having a limited surface coverage of conductive pathways. Here, we introduce a novel approach to obtain a AgNWs/cPI composite electrode with a high figure-of-merit, mechanical stability, surface smoothness, and abundant surface coverage of conductive networks. By employing the fabricated electrodes, a flexible and transparent resistive memory could be successfully fabricated.