Transport Properties of a MoS2/WSe2 Heterojunction Transistor and Its Potential for Application

This paper studies band-to-band tunneling in the transverse and lateral directions of van der Waals MoS2/WSe2 heterojunctions. We observe room-temperature negative differential resistance (NDR) in a heterojunction diode comprised of few-layer WSe2 stacked on multilayer MoS2. The presence of NDR is attributed to the lateral band-to-band tunneling at the edge of the MoS2/WSe2 heterojunction. The backward tunneling diode shows an average conductance slope of 75 mV/dec with a high curvature coefficient of 62 V(-1). Associated with the tunnel-diode characteristics, a positive-to-negative transconductance in the MoS2/WSe2 heterojunction transistors is observed. The transition is induced by strong interlayer coupling between the films, which results in charge density and energy-band modulation. The sign change in transconductance is particularly useful for multivalued logic (MVL) circuits, and we therefore propose and demonstrate for the first time an MVL-inverter that shows three levels of logic using one pair of p-type transistors.

Modulating the Functions of MoS2/MoTe2 van der Waals Heterostructure via Thickness Variation

Various functional devices including p-n forward, backward, and Zener diodes are realized with a van der Waals heterostructure that are composed of molybdenum disulfide (MoS₂) and molybdenum ditelluride (MoTe₂) by changing the thickness of the MoTe₂ layer and common gate bias. In addition, the available negative differential transconductance of the heterostructure is utilized to fabricate a many-valued logic device that exhibits three different logic states ( i.e., a ternary inverter). Furthermore, the multivalued logic device can be transformed into a binary inverter using laser irradiation. This work provides a comprehensive understanding of the device fabrication and electronic-device design utilizing thickness control.

Light-Triggered Ternary Device and Inverter Based on Heterojunction of van der Waals Materials

Multivalued logic (MVL) devices/circuits have received considerable attention because the binary logic used in current Si complementary metal-oxide-semiconductor (CMOS) technology cannot handle the predicted information throughputs and energy demands of the future. To realize MVL, the conventional transistor platform needs to be redesigned to have two or more distinctive threshold voltages (V_THs). Here, we report a finding: the photoinduced drain current in graphene/WSe₂ heterojunction transistors unusually decreases with increasing gate voltage under illumination, which we refer to as the light-induced negative differential transconductance (L-NDT) phenomenon. We also prove that such L-NDT phenomenon in specific bias ranges originates from a variable potential barrier at a graphene/WSe₂ junction due to a gate-controllable graphene electrode. This finding allows us to conceive graphene/WSe₂-based MVL logic circuits by using the I_D-V_G characteristics with two distinctive V_THs. Based on this finding, we further demonstrate a light-triggered ternary inverter circuit with three stable logical states (ΔV_out of each state <0.05 V). Our study offers the pathway to substantialize MVL systems.

Recent Advances on Multivalued Logic Gates: A Materials Perspective

The recent advancements in multivalued logic gates represent a rapid paradigm shift in semiconductor technology toward a new era of hyper Moore's law. Particularly, the significant evolution of materials is guiding multivalued logic systems toward a breakthrough gradually, whereby they are transcending the limits of conventional binary logic systems in terms of all the essential figures of merit, i.e., power dissipation, operating speed, circuit complexity, and, of course, the level of the integration. In this review, recent advances in the field of multivalued logic gates based on emerging materials to provide a comprehensive guideline for possible future research directions are reviewed. First, an overview of the design criteria and figures of merit for multivalued logic gates is presented, and then advancements in various emerging nanostructured materials-ranging from 0D quantum dots to multidimensional heterostructures-are summarized and these materials in terms of device design criteria are assessed. The current technological challenges and prospects of multivalued logic devices are also addressed and major research trends are elucidated.

Multifunctional Graphene/DNA-Based Platform for the Construction of Enzyme-Free Ternary Logic Gates

In this work, we have successfully realized multivalued logic circuits including ternary INHIBIT and ternary OR logic gates in an enzyme-free condition by integration of graphene oxide and DNA for the first time. Compared to the binary logic gate with two states of "0" and "1", the multivalued logic gate contains three different states of "0", "1", and "2", which can increase the information content in a system and further improve the ability of information processing. Such types of multivalued logic operations provide a wider field of vision toward DNA-based algebra logical operations to make applications more accurate with complexity reduction and accelerate the development of advanced logic gates.

Multi-State Heterojunction Transistors Based on Field-Effect Tunneling-Transport Transitions

A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is presented. Incorporation of the organic heterostructure into the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) architecture induces the generation of stable multiple logic states in the device; these states can be further optimized to be equiprobable and distinctive, which are the most desirable and requisite properties for multivalued logic devices. A systematic investigation reveals that the electrical properties of the device are governed by not only the conventional field-effect charge transport but also the field-effect charge tunneling at the heterointerfaces, and thus, an intermediate state can be finely tuned by independently controlling the transition between the onsets of these two mechanisms. The achieved device performance agrees with the results of a numerical simulation based on a pseudo-metal-insulator-metal model; the obtained findings therefore provide rational criteria for material selection in a simple energetic perspective. The operation of various ternary logic circuits based on the optimized multistate heterojunction transistors, including the NMIN and NMAX gates, is also demonstrated.

Functionalized Organic Material Platform for Realization of Ternary Logic Circuit

Negative differential resistance/transconductance (NDR/NDT) has been attracting significant attention as a key functionality in the development of multivalued logic (MVL) systems that can overcome the limits of conventional binary logic devices. A high peak-to-valley current ratio (PVCR) and more than double-peak transfer characteristics are required to achieve a stable MVL operation. In this study, an organic NDR (ONDR) device with double-peak transfer characteristics and a high peak-to-valley current ratio (PVCR; >10²) is fabricated by utilizing an organic material platform for the development of a key element device for MVL applications. The organic NDT (ONDT) device is fabricated using a series connection of electron-dominant (P(NDI2OD-Se2)) and hole-dominant (P(DPP2DT-T2)) channel ambipolar organic field-effect transistors (AOFETs), and the NDR feature is achieved via correlated biasing of the ONDT device. The PVCR of the ONDT device can reach up to 13,000 via carrier transfer modulation of the AOFETs by varying the PMMA:P(VDF-TrFE) ratio of the mixed layer that is used as the top-gate dielectric of each AOFET. Further, ternary latch circuit operation is demonstrated using the developed ONDR device that stores three logic states with three distinct and controllable output states by adjusting the PMMA:P(VDF-TrFE) ratio of the dielectric layer.

Implementation of Multivariable Logic Functions in Parallel by Electrically Addressing a Molecule of Three Dopants in Silicon

To realize low-power, compact logic circuits, one can explore parallel operation on single nanoscale devices. An added incentive is to use multivalued (as distinct from Boolean) logic. Here, we theoretically demonstrate that the computation of all the possible outputs of a multivariate, multivalued logic function can be implemented in parallel by electrical addressing of a molecule made up of three interacting dopant atoms embedded in Si. The electronic states of the dopant molecule are addressed by pulsing a gate voltage. By simulating the time evolution of the non stationary electronic density built by the gate voltage, we show that one can implement a molecular decision tree that provides in parallel all the outputs for all the inputs of the multivariate, multivalued logic function. The outputs are encoded in the populations and in the bond orders of the dopant molecule, which can be measured using an STM tip. We show that the implementation of the molecular logic tree is equivalent to a spectral function decomposition. The function that is evaluated can be field-programmed by changing the time profile of the pulsed gate voltage.

Photonic Modulation of Negative Differential Transconductance for Tunable Multivalued Logic in Heterojunction Transistors

Logic conversion within multivalued logic (MVL) circuits is a promising solution that enhances complex data processing achieved through the modulation of negative differential transconductance (NDT) characteristics of heterojunction transistors (HTRs) using various external control factors. Among these factors, utilizing photonic modulation for logic switching facilitates multi-state operations, enables wavelength-selective logic conversion and, on this basis, enhances the flexibility of the circuit system. Herein, the implementation of logic conversion in HTRs through the photonic modulation of NDT characteristics is presented. Logic switching in the In2O3/PDPP3T HTR is enabled by tuning its NDT characteristics utilizing optical stimulation with LED light at a specific wavelength. Moreover, operating the HTR through photonic control reduces process requirements while ensuring stable operation, thereby enhancing compatibility and scalability in circuit design. The operating mechanism of the device is also investigated by individually analyzing the carrier flows in two paths and examining the electrical characteristics under dark and illuminated states. To verify the functionality of the MVL circuit, stable switching between binary and ternary logic inverters as a practical application is demonstrated.

Applications of a ZnO-Te Antiambipolar Switch for Drastic Power and Area Scaling

Combinations of n- and p-type semiconductors (with thicknesses of a few nanometers or ultrathin) deposited at low temperatures are creating new opportunities for novel devices and circuits. We demonstrate an antiambipolar switch (AAS) device using a heterojunction comprising extremely thin ZnO and Te layers operating at a complementary metal-oxide semiconductor (CMOS)-compatible bias (∼1.2 V) with a high peak-to-valley ratio (∼104). The entire process was performed at a full wafer scale with a low thermal budget at temperatures below 150 °C. The device count and area of the binary-to-ternary converter designed with this device were reduced by ∼95% and ∼97%, respectively. In addition, we demonstrate a few examples of binary-ternary logic circuits to show that the system complexity and computing efficiency of the binary CMOS architecture can be dramatically improved by easily cointegrating the ZnO-Te AAS-based converter in the back-end-of-line structure.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

Mixed-Dimensional Semiconductors-Based Ternary Circuits with Tunable Negative Transconductance Characteristics

Multivalued logic (MVL) systems, in which data are processed with more than two logic values, are considered a viable solution for achieving superior processing efficiency with higher data density and less complicated system complexity without further scaling challenges. Such MVL systems have been conceptually realized by using negative transconductance (NTC) devices whose channels consist of van der Waals (vdW) heterojunctions of low-dimensional semiconductors; however, their circuit operations have not been quite ideal for driving multiple stages in real circuit applications due to reasons such as a reduced output swing and poorly defined logic states. Herein, we demonstrate ternary inverter circuits with near rail-to-rail swing and three distinct logic states by employing vdW p-n heterojunctions of single-walled carbon nanotubes (SWCNT) and MoS2 where the SWCNT layer completely covers the MoS2 layer. In particular, SWCNTs are inkjet printed to form heterojunctions with MoS2 grown by chemical vapor deposition (CVD), and both inkjet printing and CVD are fully scalable device fabrication methods for low-dimensional materials. In addition, the NTC characteristics of heterojunction field-effect transistors (H-FETs) are explained based on the electrical characteristics of individual SWCNT and MoS2 channels. By adjustment of the p-channel characteristics in H-FETs by exploiting the advantages of the inkjet printing technology, the widths of the NTC regions are easily adjusted accordingly. The extended NTC region enables stable middle logic state operations of low-dimensional semiconductors-based ternary inverters over a sufficiently wide input voltage range.

Electron-Beam-Induced Negative Differential Transconductance Homojunction Device Based on van der Waals Materials for Functionally Complete Ternary Computing

Negative differential transconductance (NDT) devices have emerged as promising candidates for multivalued logic computing, and particularly for ternary logic systems. To enable computation of any ternary operation, it is essential to have a functionally complete set of ternary logic gates, which remains unrealized with current NDT technologies, posing a critical limitation for higher-level circuit design. Additionally, NDT devices typically rely on heterojunctions, complicating fabrication and impacting reliability due to the introduction of additional materials and interfaces. Here, we utilize an electron beam to develop tungsten diselenide (WSe2) homojunction NDT devices with W-shaped current-voltage (I-V) characteristics. We demonstrate that electron beam enables the manipulation of Se atoms in WSe2, facilitating controllable and spatially precise tailoring of the WSe2 work function. The electron-beam treatment applied to a part of the WSe2 channel induces a lateral homojunction and ultimately results in the W-shaped I-V curves, which enable both one-input and two-input ternary logic gates. We propose and implement a balanced circuit design for two-input ternary NAND, AND, NOR, and OR gates, featuring a low device count, full-swing operation, and minimized output signal variations. Together with three types of ternary inverters also designed in this work, they form a functionally complete set of ternary logic gates─a prerequisite for practical ternary computing. This work addresses a critical gap in the development of NDT-based ternary computing by ensuring functional completeness and highlights the versatility of electron-beam treatment as an engineering tool for tailoring the properties of two-dimensional van der Waals materials.

Advanced Applications of Polymer Hydrogels in Electronics and Signal Processing

The current state of affairs in the field of using polymer hydrogels for the creation of innovative systems for signal and image processing, of which computing is a special case, is analyzed. Both of these specific examples of systems capable of forming an alternative to the existing semiconductor-based computing technology, but assuming preservation of the used algorithmic basis, and non-trivial signal converters, the nature of which requires transition to fundamentally different algorithms of data processing, are considered. It is shown that the variability of currently developed information processing systems based on the use of polymers, including polymer hydrogels, leads to the need to search for complementary algorithms. Moreover, the well-known thesis that modern polymer science allows for the realization of functional materials with predetermined properties, at the present stage, receives a new sounding: it is acceptable to raise the question of creating systems built on a quasi-biological basis and realizing predetermined algorithms of information or image processing. Specific examples that meet this thesis are considered, in particular, promising information protection systems for UAV groups, as well as systems based on the coupling of neural networks with holograms that solve various applied problems. These and other case studies demonstrate the importance of interdisciplinary cooperation for solving problems arising from the need for further modernization of signal processing systems.