A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors

This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 × 1.4 mm², with the power dissipation of 1.6 mW from a single 1.2-V supply.

Single-shot experiments at the soft X-FEL FERMI using a back-side-illuminated scientific CMOS detector

The latest Complementary Metal Oxide Semiconductor (CMOS) 2D sensors now rival the performance of state-of-the-art photon detectors for optical application, combining a high-frame-rate speed with a wide dynamic range. While the advent of high-repetition-rate hard X-ray free-electron lasers (FELs) has boosted the development of complex large-area fast CCD detectors in the extreme ultraviolet (EUV) and soft X-ray domains, scientists lacked such high-performance 2D detectors, principally due to the very poor efficiency limited by the sensor processing. Recently, a new generation of large back-side-illuminated scientific CMOS sensors (CMOS-BSI) has been developed and commercialized. One of these cost-efficient and competitive sensors, the GSENSE400BSI, has been implemented and characterized, and the proof of concept has been carried out at a synchrotron or laser-based X-ray source. In this article, we explore the feasibility of single-shot ultra-fast experiments at FEL sources operating in the EUV/soft X-ray regime with an AXIS-SXR camera equipped with the GSENSE400BSI-TVISB sensor. We illustrate the detector capabilities by performing a soft X-ray magnetic scattering experiment at the DiProi end-station of the FERMI FEL. These measurements show the possibility of integrating this camera for collecting single-shot images at the 50 Hz operation mode of FERMI with a cropped image size of 700 × 700 pixels. The efficiency of the sensor at a working photon energy of 58 eV and the linearity over the large FEL intensity have been verified. Moreover, on-the-fly time-resolved single-shot X-ray resonant magnetic scattering imaging from prototype Co/Pt multilayer films has been carried out with a time collection gain of 30 compared to the classical start-and-stop acquisition method performed with the conventional CCD-BSI detector available at the end-station.

Integrated wafer-scale manufacturing of electron cryomicroscopy specimen supports

We present a process for the manufacture of electron cryomicroscopy (cryoEM) specimen supports with an integrated foil-grid structure, using cryogenic vacuum evaporation (cryoEvap) and patterned electroplating on a silicon wafer substrate. The process is designed to produce a pattern of nanometre scale holes in a thin metal foil, which is attached to a pattern of micrometre scale grid bars that support it and allow handling of the millimetre scale device. All steps are carried out on a single 4 inch (100 mm) silicon wafer, without any need to handle individual grids during processing, and yield about 600 supports per wafer. The approach is generally applicable to the problem of creating a thin foil with nanometre scale features and a micrometre scale support structure; here it is used to make an all gold, HexAuFoil type design. It also allows for the addition of custom fiducial markers and patterns which aid in locating and identifying particular regions of a grid at several length scales: by eye, in an optical microscope, and in the electron microscope. Implemented at scale, this manufacturing process can supply ample grids to support the continued growth of cryoEM for determining the structure of biological molecules.

Enhancing AlN PMUTs' Acoustic Responsivity within a MEMS-on-CMOS Process

In this paper, guidelines for the optimization of piezoelectrical micromachined ultrasound transducers (PMUTs) monolithically integrated over a CMOS technology are developed. Higher acoustic pressure is produced by PMUTs with a thin layer of AlN piezoelectrical material and Si₃N₄ as a passive layer, as is studied here with finite element modeling (FEM) simulations and experimental characterization. Due to the thin layers used, parameters such as residual stress become relevant as they produce a buckled structure. It has been reported that the buckling of the membrane due to residual stress, in general, reduces the coupling factor and consequently degrades the efficiency of the acoustic pressure production. In this paper, we show that this buckling can be beneficial and that the fabricated PMUTs exhibit enhanced performance depending on the placement of the electrodes. This behavior was demonstrated experimentally and through FEM. The acoustic characterization of the fabricated PMUTs shows the enhancement of the PMUT performance as a transmitter (with 5 kPa V⁻¹ surface pressure for a single PMUT) and as a receiver (12.5 V MPa⁻¹) in comparison with previously reported devices using the same MEMS-on-CMOS technology as well as state-of-the-art devices.

Ultra-Low Power Hand Gesture Sensor Using Electrostatic Induction

This paper presents an ultra-low power hand gesture sensor using electrostatic induction for mobile devices. Two electrodes, which consist of electret foils stacked on metal sheets, are used to recognize two gestures such as hand movements from left to right and right to left. The hand gesture recognition is realized by detecting the electrostatic induction currents induced by hand movements. However, the electrostatic induction currents are significantly small; hence, a hand gesture recognition chip is first designed in this study to amplify and detect the small electrostatic induction currents with low power. This chip is fabricated in a commercial 180 nm complementary metal oxide semiconductor (CMOS) process, and the measurement results indicate that the fabricated gesture recognition chip consumes 406 nW, which is less than 1/100th of the power dissipation of conventional gesture sensors.

Transfer of Tactile Sensors Using Stiction Effect Temporary Handling

A novel method for transfer of tactile sensors using stiction effect temporary handling (SETH) is presented to simplify the microelectromechanical-system (MEMS)/CMOS integration process, improve the process reliability and electrical performance, and reduce material constriction. The structure of the tactile sensor and the reroute substrate were first manufactured separately. Following the release process, the stiction-contact structures, which are designed to protect the low-stress silicon nitride diaphragm of the tactile sensor and prevent the low-stress silicon nitride diaphragm from moving during the subsequent bonding process, are temporarily bonded to the substrate owing to the stiction effect. After the released tactile sensor is bonded to the reroute substrate by Au–Si eutectic flip-chip bonding, a pulling force perpendicular to the bonded die is applied to break away the temporary supported beam of the tactile sensor, and the tactile sensor is then successfully transferred to the reroute substrate. The size of the transferred tactile sensor is as small as 180 μm × 180 μm × 1.2 μm, and the force area of the tactile sensor is only 120 μm × 120 μm × 1.2 μm. The maximum misalignment of the flip-chip bonding process is approximately 1.5 μm. The tactile sensors are tested from 0 to 17.1 kPa when the power supply is 5 V, resulting in a sensitivity of 0.22 mV/V/kPa, 0.26 mV/V/kPa, 0.27 mV/V/kPa and 0.27 mV/V/kPa, separately. The stress caused by the Au–Si eutectic flip-chip bonding ranges from −5.83 to +5.54 kPa. The temporary bonding strength caused by stiction is calculated to be larger than 7.06 kPa and less than 22.31 kPa. The shear strength of the bonded test structure is approximately 30.74 MPa and the yield of the transferred tactile sensors is as high as 90%.

Manufacturing and Characterization of Three-Axis Magnetic Sensors Using the Standard 180 nm CMOS Technology

A three-axis micro magnetic sensor (MS) is developed based on the standard 180 nm complementary metal oxide semiconductor (CMOS) technology. The MS designs two magnetic sensing elements (MSEs), which consists of an x/y-MSE and an z-MSE, to reduce cross-sensitivity. The x/y-MSE is constructed by an x-MSE and an y-MSE that are respectively employed to detect in the x- and y-direction magnetic field (MF). The z-MSE is used to sense in the z-direction MF. The x/y-MSE, which is constructed by two magnetotransistors, designs four additional collectors that are employed to increase the sensing current and to enhance the sensitivity of the MS. The Sentaurus TCAD software simulates the characteristic of the MS. The measured results reveal that the MS sensitivity is 534 mV/T in the x-direction MF, 525 mV/T in the y-direction MF and 119 mV/T in the z-axis MF.

A New Current-Shaping Technique Based on a Feedback Injection Mechanism to Reduce VCO Phase Noise

Inductor-capacitor voltage controlled oscillators (LC-VCOs) are the most common type of oscillator used in sensors systems, such as transceivers for wireless sensor networks (WSNs), VCO-based reading circuits, VCO-based radar sensors, etc. This work presents a technique to reduce the LC-VCOs phase noise using a new current-shaping method based on a feedback injection mechanism with only two additional transistors. This technique consists of keeping the negative resistance seen from LC tank constant throughout the oscillation cycle, achieving a significant phase noise reduction with a very low area increase. To test this method an LC-VCO was designed, fabricated and measured on a wafer using 90 nm CMOS technology with 1.2 V supply voltage. The oscillator outputs were buffered using source followers to provide additional isolation from load variations and to boost the output power. The tank was tuned to 1.8 GHz, comprising two 1.15 nH with 1.5 turns inductors with a quality factor (Q) of 14, a 3.27 pF metal-oxide-metal capacitor, and two varactors. The measured phase noise was −112 dBc/Hz at 1 MHz offset. Including the pads, the chip area is 750 × 850 μm2.

A Low-Power Opamp-Less Second-Order Delta-Sigma Modulator for Bioelectrical Signals in 0.18 µm CMOS

This article reports on a compact and low-power CMOS readout circuit for bioelectrical signals based on a second-order delta-sigma modulator. The converter uses a voltage-controlled, oscillator-based quantizer, achieving second-order noise shaping with a single opamp-less integrator and minimal analog circuitry. A prototype has been implemented using 0.18 μm CMOS technology and includes two different variants of the same modulator topology. The main modulator has been optimized for low-noise, neural-action-potential detection in the 300 Hz–6 kHz band, with an input-referred noise of 5.0 μV_rms, and occupies an area of 0.0045 mm². An alternative configuration features a larger input stage to reduce low-frequency noise, achieving 8.7 μV_rms in the 1 Hz–10 kHz band, and occupies an area of 0.006 mm². The modulator is powered at 1.8 V with an estimated power consumption of 3.5 μW.

All-Electronic Emitter-Detector Pairs for 250 GHz in Silicon

The spread of practical terahertz (THz) systems dedicated to the telecommunication, pharmacy, civil security, or medical markets requires the use of mainstream semiconductor technologies, such as complementary metal-oxide-semiconductor (CMOS) lines. In this paper, we discuss the operation of a CMOS-based free space all-electronic system operating near 250 GHz, exhibiting signal-to-noise ratio (SNR) with 62 dB in the direct detection regime for one Hz equivalent noise bandwidth. It combines the state-of-the-art detector based on CMOS field-effect-transistors (FET) and a harmonic voltage-controlled oscillator (VCO). Three generations of the oscillator circuit are presented, and the performance characterization techniques and their improvement are explained in detail. The manuscript presents different emitter-detector pair operation modalities, including spectroscopy and imaging.

A CMOS-compatible morphotropic phase boundary

Morphotropic phase boundaries (MPBs) show substantial piezoelectric and dielectric responses, which have practical applications. The predicted existence of MPB in HfO₂-ZrO₂solid solution thin film has provided a new way to increase the dielectric properties of a silicon-compatible device. Here, we present a new fabrication design by which the density of MPBρMPBand consequently the dielectric constantϵ_rof HfO₂-ZrO₂thin film was considerably increased. TheρMPBwas controlled by fabrication of a 10 nm [1 nm Hf_0.5Zr_0.5O₂(ferroelectric)/1 nm ZrO₂(antiferroelectric)] nanolaminate followed by an appropriate annealing process. The coexistence of orthorhombic and tetragonal structures, which are the origins of ferroelectric (FE) and antiferroelectric (AFE) behaviors, respectively, was structurally confirmed, and a double hysteresis loop that originates from AFE ordering, with some remnant polarization that originates from FE ordering, was observed inP-Ecurve. A remarkable increase inϵ_rcompared to the conventional HfO₂-ZrO₂thin film was achieved by controlling the FE-AFE ratio. The fabrication process was performed at low temperature (250 °C) and the device is compatible with silicon technology, so the new design yields a device that has possible applications in near-future electronics.

A CMOS RF Receiver with Improved Resilience to OFDM-Induced Second-Order Intermodulation Distortion for MedRadio Biomedical Devices and Sensors

A MedRadio RF receiver integrated circuit for implanted and wearable biomedical devices must be resilient to the out-of-band (OOB) orthogonal frequency division modulation (OFDM) blocker. As the OFDM is widely adopted for various broadcasting and communication systems in the ultra-high frequency (UHF) band, the selectivity performance of the MedRadio RF receiver can severely deteriorate by the second-order intermodulation (IM2) distortion induced by the OOB OFDM blocker. An analytical investigation shows how the OFDM-induced IM2 distortion power can be translated to an equivalent two-tone-induced IM2 distortion power. It makes the OFDM-induced IM2 analysis and characterization process for a MedRadio RF receiver much simpler and more straightforward. A MedRadio RF receiver integrated circuit with a significantly improved resilience to the OOB IM2 distortion is designed in 65 nm complementary metal-oxide-semiconductor (CMOS). The designed RF receiver is based on low-IF architecture, comprising a low-noise amplifier, single-to-differential transconductance stage, quadrature passive mixer, trans-impedance amplifier (TIA), image-rejecting complex bandpass filter, and fractional phase-locked loop synthesizer. We describe design techniques for the IM2 calibration through the gate bias tuning at the mixer, and the dc offset calibration that overcomes the conflict with the preceding IM2 calibration through the body bias tuning at the TIA. Measured results show that the OOB carrier-to-interference ratio (CIR) performance is significantly improved by 4–11 dB through the proposed IM2 calibration. The measured maximum tolerable CIR is found to be between −40.2 and −71.2 dBc for the two-tone blocker condition and between −70 and −77 dBc for the single-tone blocker condition. The analytical and experimental results of this work will be essential to improve the selectivity performance of a MedRadio RF receiver against the OOB OFDM-blocker-induced IM2 distortion and, thus, improve the robustness of the biomedical devices in harsh wireless environments in the MedRadio and UHF bands.

Ge N-Channel MOSFETs with ZrO2 Dielectric Achieving Improved Mobility

High-mobility Ge nMOSFETs with ZrO₂ gate dielectric are demonstrated and compared against transistors with different interfacial properties of ozone (O₃) treatment, O₃ post-treatment and without O₃ treatment. It is found that with O₃ treatment, the Ge nMOSFETs with ZrO₂ dielectric having a EOT of 0.83 nm obtain a peak effective electron mobility (μ_eff) of 682 cm²/Vs, which is higher than that of the Si universal mobility at the medium inversion charge density (Q_inv). On the other hand, the O₃ post-treatment with Al₂O₃ interfacial layer can provide dramatically enhanced-μ_eff, achieving about 50% μ_eff improvement as compared to the Si universal mobility at medium Q_inv of 5 × 10¹² cm^-2. These results indicate the potential utilization of ZrO₂ dielectric in high-performance Ge nMOSFETs.

An Instrument for the Characterization and Calibration of Optical Sensors

This paper presents the development of a hardware/software system for the characterization of the electronic response of optical (camera) sensors such as matrix and linear color and monochrome Charge Coupled Device (CCD) or Complementary Metal Oxide Semiconductor (CMOS). The electronic response of a sensor is required for inspection purposes. It also allows the design and calibration of the integrating device to achieve the desired performance. The proposed instrument equipment fulfills the most recent European Machine Vision Association (EMVA) 1288 standard ver. 3.1: the spatial non uniformity of the illumination ΔE must be under 3%, and the sensor must achieve an f-number of 8.0 concerning the light source. The following main innovations have achieved this: an Ulbricht sphere providing a uniform light distribution (irradiation) of 99.54%; an innovative illuminator with proper positioning of color Light Emitting Diodes (LEDs) and control electronics; and a flexible C# program to analyze the sensor parameters, namely Quantum Efficiency, Overall System Gain, Temporal Dark Noise, Dark Signal Non Uniformity (DSNU1288), Photo Response Non-Uniformity (PRNU1288), Maximum achievable Signal to Noise Ratio (SNRmax), Absolute sensitivity threshold, Saturation Capacity, Dynamic Range, and Dark Current. This new instrument has allowed a camera manufacturer to design, integrate, and inspect numerous devices and camera models (Necta, Celera, and Aria).

An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection

This review paper presents an assortment of research on a family of photodetectors which use the same base mechanism, current assistance, for the operation. Current assistance is used to create a drift field in the semiconductor, more specifically silicon, in order to improve the bandwidth and the quantum efficiency. Based on the detector and application, the drift field can be static or modulated. Applications include 3D imaging (both direct and indirect time-of-flight), optical receivers and fluorescence lifetime imaging. This work discusses the current-assistance principle, the various photodetectors using this principle and a comparison is made with other state-of-the-art photodetectors used for the same application.

A Low-Power Spiking Neural Network Chip Based on a Compact LIF Neuron and Binary Exponential Charge Injector Synapse Circuits

To realize a large-scale Spiking Neural Network (SNN) on hardware for mobile applications, area and power optimized electronic circuit design is critical. In this work, an area and power optimized hardware implementation of a large-scale SNN for real time IoT applications is presented. The analog Complementary Metal Oxide Semiconductor (CMOS) implementation incorporates neuron and synaptic circuits optimized for area and power consumption. The asynchronous neuronal circuits implemented benefit from higher energy efficiency and higher sensitivity. The proposed synapse circuit based on Binary Exponential Charge Injector (BECI) saves area and power consumption, and provides design scalability for higher resolutions. The SNN model implemented is optimized for 9 × 9 pixel input image and minimum bit-width weights that can satisfy target accuracy, occupies less area and power consumption. Moreover, the spiking neural network is replicated in full digital implementation for area and power comparisons. The SNN chip integrated from neuron and synapse circuits is capable of pattern recognition. The proposed SNN chip is fabricated using 180 nm CMOS process, which occupies a 3.6 mm² chip core area, and achieves a classification accuracy of 94.66% for the MNIST dataset. The proposed SNN chip consumes an average power of 1.06 mW—20 times lower than the digital implementation.

A CMOS Optoelectronic Receiver IC with an On-Chip Avalanche Photodiode for Home-Monitoring LiDAR Sensors

This paper presents an optoelectronic receiver (Rx) IC with an on-chip avalanche photodiode (APD) realized in a 0.18-μm CMOS process for the applications of home-monitoring light detection and ranging (LiDAR) sensors, where the on-chip CMOS P⁺/N-well APD was implemented to avoid the unwanted signal distortion from bondwires and electro-static discharge (ESD) protection diodes. Various circuit techniques are exploited in this work, such as the feedforward transimpedance amplifier for high gain, and a limiting amplifier with negative impedance compensation for wide bandwidth. Measured results demonstrate 93.4-dBΩ transimpedance gain, 790-MHz bandwidth, 12-pA/√Hz noise current spectral density, 6.74-μA_pp minimum detectable signal that corresponds to the maximum detection range of 10 m, and 56.5-mW power dissipation from a 1.8-V supply. This optoelectronic Rx IC provides a potential for a low-cost low-power solution in the applications of home-monitoring LiDAR sensors.

Extraction of acceptor concentration map from EBIC experiments

Controlling two dimensional doping distributions is an important benefit in order to check processed substrates or specific devices. To achieve this purpose, a new methodology is proposed in order to obtain qualitative maps of acceptor concentration from one EBIC image. Analytical models are used to help in defining the best experimental condition and to check the validity of the approach, and a TCAD simulation is performed on a realistic structure and shows promising results. Then, a measurement is carried out on a device and the epitaxy gradient is clearly visible, as well as the presence of Pwell layers.

A Study on the Effect of the Structural Parameters and Internal Mechanism of a Bilateral Gate-Controlled S/D Symmetric and Interchangeable Bidirectional Tunnel Field Effect Transistor

A bilateral gate-controlled S/D symmetric and interchangeable bidirectional tunnel field effect transistor (B-TFET) is proposed in this paper, which shows the advantage of bidirectional switching characteristics and compatibility with CMOS integrated circuits compared to the conventional asymmetrical TFET. The effects of the structural parameters, e.g., the doping concentrations of the N⁺ region and P⁺ region, length of the N⁺ region and length of the intrinsic region, on the device performances, e.g., the transfer characteristics, I_on-I_off ratio and subthreshold swing, and the internal mechanism are discussed and explained in detail.

Design and Characterization of Backside Termination Structures for Thick Fully-Depleted MAPS

Fully Depleted Monolithic Active Pixel Sensors (FD-MAPS) represent an appealing alternative to hybrid detectors for radiation imaging applications. We have recently demonstrated the feasibility of FD-MAPS based on a commercial 110 nm CMOS technology, adapted using high-resistivity substrates and backside post-processing. A p/n junction diode, fabricated on the detector backside using low-temperature processing steps after the completion of the front-side Back End of Line (BEOL), is reverse-biased to achieve the full depletion of the substrate and thus fast charge collection by drift. Test diodes including termination structures with different numbers of floating guard rings and different pitches were fabricated together with other Process Control Monitor structures. In this paper, we present the design of the backside diodes, together with results from the electrical characterization of the test devices, aiming to improve understanding of the strengths and limitations of the proposed approach. Characterization results obtained on several wafers demonstrate the effectiveness of the termination rings in increasing the breakdown voltage of the backside diodes and in coping with the variability of the passivation layer characteristics. A breakdown voltage exceeding 400 V in the worst case was demonstrated in devices with 30 guard rings with 6 μm pitch, thus enabling the full depletion of high-resistivity substrates with a thickness larger than or equal to 300 μm. Additionally, we show the first direct comparison for this technology of measured pixel characteristics with 3D TCAD simulations, proving a good agreement in the extracted operating voltages.

Sensing Optimum in the Raw: Leveraging the Raw-Data Imaging Capabilities of Raspberry Pi for Diagnostics Applications

Single-board computers (SBCs) and microcontroller boards (MCBs) are extensively used nowadays as prototyping platforms to accomplish innovative tasks. Very recently, implementations of these devices for diagnostics applications are rapidly gaining ground for research and educational purposes. Among the available solutions, Raspberry Pi represents one of the most used SBCs. In the present work, two setups based on Raspberry Pi and its CMOS-based camera (a 3D-printed device and an adaptation of a commercial product named We-Lab) were investigated as diagnostic instruments. Different camera elaboration processes were investigated, showing how direct access to the 10-bit raw data acquired from the sensor before downstream imaging processes could be beneficial for photometric applications. The developed solution was successfully applied to the evaluation of the oxidative stress using two commercial kits (d-ROM Fast; PAT). We suggest the analysis of raw data applied to SBC and MCB platforms in order to improve results.

Post-CMOS Compatible Aluminum Scandium Nitride/2D Channel Ferroelectric Field-Effect-Transistor Memory

Recent advances in oxide ferroelectric (FE) materials have rejuvenated the field of low-power, nonvolatile memories and made FE memories a commercial reality. Despite these advances, progress on commercial FE-RAM based on lead zirconium titanate has stalled due to process challenges. The recent discovery of ferroelectricity in scandium-doped aluminum nitride (AlScN) presents new opportunities for direct memory integration with logic transistors due to the low temperature of AlScN deposition (approximately 350 °C), making it compatible with back end of the line integration on silicon logic. Here, we present a FE-FET device composed of an FE-AlScN dielectric layer integrated with a two-dimensional MoS₂ channel. Our devices show an ON/OFF ratio of ∼10⁶, concurrent with a normalized memory window of 0.3 V/nm. The devices also demonstrate stable memory states up to 10⁴ cycles and state retention up to 10⁵ s. Our results suggest that the FE-AlScN/2D combination is ideal for embedded memory and memory-based computing architectures.

GaN-based complementary inverter logic gate using InGaN/GaN superlattice capped enhancement-mode field-effect-transistors

GaN-based high electron mobility transistors (HEMTs) have received much attention due to their potential usage in radio-frequency and high power applications. However, the development of logic gates has remained mostly elusive due to the still challenging reliable operation of the field-effect enhancement-mode n-transistor and nascent stage for the p-transistor. The n-transistor behavior is mainly achieved by combining the aggressive thinning down of the barrier layer, using charged oxides, and p-doping the cap layer. The p-transistor generally requires a heavily doped p-GaN layer. The realization of both transistors on the same substrate remains challenging due to the conflicting requirements for n- and p-transistors. Here, we propose a GaN-based field-effect complementary transistor device using a p-doped InGaN/GaN superlattice (SL) structure on top of the barrier layer of the HEMT heterostructure. The SL structure changes the electrostatics of the heterostructure by the formation of a two-dimensional hole gas region. An undoped SL structure is shown to be enough to lift the conduction band-edge above the Fermi level to convert the n-transistor from depletion-mode (D-mode) to enhancement-mode (E-mode). The lifting of the bands, in turn, creates a natural quantum-well for the holes in the p-transistor. An additional p-doping of the SL moves the threshold voltage of the E-mode n-transistor further into a positive direction and increases the hole density in the quantum-well E-mode p-transistor. The SL structure, which can be grown by a standard epitaxial process, facilitates the realizations of both the n- and p-transistors. The characteristics of individual devices are further analyzed. A digital inverter gate is simulated, and critical static and dynamic performance parameters are reported. The propagation delay indicates that logic operations can be done at a very high speed compared to those offered by other conventional semiconductors.

Human Body-Related Disease Diagnosis Systems Using CMOS Image Sensors: A Systematic Review

According to the Center for Disease Control and Prevention (CDC), the average human life expectancy is 78.8 years. Specifically, 3.2 million deaths are reported yearly due to heart disease, cancer, Alzheimer’s disease, diabetes, and COVID-19. Diagnosing the disease is mandatory in the current way of living to avoid unfortunate deaths and maintain average life expectancy. CMOS image sensor (CIS) became a prominent technology in assisting the monitoring and clinical diagnosis devices to treat diseases in the medical domain. To address the significance of CMOS image ‘sensors’ usage in disease diagnosis systems, this paper focuses on the CIS incorporated disease diagnosis systems related to vital organs of the human body like the heart, lungs, brain, eyes, intestines, bones, skin, blood, and bacteria cells causing diseases. This literature survey’s main objective is to evaluate the ‘systems’ capabilities and highlight the most potent ones with advantages, disadvantages, and accuracy, that are used in disease diagnosis. This systematic review used PRISMA workflow for study selection methodology, and the parameter-based evaluation is performed on disease diagnosis systems related to the human body’s organs. The corresponding CIS models used in systems are mapped organ-wise, and the data collected over the last decade are tabulated.

Near-field sensor array with 65-GHz CMOS oscillators for rapid detection of viable Escherichia coli

In this study, the growth of Escherichia coli was monitored using a complementary metal-oxide-semiconductor (CMOS) near-field sensor array. Each of the 1488 integrated elements, arranged in a 3 mm square, has a resonator that oscillates at 65 GHz. The effective capacitance of the resonator is altered by changes in the dielectric properties of the sensor surface, which shifts the resonance frequency. Growth curves of E. coli at different initial concentrations (OD₆₀₀ = 0.01, 0.03, and 0.05) were monitored. A suspension with initial turbidity of OD₆₀₀ = 0.05 was cultured in a medium, and the sensor successfully distinguished between viable E. coli and heat-treated dead E. coli in 20 min. Moreover, the apparent suppression of growth was observed in the presence of 500 μg/mL streptomycin. As the sensor is composed of arrayed elements, and the area of sensitivity distribution of the element is larger than the size of one bacteria, the variation in the output value of each element may reflect the number and movement of bacteria. This study revealed that the presence of viable E. coli could be rapidly confirmed by using the change in permittivity caused by the displacement of media by E. coli near the sensor surface.