Memory leads the way to better computing

Stabilizing amorphous Sb by adding alien seeds for durable memory materials

We developed a doping strategy to improve the thermal stability of phase-change memory by adding alien tetrahedral seeds.

In-memory direct processing based on nanoscale perpendicular magnetic tunnel junctions

Perpendicular magnetic tunnel junctions (p-MTJs) provide advantages such as infinite endurance, high thermal stability, and fast and low-power switching. They are considered as a promising non-volatile memory device to build non-von Neumann computing paradigms and definitively overcome the power bottleneck. Numerous design proposals have been made for p-MTJ logic, but a few physical realizations have been reported. In this paper, we present the experimental implementation of universal stateful logic gates such as "OR", "AND", and material implication ("IMP") by connecting two nanoscale p-MTJs in parallel. Owing to the voltage dependence of switching probability for the spin transfer torque mechanism, the same structure can be reconfigured to different logic gates with only electrical signals. One single-cycle operation is thus required for all the basic Boolean functions. Such in-memory direct processing has great potential to meet some key requirements such as a high energy/areal efficiency and high speed for future computing hardware.

Configurable multifunctional integrated circuits based on carbon nanotube dual-material gate devices

Nanoelectronic devices with specifically designed structures for performance promotion or function expansion are of great interest, aiming for diversified advanced nanoelectronic systems. In this work, we report a dual-material gate (DMG) carbon nanotube (CNT) device with multiple functions, which can be configured either as a high-performance p-type field-effect transistor (FET) or a diode by changing the input manners of the device. When operating as a FET, the device exhibits a large current on/off ratio of more than 108 and a drain-induced barrier lowering of 97.3 mV V-1. When configured as a diode, the rectification ratio of the device can be greater than 105. We then demonstrate configurable analog and digital integrated circuits that are enabled by utilizing these devices. The configurability enables the realization of transformable functions in a single device or circuits, which gives future electronic systems the flexibility to adapt to the diverse requirements of their applications and/or ever-changing operating environments.

Mimicking biological neurons with a nanoscale ferroelectric transistor

Neuron is the basic computing unit in brain-inspired neural networks. Although a multitude of excellent artificial neurons realized with conventional transistors have been proposed, they might not be energy and area efficient in large-scale networks. The recent discovery of ferroelectricity in hafnium oxide (HfO2) and the related switching phenomena at the nanoscale might provide a solution. This study employs the newly reported accumulative polarization reversal in nanoscale HfO2-based ferroelectric field-effect transistors (FeFETs) to implement two key neuronal dynamics: the integration of action potentials and the subsequent firing according to the biologically plausible all-or-nothing law. We show that by carefully shaping electrical excitations based on the particular nucleation-limited switching kinetics of the ferroelectric layer further neuronal behaviors can be emulated, such as firing activity tuning, arbitrary refractory period and the leaky effect. Finally, we discuss the advantages of an FeFET-based neuron, highlighting its transferability to advanced scaling technologies and the beneficial impact it may have in reducing the complexity of neuromorphic circuits.

Sensory gating in bilayer amorphous carbon memristors

Multi-state amorphous carbon-based memory devices have been developed that exhibit both bipolar and unipolar resistive switching behaviour. These modes of operation were implemented independently to access multiple resistance states, enabling higher memory density than conventional binary non-volatile memory technologies. The switching characteristics have been further utilised to study synaptic computational functions that could be implemented in artificial neural networks. Notably, paired-pulse inhibition (PPI) is observed at bio-realistic timescales (<100 ms). Devices displaying this rich synaptic behaviour could function as robust stand-alone synapse-inspired memory or be applied as filters for specialised neuromorphic circuits and sensors.

A hardware Markov chain algorithm realized in a single device for machine learning

There is a growing need for developing machine learning applications. However, implementation of the machine learning algorithm consumes a huge number of transistors or memory devices on-chip. Developing a machine learning capability in a single device has so far remained elusive. Here, we build a Markov chain algorithm in a single device based on the native oxide of two dimensional multilayer tin selenide. After probing the electrical transport in vertical tin oxide/tin selenide/tin oxide heterostructures, two sudden current jumps are observed during the set and reset processes. Furthermore, five filament states are observed. After classifying five filament states into three states of the Markov chain, the probabilities between each states show convergence values after multiple testing cycles. Based on this device, we demo a fixed-probability random number generator within 5% error rate. This work sheds light on a single device as one hardware core with Markov chain algorithm.

Despite the need to develop resistive random access memory (RRAM) devices for machine learning, RRAM array-based hardware methods for algorithm require external electronics. Here, the authors realize a Markov chain algorithm in a single 2D multilayer SnSe device without external electronics.

Conduction Mechanisms on High Retention Annealed MgO-based Resistive Switching Memory Devices

We report on the conduction mechanisms of novel Ru/MgO/Cu and Ru/MgO/Ta resistive switching memory (RSM) devices. Current-voltage (I-V) measurements revealed Schottky emission (SE) as the dominant conduction mechanism in the high resistance state (HRS), which was validated by varying temperatures and transmission electron microscopy (TEM) results. Retention of more than 10 years at 85 °C was obtained for both Ru/MgO/Ta and Ru/MgO/Cu RSM devices. In addition, annealing processes greatly improved the consistency of HRS and LRS switching paths from cycle to cycle, exhibiting an average ON/OFF ratio of 102. Further TEM studies also highlighted the difference in crystallinity between different materials in Ru/MgO/Cu RSM devices, confirming Cu filament identification which was found to be 10 nm in width.

Logic Computing with Stateful Neural Networks of Resistive Switches

Brain-inspired neural networks can process information with high efficiency, thus providing a powerful tool for pattern recognition and other artificial intelligent tasks. By adopting binary inputs/outputs, neural networks can be used to perform Boolean logic operations, thus potentially surpassing complementary metal-oxide-semiconductor logic in terms of area efficiency, execution time, and computing parallelism. Here, the concept of stateful neural networks consisting of resistive switches, which can perform all logic functions with the same network topology, is introduced. The neural network relies on physical computing according to Ohm's law, Kirchhoff 's law, and the ionic migration within an output switch serving as the highly nonlinear activation function. The input and output are nonvolatile resistance states of the devices, thus enabling stateful and cascadable logic operations. Applied voltages provide the synaptic weights, which enable the convenient reconfiguration of the same circuit to serve various logic functions. The neural network can solve all two-input logic operations with just one step, except for the exclusive-OR (XOR) needing two sequential steps. 1-bit full adder operation is shown to take place with just two steps and five resistive switches, thus highlighting the high efficiencies of space, time, and energy of logic computing with the stateful neural network.

Accumulative Polarization Reversal in Nanoscale Ferroelectric Transistors

The electric-field-driven and reversible polarization switching in ferroelectric materials provides a promising approach for nonvolatile information storage. With the advent of ferroelectricity in hafnium oxide, it has become possible to fabricate ultrathin ferroelectric films suitable for nanoscale electronic devices. Among them, ferroelectric field-effect transistors (FeFETs) emerge as attractive memory elements. While the binary switching between the two logic states, accomplished through a single voltage pulse, is mainly being investigated in FeFETs, additional and unusual switching mechanisms remain largely unexplored. In this work, we report the natural property of ferroelectric hafnium oxide, embedded within a nanoscale FeFET, to accumulate electrical excitation, followed by a sudden and complete switching. The accumulation is attributed to the progressive polarization reversal through localized ferroelectric nucleation. The electrical experiments reveal a strong field and time dependence of the phenomenon. These results not only offer novel insights that could prove critical for memory applications but also might inspire to exploit FeFETs for unconventional computing.

Neuromorphic computing with multi-memristive synapses

Neuromorphic computing has emerged as a promising avenue towards building the next generation of intelligent computing systems. It has been proposed that memristive devices, which exhibit history-dependent conductivity modulation, could efficiently represent the synaptic weights in artificial neural networks. However, precise modulation of the device conductance over a wide dynamic range, necessary to maintain high network accuracy, is proving to be challenging. To address this, we present a multi-memristive synaptic architecture with an efficient global counter-based arbitration scheme. We focus on phase change memory devices, develop a comprehensive model and demonstrate via simulations the effectiveness of the concept for both spiking and non-spiking neural networks. Moreover, we present experimental results involving over a million phase change memory devices for unsupervised learning of temporal correlations using a spiking neural network. The work presents a significant step towards the realization of large-scale and energy-efficient neuromorphic computing systems.

Memristive technology is a promising avenue towards realizing efficient non-von Neumann neuromorphic hardware. Boybat et al. proposes a multi-memristive synaptic architecture with a counter-based global arbitration scheme to address challenges associated with the non-ideal memristive device behavior.

Electric-field-controlled interface dipole modulation for Si-based memory devices

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO2/Si MOS capacitor where the interface monolayer (ML) TiO2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO2/1-ML TiO2/SiO2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS₂/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10⁴ s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS₂ to PbS. The demonstrated MoS₂ heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.

Improving Unipolar Resistive Switching Uniformity with Cone-Shaped Conducting Filaments and Its Logic-In-Memory Application

Resistive random access memory (RRAM) with inherent logic-in-memory capability exhibits great potential to construct beyond von-Neumann computers. Particularly, unipolar RRAM is more promising because its single polarity operation enables large-scale crossbar logic-in-memory circuits with the highest integration density and simpler peripheral control circuits. However, unipolar RRAM usually exhibits poor switching uniformity because of random activation of conducting filaments and consequently cannot meet the strict uniformity requirement for logic-in-memory application. In this contribution, a new methodology that constructs cone-shaped conducting filaments by using chemically a active metal cathode is proposed to improve unipolar switching uniformity. Such a peculiar metal cathode will react spontaneously with the oxide switching layer to form an interfacial layer, which together with the metal cathode itself can act as a load resistor to prevent the overgrowth of conducting filaments and thus make them more cone-like. In this way, the rupture of conducting filaments can be strictly limited to the tip region, making their residual parts favorable locations for subsequent filament growth and thus suppressing their random regeneration. As such, a novel "one switch + one unipolar RRAM cell" hybrid structure is capable to realize all 16 Boolean logic functions for large-scale logic-in-memory circuits.

Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance

Perpendicular magnetic tunnel junctions based on MgO/CoFeB structures are of particular interest for magnetic random-access memories because of their excellent thermal stability, scaling potential, and power dissipation. However, the major challenge of current-induced switching in the nanopillars with both a large tunnel magnetoresistance ratio and a low junction resistance is still to be met. Here, we report spin transfer torque switching in nano-scale perpendicular magnetic tunnel junctions with a magnetoresistance ratio up to 249% and a resistance area product as low as 7.0 Ω µm², which consists of atom-thick W layers and double MgO/CoFeB interfaces. The efficient resonant tunnelling transmission induced by the atom-thick W layers could contribute to the larger magnetoresistance ratio than conventional structures with Ta layers, in addition to the robustness of W layers against high-temperature diffusion during annealing. The critical switching current density could be lower than 3.0 MA cm⁻² for devices with a 45-nm radius.

Perpendicular magnetic tunnel junctions with large tunnel magnetoresistance and low junction resistance are promising for the magnetic random access memories. Here the authors achieve the spin-transfer-torque switching in perpendicular magnetic tunnel junctions with 249% tunnel magnetoresistance and low resistance-area product.

An Artificial Flexible Visual Memory System Based on an UV-Motivated Memristor

For the mimicry of human visual memory, a prominent challenge is how to detect and store the image information by electronic devices, which demands a multifunctional integration to sense light like eyes and to memorize image information like the brain by transforming optical signals to electrical signals that can be recognized by electronic devices. Although current image sensors can perceive simple images in real time, the image information fades away when the external image stimuli are removed. The deficiency between the state-of-the-art image sensors and visual memory system inspires the logical integration of image sensors and memory devices to realize the sensing and memory process toward light information for the bionic design of human visual memory. Hence, a facile architecture is designed to construct artificial flexible visual memory system by employing an UV-motivated memristor. The visual memory arrays can realize the detection and memory process of UV light distribution with a patterned image for a long-term retention and the stored image information can be reset by a negative voltage sweep and reprogrammed to the same or an other image distribution, which proves the effective reusability. These results provide new opportunities for the mimicry of human visual memory and enable the flexible visual memory device to be applied in future wearable electronics, electronic eyes, multifunctional robotics, and auxiliary equipment for visual handicapped.

Memristive effects in oxygenated amorphous carbon nanodevices

Computing with resistive-switching (memristive) memory devices has shown much recent progress and offers an attractive route to circumvent the von-Neumann bottleneck, i.e. the separation of processing and memory, which limits the performance of conventional computer architectures. Due to their good scalability and nanosecond switching speeds, carbon-based resistive-switching memory devices could play an important role in this respect. However, devices based on elemental carbon, such as tetrahedral amorphous carbon or ta-C, typically suffer from a low cycling endurance. A material that has proven to be capable of combining the advantages of elemental carbon-based memories with simple fabrication methods and good endurance performance for binary memory applications is oxygenated amorphous carbon, or a-CO _x . Here, we examine the memristive capabilities of nanoscale a-CO _x devices, in particular their ability to provide the multilevel and accumulation properties that underpin computing type applications. We show the successful operation of nanoscale a-CO _x memory cells for both the storage of multilevel states (here 3-level) and for the provision of an arithmetic accumulator. We implement a base-16, or hexadecimal, accumulator and show how such a device can carry out hexadecimal arithmetic and simultaneously store the computed result in the self-same a-CO _x cell, all using fast (sub-10 ns) and low-energy (sub-pJ) input pulses.

Compliance-Free ZrO2/ZrO2 - x /ZrO2 Resistive Memory with Controllable Interfacial Multistate Switching Behaviour

A controllable transformation from interfacial to filamentary switching mode is presented on a ZrO₂/ZrO_2 - x /ZrO₂ tri-layer resistive memory. The two switching modes are investigated with possible switching and transformation mechanisms proposed. Resistivity modulation of the ZrO_2 - x layer is proposed to be responsible for the switching in the interfacial switching mode through injecting/retracting of oxygen ions. The switching is compliance-free due to the intrinsic series resistor by the filaments formed in the ZrO₂ layers. By tuning the RESET voltages, controllable and stable multistate memory can be achieved which clearly points towards the capability of developing the next-generation multistate high-performance memory.

Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing

Operation speed is a key challenge in phase-change random-access memory (PCRAM) technology, especially for achieving subnanosecond high-speed cache memory. Commercialized PCRAM products are limited by the tens of nanoseconds writing speed, originating from the stochastic crystal nucleation during the crystallization of amorphous germanium antimony telluride (Ge₂Sb₂Te₅). Here, we demonstrate an alloying strategy to speed up the crystallization kinetics. The scandium antimony telluride (Sc_0.2Sb₂Te₃) compound that we designed allows a writing speed of only 700 picoseconds without preprogramming in a large conventional PCRAM device. This ultrafast crystallization stems from the reduced stochasticity of nucleation through geometrically matched and robust scandium telluride (ScTe) chemical bonds that stabilize crystal precursors in the amorphous state. Controlling nucleation through alloy design paves the way for the development of cache-type PCRAM technology to boost the working efficiency of computing systems.

Emergent dynamic chirality in a thermally driven artificial spin ratchet

Modern nanofabrication techniques have opened the possibility to create novel functional materials, whose properties transcend those of their constituent elements. In particular, tuning the magnetostatic interactions in geometrically frustrated arrangements of nanoelements called artificial spin ice can lead to specific collective behaviour, including emergent magnetic monopoles, charge screening and transport, as well as magnonic response. Here, we demonstrate a spin-ice-based active material in which energy is converted into unidirectional dynamics. Using X-ray photoemission electron microscopy we show that the collective rotation of the average magnetization proceeds in a unique sense during thermal relaxation. Our simulations demonstrate that this emergent chiral behaviour is driven by the topology of the magnetostatic field at the edges of the nanomagnet array, resulting in an asymmetric energy landscape. In addition, a bias field can be used to modify the sense of rotation of the average magnetization. This opens the possibility of implementing a magnetic Brownian ratchet, which may find applications in novel nanoscale devices, such as magnetic nanomotors, actuators, sensors or memory cells.

A High-On/Off-Ratio Floating-Gate Memristor Array on a Flexible Substrate via CVD-Grown Large-Area 2D Layer Stacking

Memristors such as phase-change memory and resistive memory have been proposed to emulate the synaptic activities in neuromorphic systems. However, the low reliability of these types of memories is their biggest challenge for commercialization. Here, a highly reliable memristor array using floating-gate memory operated by two terminals (source and drain) using van der Waals layered materials is demonstrated. Centimeter-scale samples (1.5 cm × 1.5 cm) of MoS₂ as a channel and graphene as a trap layer grown by chemical vapor deposition (CVD) are used for array fabrication with Al₂ O₃ as the tunneling barrier. With regard to the memory characteristics, 93% of the devices exhibit an on/off ratio of over 10³ with an average ratio of 10⁴ . The high on/off ratio and reliable endurance in the devices allow stable 6-level memory applications. The devices also exhibit excellent memory durability over 8000 cycles with a negligible shift in the threshold voltage and on-current, which is a significant improvement over other types of memristors. In addition, the devices can be strained up to 1% by fabricating on a flexible substrate. This demonstration opens a practical route for next-generation electronics with CVD-grown van der Waals layered materials.

Temporal correlation detection using computational phase-change memory

Conventional computers based on the von Neumann architecture perform computation by repeatedly transferring data between their physically separated processing and memory units. As computation becomes increasingly data centric and the scalability limits in terms of performance and power are being reached, alternative computing paradigms with collocated computation and storage are actively being sought. A fascinating such approach is that of computational memory where the physics of nanoscale memory devices are used to perform certain computational tasks within the memory unit in a non-von Neumann manner. We present an experimental demonstration using one million phase change memory devices organized to perform a high-level computational primitive by exploiting the crystallization dynamics. Its result is imprinted in the conductance states of the memory devices. The results of using such a computational memory for processing real-world data sets show that this co-existence of computation and storage at the nanometer scale could enable ultra-dense, low-power, and massively-parallel computing systems.

Guiding the Growth of a Conductive Filament by Nanoindentation To Improve Resistive Switching

Redox-based memristor devices, which are considered to have promising nonvolatile memory, mainly operate through the formation/rupture of nanoscale conductive filaments. However, the random growth of conductive filaments is an obstacle for the stability of memory devices and the cell-to-cell uniformity. Here, we investigate the guiding effect of nanoindentation on the growth of conductive filaments in resistive memory devices. The nanoindented top electrodes generate an electric field concentration and the resultant precise control of a conductive filament in two typical memory devices, Ag/SiO₂/Pt and W/Ta₂O₅/Pt. The nanoindented cells possess a much larger ON/OFF ratio, a sharper RESET process, a higher response speed, and better cell-to-cell uniformity compared with the conventional cells. Our finding reflects that the use of large-scale nanotransfer printing might be a unique way to improve the performance of resistive random access memory.

In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

Silicon is an excellent material for microelectronics and integrated photonics1-3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e., "in-chip" microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances.

Flexible three-dimensional artificial synapse networks with correlated learning and trainable memory capability

If a three-dimensional physical electronic system emulating synapse networks could be built, that would be a significant step toward neuromorphic computing. However, the fabrication complexity of complementary metal-oxide-semiconductor architectures impedes the achievement of three-dimensional interconnectivity, high-device density, or flexibility. Here we report flexible three-dimensional artificial chemical synapse networks, in which two-terminal memristive devices, namely, electronic synapses (e-synapses), are connected by vertically stacking crossbar electrodes. The e-synapses resemble the key features of biological synapses: unilateral connection, long-term potentiation/depression, a spike-timing-dependent plasticity learning rule, paired-pulse facilitation, and ultralow-power consumption. The three-dimensional artificial synapse networks enable a direct emulation of correlated learning and trainable memory capability with strong tolerances to input faults and variations, which shows the feasibility of using them in futuristic electronic devices and can provide a physical platform for the realization of smart memories and machine learning and for operation of the complex algorithms involving hierarchical neural networks.High-density information storage calls for the development of modern electronics with multiple stacking architectures that increase the complexity of three-dimensional interconnectivity. Here, Wu et al. build a stacked yet flexible artificial synapse network using layer-by-layer solution processing.

Phase-change devices for simultaneous optical-electrical applications

We present a viable pathway to the design and characterization of phase-change devices operating in a mixed-mode optical-electrical, or optoelectronic, manner. Such devices have potential applications ranging from novel displays to optically-gated switches to reconfigurable metamaterials-based devices. With this in mind, a purpose-built optoelectronics probe station capable of simultaneous optical-electrical excitation and simultaneous optical-electrical response measurement has been designed and constructed. Two prototype phase-change devices that might exploit simultaneous optical and electrical effects and/or require simultaneous optical and electrical characterisation, namely a mixed-mode cross-bar type structure and a microheater-based structure, have been designed, fabricated and characterized. The microheater-based approach was shown to be capable of successful thermally-induced cycling, between amorphous and crystalline states, of large-area phase-change devices, making it attractive for practicable pixel fabrication in phase-change display applications.

Nanomechanical Encoding Method Using Enhanced Thermal Concentration on a Metallic Nanobridge

We present a fast, energy-efficient nano-thermomechanical encoding scheme for digital information storage and retrieval. Digital encoding processes are conducted by the bistable electrothermal actuation of a scalable nanobridge device. The electrothermal energy is highly concentrated by enhanced electron/phonon scattering and heat insulation in a sub-100 nm metallic layer. The efficient conversion of electrothermal energy into mechanical strain allows digital switching and programming processes within 60 ns at 0.75 V with a programming energy of only 54 pJ. Furthermore, this encoding scheme together with the thermally robust design enables data retention at temperatures up to 400 °C. These results suggest that the proposed nano-thermomechanical encoding method could contribute to low-power electronics and robust information storage/retrieval systems.

Surface Energy Driven Cubic-to-Hexagonal Grain Growth of Ge2Sb2Te5 Thin Film

Phase change memory (PCM) is a promising nonvolatile memory to reform current commercial computing system. Inhibiting face-centered cubic (f-) to hexagonal (h-) phase transition of Ge₂Sb₂Te₅ (GST) thin film is essential for realizing high-density, high-speed, and low-power PCM. Although the atomic configurations of f- and h-lattices of GST alloy and the transition mechanisms have been extensively studied, the real transition process should be more complex than previous explanations, e.g. vacancy-ordering model for f-to-h transition. In this study, dynamic crystallization procedure of GST thin film was directly characterized by in situ heating transmission electron microscopy. We reveal that the equilibrium to h-phase is more like an abnormal grain growth process driven by surface energy anisotropy. More specifically, [0001]-oriented h-grains with the lowest surface energy grow much faster by consuming surrounding small grains, no matter what the crystallographic reconfigurations would be on the frontier grain-growth boundaries. We argue the widely accepted vacancy-ordering mechanism may not be indispensable for the large-scale f-to-h grain growth procedure. The real-time observations in this work contribute to a more comprehensive understanding of the crystallization behavior of GST thin film and can be essential for guiding its optimization to achieve high-performance PCM applications.

Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array

Resistive random access memory (RRAM) based reconfigurable logic provides a temporal programmable dimension to realize Boolean logic functions and is regarded as a promising route to build non-von Neumann computing architecture. In this work, a reconfigurable operation method is proposed to perform nonvolatile sequential logic in a HfO₂-based RRAM array. Eight kinds of Boolean logic functions can be implemented within the same hardware fabrics. During the logic computing processes, the RRAM devices in an array are flexibly configured in a bipolar or complementary structure. The validity was demonstrated by experimentally implemented NAND and XOR logic functions and a theoretically designed 1-bit full adder. With the trade-off between temporal and spatial computing complexity, our method makes better use of limited computing resources, thus provides an attractive scheme for the construction of logic-in-memory systems.

Face classification using electronic synapses

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Using chips that mimic the human brain to perform cognitive tasks, namely neuromorphic computing, calls for low power and high efficiency hardware. Here, Yao et al. show on-chip analogue weight storage by integrating non-volatile resistive memory into a CMOS platform and test it in facial recognition.

Direct Probing of the Dielectric Scavenging-Layer Interface in Oxide Filamentary-Based Valence Change Memory

A great improvement in valence change memory performance has been recently achieved by adding another metallic layer to the simple metal-insulator-metal (MIM) structure. This metal layer is often referred to as oxygen exchange layer (OEL) and is introduced between one of the electrodes and the oxide. The OEL is believed to induce a distributed reservoir of defects at the metal-insulator interface thus providing an unlimited availability of building blocks for the conductive filament (CF). However, its role remains elusive and controversial owing to the difficulties to probe the interface between the OEL and the CF. Here, using Scalpel SPM we probe multiple functions of the OEL which have not yet been directly measured, for two popular VCMs material systems: Hf/HfO₂ and Ta/Ta₂O₅. We locate and characterize in three-dimensions the volume containing the oxygen exchange layer and the CF with nanometer lateral resolution. We demonstrate that the OEL induces a thermodynamic barrier for the CF and estimate the minimum thickness of the OEL/oxide interface to guarantee the proper switching operations is ca. 3 nm. Our experimental observations are combined to first-principles thermodynamics and defect kinetics to elucidate the role of the OEL for device optimization.

Initialization-Free Multilevel States Driven by Spin-Orbit Torque Switching

By engineering multidomain formation in Co/Pt multilayers, it is demonstrated how multilevel storage can be achieved by spin-orbit torque switching. It is rather remarkable that, by modulating the writing pulse conditions, the final magnetization states can be controlled, independent of the initial configurations. The initialization-free multilevel memory advances the spin-orbit-torque magnetic random access memory to higher storage density for practical applications.

Realization of Functional Complete Stateful Boolean Logic in Memristive Crossbar

Nonvolatile stateful logic computing in memristors is a promising paradigm with which to realize the unity of information storage and processing in the same physical location that has shown great feasibility for breaking the von Neumann bottleneck in traditional computing architecture. How to reduce the computational complexity of memristor-based logic functions is a matter of concern. Here, based on a general logic expression, we proposed a method to implement the arbitrary logic of complete 16 Boolean logic in two steps with one memristor in the crossbar architecture. A representative functional complete NAND logic is successfully experimentally demonstrated in the filamentary Ag-AgGeTe-Ta memristors to prove the validity of our method. We believe our work may promote the development of the revolutionary logic in memory architectures.

A Dynamically Reconfigurable Ambipolar Black Phosphorus Memory Device

Nonvolatile charge-trap memory plays an important role in many modern electronics technologies, from portable electronic systems to large-scale data centers. Conventional charge-trap memory devices typically work with fixed channel carrier polarity and device characteristics. However, many emerging applications in reconfigurable electronics and neuromorphic computing require dynamically tunable properties in their electronic device components that can lead to enhanced circuit versatility and system functionalities. Here, we demonstrate an ambipolar black phosphorus (BP) charge-trap memory device with dynamically reconfigurable and polarity-reversible memory behavior. This BP memory device shows versatile memory properties subject to electrostatic bias. Not only the programmed/erased state current ratio can be continuously tuned by the back-gate bias, but also the polarity of the carriers in the BP channel can be reversibly switched between electron- and hole-dominated conductions, resulting in the erased and programmed states exhibiting interchangeable high and low current levels. The BP memory also shows four different memory states and, hence, 2-bit per cell data storage for both n-type and p-type channel conductions, demonstrating the multilevel cell storage capability in a layered material based memory device. The BP memory device with a high mobility and tunable programmed/erased state current ratio and highly reconfigurable device characteristics can offer adaptable memory device properties for many emerging applications in electronics technology, such as neuromorphic computing, data-adaptive energy efficient memory, and dynamically reconfigurable digital circuits.

Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio

Concepts of non-volatile memory to replace conventional flash memory have suffered from low material reliability and high off-state current, and the use of a thick, rigid blocking oxide layer in flash memory further restricts vertical scale-up. Here, we report a two-terminal floating gate memory, tunnelling random access memory fabricated by a monolayer MoS2/h-BN/monolayer graphene vertical stack. Our device uses a two-terminal electrode for current flow in the MoS2 channel and simultaneously for charging and discharging the graphene floating gate through the h-BN tunnelling barrier. By effective charge tunnelling through crystalline h-BN layer and storing charges in graphene layer, our memory device demonstrates an ultimately low off-state current of 10(-14) A, leading to ultrahigh on/off ratio over 10(9), about ∼10(3) times higher than other two-terminal memories. Furthermore, the absence of thick, rigid blocking oxides enables high stretchability (>19%) which is useful for soft electronics.

Quantifying redox-induced Schottky barrier variations in memristive devices via in operando spectromicroscopy with graphene electrodes

The continuing revolutionary success of mobile computing and smart devices calls for the development of novel, cost- and energy-efficient memories. Resistive switching is attractive because of, inter alia, increased switching speed and device density. On electrical stimulus, complex nanoscale redox processes are suspected to induce a resistance change in memristive devices. Quantitative information about these processes, which has been experimentally inaccessible so far, is essential for further advances. Here we use in operando spectromicroscopy to verify that redox reactions drive the resistance change. A remarkable agreement between experimental quantification of the redox state and device simulation reveals that changes in donor concentration by a factor of 2–3 at electrode-oxide interfaces cause a modulation of the effective Schottky barrier and lead to >2 orders of magnitude change in device resistance. These findings allow realistic device simulations, opening a route to less empirical and more predictive design of future memory cells.

Resistive switching in metal oxides is related to the migration of donor defects. Here Baeumer et al. use in operando X-ray spectromicroscopy to quantify the doping locally and show that small local variations in the donor concentration result in large variations in the device resistance.

Nanoscopic structural rearrangements of the Cu-filament in conductive-bridge memories

The electrochemical reactions triggering resistive switching in conductive-bridge resistive random access memory (CBRAM) are spatially confined in few tens of nm(3). The formation and dissolution of nanoscopic Cu-filaments rely on the displacement of ions in such confined volume, and it is driven by the electric field induced ion migration and nanoscaled redox reactions. The stochastic nature of these fundamental processes leads to a large variability of the device performance. In this work, a combination of two- and three-dimensional scanning probe microscopy (SPM) techniques are used to study the conductive filament (CF) formation, rupture and its nanoscopic structural rearrangements. The high spatial confinement of our approach enables to locally induce RS in a confined area and image it in 3D. A conical shape of the CF is consistently observed, indicating that the ion migration is the rate limiting step in the filament formation when using high quality dielectrics as switching layers. The sub-10 nm electrical contact size of the AFM tip is used to study the filament's dissolution and detect the hopping conduction of Cu during the CF rupture. We consistently observe a tunnel gap formation associated with the tip-induced filament reset. Finally, aiming to match the fundamental understanding with the integrated device operations, we apply scalpel SPM to failed memory cells and directly observe the appearance of filament multiplicity as a major source of failures and variability in CBRAM.

Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell

Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.

Fast electronic resistance switching involving hidden charge density wave states

The functionality of computer memory elements is currently based on multi-stability, driven either by locally manipulating the density of electrons in transistors or by switching magnetic or ferroelectric order. Another possibility is switching between metallic and insulating phases by the motion of ions, but their speed is limited by slow nucleation and inhomogeneous percolative growth. Here we demonstrate fast resistance switching in a charge density wave system caused by pulsed current injection. As a charge pulse travels through the material, it converts a commensurately ordered polaronic Mott insulating state in 1T-TaS2 to a metastable electronic state with textured domain walls, accompanied with a conversion of polarons to band states, and concurrent rapid switching from an insulator to a metal. The large resistance change, high switching speed (30 ps) and ultralow energy per bit opens the way to new concepts in non-volatile memory devices manipulating all-electronic states.

Skin-Inspired Haptic Memory Arrays with an Electrically Reconfigurable Architecture

Skin-inspired haptic-memory devices, which can retain pressure information after the removel of external pressure by virtue of the nonvolatile nature of the memory devices, are achieved. The rise of haptic-memory devices will allow for mimicry of human sensory memory, opening new avenues for the design of next-generation high-performance sensing devices and systems.

Aharonov-Bohm oscillations in Dirac semimetal Cd3As2 nanowires

Three-dimensional Dirac semimetals, three-dimensional analogues of graphene, are unusual quantum materials with massless Dirac fermions, which can be further converted to Weyl fermions by breaking time reversal or inversion symmetry. Topological surface states with Fermi arcs are predicted on the surface and have been observed by angle-resolved photoemission spectroscopy experiments. Although the exotic transport properties of the bulk Dirac cones have been demonstrated, it is still a challenge to reveal the surface states via transport measurements due to the highly conductive bulk states. Here, we show Aharonov–Bohm oscillations in individual single-crystal Cd₃As₂ nanowires with low carrier concentration and large surface-to-volume ratio, providing transport evidence of the surface state in three-dimensional Dirac semimetals. Moreover, the quantum transport can be modulated by tuning the Fermi level using a gate voltage, enabling a deeper understanding of the rich physics residing in Dirac semimetals.

Dirac semimetals are a three-dimensional analogue of graphene that can support massless Dirac fermions in their bulk and Fermi-arc surface states. Here, the authors observe Aharonov–Bohm oscillations in transport measurements on Cd₃As₂ nanowires, revealing these exotic surface states.

Spatially resolved TiOx phases in switched RRAM devices using soft X-ray spectromicroscopy

Reduction in metal-oxide thin films has been suggested as the key mechanism responsible for forming conductive phases within solid-state memory devices, enabling their resistive switching capacity. The quantitative spatial identification of such conductive regions is a daunting task, particularly for metal-oxides capable of exhibiting multiple phases as in the case of TiO_x. Here, we spatially resolve and chemically characterize distinct TiO_x phases in localized regions of a TiO_x–based memristive device by combining full-field transmission X-ray microscopy with soft X-ray spectroscopic analysis that is performed on lamella samples. We particularly show that electrically pre-switched devices in low-resistive states comprise reduced disordered phases with O/Ti ratios around 1.37 that aggregate in a ~100 nm highly localized region electrically conducting the top and bottom electrodes of the devices. We have also identified crystalline rutile and orthorhombic-like TiO₂ phases in the region adjacent to the main reduced area, suggesting that the temperature increases locally up to 1000 K, validating the role of Joule heating in resistive switching. Contrary to previous studies, our approach enables to simultaneously investigate morphological and chemical changes in a quantitative manner without incurring difficulties imposed by interpretation of electron diffraction patterns acquired via conventional electron microscopy techniques.

Failure Analysis in Magnetic Tunnel Junction Nanopillar with Interfacial Perpendicular Magnetic Anisotropy

Magnetic tunnel junction nanopillar with interfacial perpendicular magnetic anisotropy (PMA-MTJ) becomes a promising candidate to build up spin transfer torque magnetic random access memory (STT-MRAM) for the next generation of non-volatile memory as it features low spin transfer switching current, fast speed, high scalability, and easy integration into conventional complementary metal oxide semiconductor (CMOS) circuits. However, this device suffers from a number of failure issues, such as large process variation and tunneling barrier breakdown. The large process variation is an intrinsic issue for PMA-MTJ as it is based on the interfacial effects between ultra-thin films with few layers of atoms; the tunneling barrier breakdown is due to the requirement of an ultra-thin tunneling barrier (e.g., <1 nm) to reduce the resistance area for the spin transfer torque switching in the nanopillar. These failure issues limit the research and development of STT-MRAM to widely achieve commercial products. In this paper, we give a full analysis of failure mechanisms for PMA-MTJ and present some eventual solutions from device fabrication to system level integration to optimize the failure issues.

An organic terpyridyl-iron polymer based memristor for synaptic plasticity and learning behavior simulation

Conductance of the viologen/terpyridyl-iron polymer bilayer structure has been effectively modulated by an electrochemical redox reaction for synaptic emulation.

Imaging the Three-Dimensional Conductive Channel in Filamentary-Based Oxide Resistive Switching Memory

Filamentary-based oxide resistive memory is considered as a disruptive technology for nonvolatile data storage and reconfigurable logic. Currently accepted models explain the resistive switching in these devices through the presence/absence of a conductive filament (CF) that is described as a reversible nanosized valence-change in an oxide material. During device operation, the CF cycles billion of times at subnanosecond speed, using few tens of microamperes as operating current and thus determines the whole device's performance. Despite its importance, the CF observation is hampered by the small filament size and its minimal compositional difference with the surrounding material. Here we show an experimental solution to this problem and provide the three-dimensional (3D) characterization of the CF in a scaled device. For this purpose we have recently developed a tomography technique which combines the high spatial resolution of scanning probe microscopy with subnanometer precision in material removal, leading to a true 3D-probing metrology concept. We locate and characterize in three-dimensions the nanometric volume of the conductive filament in state-of-the-art bipolar oxide-based devices. Our measurements demonstrate that the switching occurs through the formation of a single conductive filament. The filaments exhibit sizes below 10 nm and present a constriction near the oxygen-inert electrode. Finally, different atomic-size contacts are observed as a function of the programming current, providing evidence for the filament's nature as a defects modulated quantum contact.

Relation between bandgap and resistance drift in amorphous phase change materials

Memory based on phase change materials is currently the most promising candidate for bridging the gap in access time between memory and storage in traditional memory hierarchy. However, multilevel storage is still hindered by the so-called resistance drift commonly related to structural relaxation of the amorphous phase. Here, we present the temporal evolution of infrared spectra measured on amorphous thin films of the three phase change materials Ag₄In₃Sb₆₇Te₂₆, GeTe and the most popular Ge₂Sb₂Te₅. A widening of the bandgap upon annealing accompanied by a decrease of the optical dielectric constant ε_∞ is observed for all three materials. Quantitative comparison with experimental data for the apparent activation energy of conduction reveals that the temporal evolution of bandgap and activation energy can be decoupled. The case of Ag₄In₃Sb₆₇Te₂₆, where the increase of activation energy is significantly smaller than the bandgap widening, demonstrates the possibility to identify new phase change materials with reduced resistance drift.