Negative Transconductance Heterojunction Organic Transistors and their Application to Full-Swing Ternary Circuits

Breaking Fundamental Limitation of Flow-Induced Anisotropic Growth for Large-Scale and Fast Printing of Organic Single-Crystal Films

Advanced organic electronic technologies have put forward a pressing demand for cost-effective and high-throughput fabrication of organic single-crystal films (OSCFs). However, solution-printed OSCFs are typically plagued by the existence of abundant structural defects, which pose a formidable challenge to achieving large-scale and high-performance organic electronics. Here, it is elucidated that these structural defects are mainly originated from printing flow-induced anisotropic growth, an important factor that is overlooked for too long. In light of this, a surfactant-additive printing method is proposed to effectively overcome the anisotropic growth, enabling the deposition of uniform OSCFs over the wafer scale at a high speed of 1.2 mm s-1 at room temperature. The resulting OSCF exhibits appealing performance with a high average mobility up to 10.7 cm2 V-1 s-1, which is one of the highest values for flexible organic field-effect transistor arrays. Moreover, large-scale OSCF-based flexible logic circuits, which can be bent without degradation to a radius as small as 4.0 mm and over 1000 cycles are realized. The work provides profound insights into breaking the limitation of flow-induced anisotropic growth and opens new avenues for printing large-scale organic single-crystal electronics.

A Ternary Inverter Based on Hybrid Conduction Mechanism of Band-to-Band Tunneling and Drift-Diffusion Process

In this paper, a novel transistor based on a hybrid conduction mechanism of band-to-band tunneling and drift-diffusion is proposed and investigated with the aid of TCAD tools. Besides the on and off states, the proposed device presents an additional intermediate state between the on and off states. Based on the tri-state behavior of the proposed TDFET (tunneling and drift-diffusion field-effect transistor), a ternary inverter is designed and its operation principle is studied in detail. It was found that this device achieves ternary logic with only two components, and its structure is simple. In addition, the influence of the supply voltage and the key device parameters are also investigated.

A Mixture of Negative-, Zero-, and Positive-Differential Transconductance Switching from Tellurium/Indium Gallium Zinc Oxide Heterostructures

Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.

Anti-Ambipolar Heterojunctions: Materials, Devices, and Circuits

Anti-ambipolar heterojunctions are vital in constructing high-frequency oscillators, fast switches, and multivalued logic (MVL) devices, which hold promising potential for next-generation integrated circuit chips and telecommunication technologies. Thanks to the strategic material design and device integration, anti-ambipolar heterojunctions have demonstrated unparalleled device and circuit performance that surpasses other semiconducting material systems. This review aims to provide a comprehensive summary of the achievements in the field of anti-ambipolar heterojunctions. First, the fundamental operating mechanisms of anti-ambipolar devices are discussed. After that, potential materials used in anti-ambipolar devices are discussed with particular attention to 2D-based, 1D-based, and organic-based heterojunctions. Next, the primary device applications employing anti-ambipolar heterojunctions, including anti-ambipolar transistors (AATs), photodetectors, frequency doublers, and synaptic devices, are summarized. Furthermore, alongside the advancements in individual devices, the practical integration of these devices at the circuit level, including topics such as MVL circuits, complex logic gates, and spiking neuron circuits, is also discussed. Lastly, the present key challenges and future research directions concerning anti-ambipolar heterojunctions and their applications are also emphasized.

Highly parallel and ultra-low-power probabilistic reasoning with programmable gaussian-like memory transistors

Probabilistic inference in data-driven models is promising for predicting outputs and associated confidence levels, alleviating risks arising from overconfidence. However, implementing complex computations with minimal devices still remains challenging. Here, utilizing a heterojunction of p- and n-type semiconductors coupled with separate floating-gate configuration, a Gaussian-like memory transistor is proposed, where a programmable Gaussian-like current-voltage response is achieved within a single device. A separate floating-gate structure allows for exquisite control of the Gaussian-like current output to a significant extent through simple programming, with an over 10000 s retention performance and mechanical flexibility. This enables physical evaluation of complex distribution functions with the simplified circuit design and higher parallelism. Successful implementation for localization and obstacle avoidance tasks is demonstrated using Gaussian-like curves produced from Gaussian-like memory transistor. With its ultralow-power consumption, simplified design, and programmable Gaussian-like outputs, our 3-terminal Gaussian-like memory transistor holds potential as a hardware platform for probabilistic inference computing.

Overcoming Downscaling Limitations in Organic Semiconductors: Strategies and Progress

Organic semiconductors have great potential to revolutionize electronics by enabling flexible and eco-friendly manufacturing of electronic devices on plastic film substrates. Recent research and development led to the creation of printed displays, radio-frequency identification tags, smart labels, and sensors based on organic electronics. Over the last 3 decades, significant progress has been made in realizing electronic devices with unprecedented features, such as wearable sensors, disposable electronics, and foldable displays, through the exploitation of desirable characteristics in organic electronics. Neverthless, the down-scalability of organic electronic devices remains a crucial consideration. To address this, efforts are extensively explored. It is of utmost importance to further develop these alternative patterning methods to overcome the downscaling challenge. This review comprehensively discusses the efforts and strategies aimed at overcoming the limitations of downscaling in organic semiconductors, with a particular focus on four main areas: 1) lithography-compatible organic semiconductors, 2) fine patterning of printing methods, 3) organic material deposition on pre-fabricated devices, and 4) vertical-channeled organic electronics. By discussing these areas, the full potential of organic semiconductors can be unlocked, and the field of flexible and sustainable electronics can be advanced.

Contributions of Light to Novel Logic Concepts Using Optoelectronic Materials

Instead of the current method of transmitting voltage or current signals in electronic circuit operation, light offers an alternative to conventional logic, allowing for the implementation of new logic concepts through interaction with light. This manuscript examines the use of light in implementing new logic concepts as an alternative to traditional logic circuits and as a future technology. This article provides an overview of how to implement logic operations using light rather than voltage or current signals using optoelectronic materials such as 2D materials, metal-oxides, carbon structures, polymers, small molecules, and perovskites. This review covers the various technologies and applications of using light to dope devices, implement logic gates, control logic circuits, and generate light as an output signal. Recent research on logic and the use of light to implement new functions is summarized. This review also highlights the potential of optoelectronic logic for future technological advancements.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

Reconfigurable Logic-in-Memory Constructed Using an Organic Antiambipolar Transistor

We demonstrate an electrically reconfigurable two-input logic-in-memory (LIM) using a dual-gate-type organic antiambipolar transistor (DG-OAAT). The attractive feature of this device is that a phthalocyanine-cored star-shaped polystyrene is used as a nano-floating gate, which enables the electrical switching of individual logic circuits and stores the circuit information by the nonvolatile memory effect. First, the DG-OAAT exhibited Λ-shaped transfer curves with hysteresis by sweeping the bottom-gate voltage. Programming and erasing operations enabled the reversible shift of the Λ-shaped transfer curves. Furthermore, the top-gate voltage effectively tuned the peak voltages of the transfer curves. Consequently, the combination of dual-gate and memory effects achieved electrically reconfigurable two-input LIM operations. Individual logic circuits (e.g., OR/NAND, XOR/NOR, and AND/XOR) were reconfigured by the corresponding programming and erasing operations without any variations in the input signals. Our device concept has the potential to fulfill an epoch-making organic integration circuit with a simple device configuration.

A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors

A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate. In the H-MTR, a reliable transition between N-shaped transfer curves with distinct NTC and monolithically current-increasing transfer curves without apparent NTC can be accomplished through programming operation. Based on the H-MTR, a binary/ternary reconfigurable logic inverter (R-inverter) has been successfully implemented, which showed an unprecedentedly high static noise margin of 85% for binary logic operation and 59% for ternary logic operation, as well as long-term stability and outstanding cycle endurance. Furthermore, a ternary/binary dynamic logic conversion-in-memory has been demonstrated using a serially-connected R-inverter chain. The ternary/binary dynamic logic conversion-in-memory could generate three different output logic sequences for the same input signal in three logic levels, which is a new logic computing method that has never been presented before.

Reconfigurable signal modulation in a ferroelectric tunnel field-effect transistor

Reconfigurable transistors are an emerging device technology adding new functionalities while lowering the circuit architecture complexity. However, most investigations focus on digital applications. Here, we demonstrate a single vertical nanowire ferroelectric tunnel field-effect transistor (ferro-TFET) that can modulate an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing with significant suppression of undesired harmonics for reconfigurable analogue applications. We realize this by a heterostructure design in which a gate/source overlapped channel enables nearly perfect parabolic transfer characteristics with robust negative transconductance. By using a ferroelectric gate oxide, our ferro-TFET is non-volatilely reconfigurable, enabling various modes of signal modulation. The ferro-TFET shows merits of reconfigurability, reduced footprint, and low supply voltage for signal modulation. This work provides the possibility for monolithic integration of both steep-slope TFETs and reconfigurable ferro-TFETs towards high-density, energy-efficient, and multifunctional digital/analogue hybrid circuits.

Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process

A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated. The stability of the DNTT stack-channel ternary logic switch device is confirmed by implementing a resistive-load ternary logic inverter circuit.

Optically Controllable Organic Logic-in-Memory: An Innovative Approach toward Ternary Data Processing and Storage

Logic-in-memory (LIM) has emerged as an energy-efficient computing technology, as it integrates logic and memory operations in a single device architecture. Herein, a concept of ternary LIM is established. First, a p-type 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) transistor is combined with an n-type PhC₂H₄-benzo[de]isoquinolino[1,8-gh]quinolone diimide (PhC2-BQQDI) transistor to obtain a binary memory inverter, in which a zinc phthalocyanine-cored polystyrene (ZnPc-PS₄) layer serves as a floating gate. The contrasting photoresponse of the transistors toward visible and ultraviolet light and the efficient hole-trapping ability of ZnPc-PS₄ enable us to achieve an optically controllable memory operation with a high memory window of 18 V. Then, a ternary memory inverter is developed using an anti-ambipolar transistor to achieve a three-level data processing and storage system for more advanced LIM applications. Finally, low-voltage operation of the devices is achieved by employing a high-k dielectric layer, which highlights the potential of the developed LIM units for next-generation low-power electronics.

Looking Beyond 0 and 1: Principles and Technology of Multi-Valued Logic Devices

Ever since the invention of solid-state transistors, binary devices have dominated the electronics industry. Although the binary technology links the natural property of devices to be in the ON or OFF state with two logic levels, it provides the least possible information content per interconnect. Multi-valued logic (MVL) has long been considered as a means of improving the computation efficiency and reducing the power consumption of modern chips. In view of the power density limits of the conventional complementary metal-oxide-semiconductor technology, MVL technologies have recently gained even more attention, and various MVL unit devices based on conventional and emerging materials have been proposed. Herein, the recent achievements toward the development of compact MVL unit devices are reviewed. First, basic principles of MVL technologies are introduced by describing methods of obtaining multiple logic states and discussing radix-related aspects of MVL computation. Next, MVL unit devices are classified and overviewed with emphasis on principles of operation, technologies, and applications. Finally, a comparative discussion of strengths and weaknesses is provided for each class of MVL devices, and the review concludes with the outlook for the MVL field.

'Molecular Beam Epitaxy' on Organic Semiconductor Single Crystals: Characterization of Well-Defined Molecular Interfaces by Synchrotron Radiation X-ray Diffraction Techniques

Epitaxial growth, often termed "epitaxy", is one of the most essential techniques underpinning semiconductor electronics, because crystallinities of the materials seriously dominate operation efficiencies of the electronic devices such as power gain/consumption, response speed, heat loss, and so on. In contrast to already well-established epitaxial growth methodologies for inorganic (covalent or ionic) semiconductors, studies on inter-molecular (van der Waals) epitaxy for organic semiconductors is still in the initial stage. In the present review paper, we briefly summarize recent works on the epitaxial inter-molecular junctions built on organic semiconductor single-crystal surfaces, particularly on single crystals of pentacene and rubrene. Experimental methodologies applicable for the determination of crystal structures of such organic single-crystal-based molecular junctions are also illustrated.

Carrier-Transport Mechanism in Organic Antiambipolar Transistors Unveiled by Operando Photoemission Electron Microscopy

Organic antiambipolar transistors (AATs) have partially overlapped p-n junctions. At room temperature, this p-n junction induces a negative differential transconductance in an AAT. However, the detailed carrier-transport mechanism remains unclear. Herein, an operando photoemission electron microscopy is used to tackle this issue owing to the technique's ability to visualize conductive electrons in real time during transistor operation. Notably, it is observed that when the AAT is on, a depletion layer forms at the lateral p-n junction. The visualized depletion layer shows that both p- and n-type channels have pinch-off states in the gate voltage range when the AAT is in on state. The steep potential gradient at the lateral p-n interface enhances the electron conduction from n-type to p-type semiconductor. Another significant finding is that most electrons are considered to recombine with the accumulated holes in the p-type semiconductor, affording the reduction of photoemission intensity by ≈80%. This technique provides a thorough understanding of carrier transport in AATs, further improving the device performance.

Zinc–Tin Oxide Film as an Earth-Abundant Material and Its Versatile Applications to Electronic and Energy Materials

Zinc–Tin Oxide (ZTO) films potentially offer desirable properties for next-generation devices and are considered promising candidates due to the following merits: (I) zinc and tin are abundant on Earth, with estimated reserves of approximately 250 million tons and 4.3 billion tons, respectively, (II) zinc and tin are harmless to the human body, and (III) large-area manufacturing with various synthesis processes is available. Considering the advantages and promises of these ZTO films, this review provides a timely overview of the progress and efforts in developing ZTO-based electronic and energy devices. This review revisits the ZTO films used for various device applications, including thin-film transistors, memory devices, solar cells, and sensors, focusing on their strong and weak points. This paper also discusses the opportunities and challenges for using ZTO films in further practical electronic and energy device applications.

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors

Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter fulfills all the important requirements such as full-swing operation, optimum intermediate logic value (~V_DD/2), high DC gain exceeding 20 V/V as well as low-voltage operation (< 5 V). The organic flash memory exhibits long retention characteristics (current change less than 10% after 10⁴s), leading to the long-term stability of the 3D T-inverter. We believe the 3D T-inverter employing flash memory developed in this study can provide a useful insight to achieve high-performance MVL circuits.

High-density information processing without increasing the circuit complexity is highly desired in electronics. Here, Im et al. demonstrate a low-voltage organic ternary logic circuit vertically integrated with the nonvolatile flash memory, increasing the information density by a factor of 3.

Electrically Reconfigurable Organic Logic Gates: A Promising Perspective on a Dual-Gate Antiambipolar Transistor

Electrically reconfigurable organic logic circuits are promising candidates for realizing new computation architectures, such as artificial intelligence and neuromorphic devices. In this study, multiple logic gate operations are attained based on a dual-gate organic antiambipolar transistor (DG-OAAT). The transistor exhibits a Λ-shaped transfer curve, namely, a negative differential transconductance at room temperature. It is important to note that the peak voltage of the drain current is precisely tuned by three input signals: bottom-gate, top-gate, and drain voltages. This distinctive feature enables multiple logic gate operations with "only a single DG-OAAT," which are not obtainable in conventional transistors. Five logic gate operations, which correspond to AND, OR, NAND, NOR, and XOR, are demonstrated by adjusting the bottom-gate and top-gate voltages. Moreover, varying the drain voltage makes it possible to reversibly switch two logic gates, e.g., NAND/NOR and OR/XOR. In addition, the DG-OAATs show a high degree of stability and reliability. The logic gate operations are observed even months later. The hysteresis in the transfer curves is also negligible. Thus, the device concept is promising for realizing multifunctional logic circuits with a simple transistor configuration. Hence, these findings are expected to surpass the current limitations in complementary metal-oxide-semiconductor devices.

Hybrid Thin-Film Materials Combinations for Complementary Integration Circuit Implementation

Beyond conventional silicon, emerging semiconductor materials have been actively investigated for the development of integrated circuits (ICs). Considerable effort has been put into implementing complementary circuits using non-silicon emerging materials, such as organic semiconductors, carbon nanotubes, metal oxides, transition metal dichalcogenides, and perovskites. Whereas shortcomings of each candidate semiconductor limit the development of complementary ICs, an approach of hybrid materials is considered as a new solution to the complementary integration process. This article revisits recent advances in hybrid-material combination-based complementary circuits. This review summarizes the strong and weak points of the respective candidates, focusing on their complementary circuit integrations. We also discuss the opportunities and challenges presented by the prospect of hybrid integration.

Reconfigurable Multivalue Logic Functions of a Silicon Ellipsoidal Quantum-Dot Transistor Operating at Room Temperature

Reconfigurable multivalue logic functions, which can perform the versatile arithmetic computation of weighted electronic data information, are demonstrated at room temperature on an all-around-gate silicon ellipsoidal quantum-dot transistor. The large single-hole transport energy of the silicon quantum ellipsoid allows the stable M-shaped Coulomb blockade oscillation characteristics at room temperature, and the all-around-gate structure of the fabricated transistor enables us to perform the precise self-control of the energetic Coulomb blockade conditions by changing the applied bias voltage. Such a self-controllability of the M-shaped Coulomb blockade oscillation characteristics provides a great advantage to choose multiple operation points for the reconfigurable multivalue logic functions. Consequently, the weighted data states (e.g., tri-value and quattro-value) are effectively demonstrated by utilizing only the device physics in the all-around-gate silicon ellipsoidal quantum-dot transistor. These findings are of great benefit for the practical application of the silicon quantum device at an elevated temperature for future nanoelectronic information technology.

Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-Performance, Low-Power Flexible Ternary Logic Circuits

Organic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (H-TRs). To achieve high-performance organic ternary logic circuits, the range of NTC in H-TRs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, a simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Each thickness of p-/n-type semiconductor in H-TRs is adjusted to control the channel conductivity. Furthermore, asymmetric source/drain (S/D) electrode structure is newly developed for H-TRs, which can adjust the amount of hole and electron injection, independently. Based on the semiconductor thickness variation and asymmetric S/D electrodes, the T-inverter exhibits full-swing operation with three distinguishable logic states, resulting in unprecedentedly high static noise margin (≈48% of the ideal value). Moreover, a flexible T-inverter with an ultrathin polymer dielectric is demonstrated, whose operating voltage is less than 8 V. The proposed strategy is fully compatible with the conventional integrated circuit design, which is highly desirable for broad applicability and scalability for various types of T-inverter production.

Bias-controlled multi-functional transport properties of InSe/BP van der Waals heterostructures

Van der Waals (vdW) heterostructures, consisting of a variety of low-dimensional materials, have great potential use in the design of a wide range of functional devices thanks to their atomically thin body and strong electrostatic tunability. Here, we demonstrate multi-functional indium selenide (InSe)/black phosphorous (BP) heterostructures encapsulated by hexagonal boron nitride. At a positive drain bias (V_D), applied on the BP while the InSe is grounded, our heterostructures show an intermediate gate voltage (V_BG) regime where the current hardly changes, working as a ternary transistor. By contrast, at a negative V_D, the device shows strong negative differential transconductance characteristics; the peak current increases up to ~5 μA and the peak-to-valley current ratio reaches 1600 at V_D = −2 V. Four-terminal measurements were performed on each layer, allowing us to separate the contributions of contact resistances and channel resistance. Moreover, multiple devices with different device structures and contacts were investigated, providing insight into the operation principle and performance optimization. We systematically investigated the influence of contact resistances, heterojunction resistance, channel resistance, and the thickness of BP on the detailed operational characteristics at different V_D and V_BG regimes.

Recent Advances on Multivalued Logic Gates: A Materials Perspective

The recent advancements in multivalued logic gates represent a rapid paradigm shift in semiconductor technology toward a new era of hyper Moore's law. Particularly, the significant evolution of materials is guiding multivalued logic systems toward a breakthrough gradually, whereby they are transcending the limits of conventional binary logic systems in terms of all the essential figures of merit, i.e., power dissipation, operating speed, circuit complexity, and, of course, the level of the integration. In this review, recent advances in the field of multivalued logic gates based on emerging materials to provide a comprehensive guideline for possible future research directions are reviewed. First, an overview of the design criteria and figures of merit for multivalued logic gates is presented, and then advancements in various emerging nanostructured materials-ranging from 0D quantum dots to multidimensional heterostructures-are summarized and these materials in terms of device design criteria are assessed. The current technological challenges and prospects of multivalued logic devices are also addressed and major research trends are elucidated.

Prediction of a Two-Transistor Vertical QNOT Gate

A new design of quaternary inverter (QNOT gate) is proposed by means of finite-element simulation. Traditionally, increasing the number of data levels in digital logic circuits was achieved by increasing the number of transistors. Our QNOT gate consists of only two transistors, resembling the binary complementary metal-oxide-semiconductor (CMOS) inverter, yet the two additional levels are generated by controlling the charge-injection barrier and electrode overlap. Furthermore, these two transistors are stacked vertically, meaning that the entire footprint only consumes the area of one single transistor. We explore several key geometrical and material parameters in a series of simulations to show how to systematically modulate and optimize the quaternary logic behaviors.

Negative differential transconductance device with a stepped gate dielectric for multi-valued logic circuits

Multi-valued logic (MVL) technology is a promising approach for improving the data-handling capabilities and decreasing the power consumption of integrated circuits. This is especially attractive as conventional complementary metal-oxide-semiconductor technology is approaching its scaling and power density limits. Here, an ambipolar WSe₂ field-effect transistor with two or more negative-differential-transconductance (NDT) regions in its transfer characteristic (NDTFET) is proposed for MVL applications of various radices. The operation and charge carrier transport mechanism of the NDTFET are studied first by Kelvin probe force microscopy, electrical, and capacitance-voltage measurements. Next, strategies for increasing the number of NDT regions and engineering the NDTFET transfer characteristic are discussed. Finally, the extensibility and tunability of our concept are demonstrated by adapting NDTFETs as core devices for ternary, quaternary, and quinary MVL inverters through simulations, where only WSe₂ is employed as a channel material for all devices comprising the inverters. The MVL inverter operation principle and the mechanism of the multiple logic state formation are analyzed in detail. The proposed concept is practically verified by the fabrication of a ternary inverter.

A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory

For increasing the restricted bit-density in the conventional binary logic system, extensive research efforts have been directed toward implementing single devices with a two threshold voltage (VTH) characteristic via the single negative differential resistance (NDR) phenomenon. In particular, recent advances in forming van der Waals (vdW) heterostructures with two-dimensional crystals have opened up new possibilities for realizing such NDR-based tunneling devices. However, it has been challenging to exhibit three VTH through the multiple-NDR (m-NDR) phenomenon in a single device even by using vdW heterostructures. Here, we show the m-NDR device formed on a BP/(ReS2 + HfS2) type-III double-heterostructure. This m-NDR device is then integrated with a vdW transistor to demonstrate a ternary vdW latch circuit capable of storing three logic states. Finally, the ternary latch is extended toward ternary SRAM, and its high-speed write and read operations are theoretically verified.

Spiking neurons from tunable Gaussian heterojunction transistors

Spiking neural networks exploit spatiotemporal processing, spiking sparsity, and high interneuron bandwidth to maximize the energy efficiency of neuromorphic computing. While conventional silicon-based technology can be used in this context, the resulting neuron-synapse circuits require multiple transistors and complicated layouts that limit integration density. Here, we demonstrate unprecedented electrostatic control of dual-gated Gaussian heterojunction transistors for simplified spiking neuron implementation. These devices employ wafer-scale mixed-dimensional van der Waals heterojunctions consisting of chemical vapor deposited monolayer molybdenum disulfide and solution-processed semiconducting single-walled carbon nanotubes to emulate the spike-generating ion channels in biological neurons. Circuits based on these dual-gated Gaussian devices enable a variety of biological spiking responses including phasic spiking, delayed spiking, and tonic bursting. In addition to neuromorphic computing, the tunable Gaussian response has significant implications for a range of other applications including telecommunications, computer vision, and natural language processing.

Designing high performance, scalable, and energy efficient spiking neural networks remains a challenge. Here, the authors utilize mixed-dimensional dual-gated Gaussian heterojunction transistors from single-walled carbon nanotubes and monolayer MoS2 to realize simplified spiking neuron circuits.

Organic-based inverters: basic concepts, materials, novel architectures and applications

The review article covers the materials and techniques employed to fabricate organic-based inverter circuits and highlights their novel architectures, ground-breaking performances and potential applications.