Low-Temperature Side Contact to Carbon Nanotube Transistors: Resistance Distributions Down to 10 nm Contact Length

Establishing Ohmic Contact of a Radial Compressed CNT Bundle with High Work Function Metal

Establishing low-resistance ohmic contact is critical for developing electronic devices based on traditional silicon and new low-dimensional materials. Due to unprecedented electronic and mechanical properties, the one-dimensional carbon nanotubes (CNTs) have been used as source/drain, gate, or tunnel to fabricate transistors. However, the mechanism causing low-resistance ohmic contact is not clear yet. Here, the hybrid atomic force microscopy-scanning electron microscopy (AFM-SEM) instrument was developed to establish lower-resistance ohmic contact between a radial compressed deformed multiwalled CNT bundle and high work function metal (platinum and gold). The radial compression structure under strong van der Waals attraction was in situ characterized through the SEM image to obtain the diameter and width and through AFM to get height and to perform nanoindentation, indicating that Pt has the smaller radial compression deformation. Molecular dynamics simulations exhibit that compared to Pt, a wider ribbon-like graphene layer formed when the radial compressed CNTs contacted with Au. The bond forming and electron orbital overlapping between C atoms of deformed CNTs and the high work function metal atom is beneficial for good electrical contact.

Band-to-Band Tunneling Leakage Current Characterization and Projection in Carbon Nanotube Transistors

Carbon nanotube (CNT) transistors demonstrate high mobility but also experience off-state leakage due to the small effective mass and band gap. The lower limit of off-current (IMIN) was measured in electrostatically doped CNT metal-oxide-semiconductor field-effect transistors (MOSFETs) across a range of band gaps (0.37 to 1.19 eV), supply voltages (0.5 to 0.7 V), and extension doping levels (0.2 to 0.8 carriers/nm). A nonequilibrium Green's function (NEGF) model confirms the dependence of IMIN on CNT band gap, supply voltage, and extension doping level. A leakage current design space across CNT band gap, supply voltage, and extension doping is projected based on the validated NEGF model for long-channel CNT MOSFETs to identify the appropriate device design choices. The optimal extension doping and CNT band gap design choice for a target off-current density are identified by including on-current projection in the leakage current design space. An extension doping level >0.5 carrier/nm is required for optimized on-current.

The Schottky barrier transistor in emerging electronic devices

This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of SB formation, current transport processes, and an overview of modeling are first considered. Three discussions follow, which detail the role of SB transistors in high performance, ubiquitous and cryogenic electronics. For high performance computing, the SB typically needs to be minimized to achieve optimal performance and we explore the methods adopted in carbon nanotube technology and two-dimensional electronics. On the contrary for ubiquitous electronics, the SB can be used advantageously in source-gated transistors and reconfigurable field-effect transistors (FETs) for sensors, neuromorphic hardware and security applications. Similarly, judicious use of an SB can be an asset for applications involving Josephson junction FETs.

Carbon nanotube transistors: Making electronics from molecules

Semiconducting carbon nanotubes are robust molecules with nanometer-scale diameters that can be used in field-effect transistors, from larger thin-film implementation to devices that work in conjunction with silicon electronics, and can potentially be used as a platform for high-performance digital electronics as well as radio-frequency and sensing applications. Recent progress in the materials, devices, and technologies related to carbon nanotube transistors is briefly reviewed. Emphasis is placed on the most broadly impactful advancements that have evolved from single-nanotube devices to implementations with aligned nanotubes and even nanotube thin films. There are obstacles that remain to be addressed, including material synthesis and processing control, device structure design and transport considerations, and further integration demonstrations with improved reproducibility and reliability; however, the integration of more than 10,000 devices in single functional chips has already been realized.

Coulomb Drag between a Carbon Nanotube and Monolayer Graphene

We have measured Coulomb drag between an individual single-walled carbon nanotube (SWNT) as a one-dimensional (1D) conductor and the two-dimensional (2D) conductor monolayer graphene, separated by a few-atom-thick boron nitride layer. The graphene carrier density is tuned across the charge neutrality point (CNP) by a gate, while the SWNT remains degenerate. At high temperatures, the drag resistance changes sign across the CNP, as expected for momentum transfer from drive to drag layer, and exhibits layer exchange Onsager reciprocity. We find that layer reciprocity is broken near the graphene CNP at low temperatures due to nonlinear drag response associated with temperature dependent drag and thermoelectric effects. The drag resistance shows power-law dependences on temperature and carrier density characteristic of 1D Fermi liquid-2D Dirac fluid drag. The 2D drag signal at high temperatures decays with distance from the 1D source slower than expected for a diffusive current distribution, suggesting additional interaction effects in the graphene in the hydrodynamic transport regime.

Synaptic transistors and neuromorphic systems based on carbon nano-materials

Carbon-based materials possessing a nanometer size and unique electrical properties perfectly address the two critical issues of transistors, the low power consumption and scalability, and are considered as a promising material in next-generation synaptic devices. In this review, carbon-based synaptic transistors were systematically summarized. In the carbon nanotube section, the synthesis of carbon nanotubes, purification of carbon nanotubes, the effect of architecture on the device performance and related carbon nanotube-based devices for neuromorphic computing were discussed. In the graphene section, the synthesis of graphene and its derivative, as well as graphene-based devices for neuromorphic computing, was systematically studied. Finally, the current challenges for carbon-based synaptic transistors were discussed.

Critical challenges and advances in the carbon nanotube-metal interface for next-generation electronics

Next-generation electronics can no longer solely rely on conventional materials; miniaturization of portable electronics is pushing Si-based semiconductors and metallic conductors to their operational limits, flexible displays will make common conductive metal oxide materials obsolete, and weight reduction requirement in the aerospace industry demands scientists to seek reliable low-density conductors. Excellent electrical and mechanical properties, coupled with low density, make carbon nanotubes (CNTs) attractive candidates for future electronics. However, translating these remarkable properties into commercial macroscale applications has been disappointing. To fully realize their great potential, CNTs need to be seamlessly incorporated into metallic structures or have to synergistically work alongside them which is still challenging. Here, we review the major challenges in CNT-metal systems that impede their application in electronic devices and highlight significant breakthroughs. A few key applications that can capitalize on CNT-metal structures are also discussed. We specifically focus on the interfacial interaction and materials science aspects of CNT-metal structures.

Transfer-Free Synthesis of Atomically Precise Graphene Nanoribbons on Insulating Substrates

The rational bottom-up synthesis of graphene nanoribbons (GNRs) provides atomically precise control of widths and edges that give rise to a wide range of electronic properties promising for electronic devices such as field-effect transistors (FETs). Since the bottom-up synthesis commonly takes place on catalytic metallic surfaces, the integration of GNRs into such devices requires their transfer onto insulating substrates, which remains one of the bottlenecks in the development of GNR-based electronics. Herein, we report on a method for the transfer-free placement of GNRs on insulators. This involves growing GNRs on a gold film deposited onto an insulating layer followed by gentle wet etching of the gold, which leaves the nanoribbons to settle in place on the underlying insulating substrate. Scanning tunneling microscopy and Raman spectroscopy confirm that atomically precise GNRs of high density uniformly grow on the gold films deposited onto SiO₂/Si substrates and remain structurally intact after the etching process. We have also demonstrated transfer-free fabrication of ultrashort channel GNR FETs using this process. A very important aspect of the present work is that the method can scale up well to 12 in. wafers, which is extremely difficult for previous techniques. Our work here thus represents an important step toward large-scale integration of GNRs into electronic devices.

Chirality-Enriched Carbon Nanotubes for Next-Generation Computing

For the past half century, silicon has served as the primary material platform for integrated circuit technology. However, the recent proliferation of nontraditional electronics, such as wearables, embedded systems, and low-power portable devices, has led to increasingly complex mechanical and electrical performance requirements. Among emerging electronic materials, single-walled carbon nanotubes (SWCNTs) are promising candidates for next-generation computing as a result of their superlative electrical, optical, and mechanical properties. Moreover, their chirality-dependent properties enable a wide range of emerging electronic applications including sub-10 nm complementary field-effect transistors, optoelectronic integrated circuits, and enantiomer-recognition sensors. Here, recent progress in SWCNT-based computing devices is reviewed, with an emphasis on the relationship between chirality enrichment and electronic functionality. In particular, after highlighting chirality-dependent SWCNT properties and chirality enrichment methods, the range of computing applications that have been demonstrated using chirality-enriched SWCNTs are summarized. By identifying remaining challenges and opportunities, this work provides a roadmap for next-generation SWCNT-based computing.

Nanoscale Patterning of Carbon Nanotubes: Techniques, Applications, and Future

Carbon nanotube (CNT) devices and electronics are achieving maturity and directly competing or surpassing devices that use conventional materials. CNTs have demonstrated ballistic conduction, minimal scaling effects, high current capacity, low power requirements, and excellent optical/photonic properties; making them the ideal candidate for a new material to replace conventional materials in next-generation electronic and photonic systems. CNTs also demonstrate high stability and flexibility, allowing them to be used in flexible, printable, and/or biocompatible electronics. However, a major challenge to fully commercialize these devices is the scalable placement of CNTs into desired micro/nanopatterns and architectures to translate the superior properties of CNTs into macroscale devices. Precise and high throughput patterning becomes increasingly difficult at nanoscale resolution, but it is essential to fully realize the benefits of CNTs. The relatively long, high aspect ratio structures of CNTs must be preserved to maintain their functionalities, consequently making them more difficult to pattern than conventional materials like metals and polymers. This review comprehensively explores the recent development of innovative CNT patterning techniques with nanoscale lateral resolution. Each technique is critically analyzed and applications for the nanoscale-resolution approaches are demonstrated. Promising techniques and the challenges ahead for future devices and applications are discussed.