Effect of Extrinsically Introduced Passive Interface Layer on the Performance of Ferroelectric Tunnel Junctions

Nonvolatile Multistates Memories for High-Density Data Storage

In the current information age, the realization of memory devices with energy efficient design, high storage density, nonvolatility, fast access, and low cost is still a great challenge. As a promising technology to meet these stringent requirements, nonvolatile multistates memory (NMSM) has attracted lots of attention over the past years. Owing to the capability to store data in more than a single bit (0 or 1), the storage density is dramatically enhanced without scaling down the memory cell, making memory devices more efficient and less expensive. Multistates in a single cell also provide an unconventional in-memory computing platform beyond the Von Neumann architecture and enable neuromorphic computing with low power consumption. In this review, an in-depth perspective is presented on the recent progress and challenges on the device architectures, material innovation, working mechanisms of various types of NMSMs, including flash, magnetic random-access memory (MRAM), resistive random-access memory (RRAM), ferroelectric random-access memory (FeRAM), and phase-change memory (PCM). The intriguing properties and performance of these NMSMs, which are the key to realizing highly integrated memory hierarchy, are discussed and compared.

Giant Electroresistance in Ferroionic Tunnel Junctions

Oxide-based resistive switching devices, including ferroelectric tunnel junctions and resistance random access memory, are promising candidates for the next-generation non-volatile memory technology. In this work, we propose a ferroionic tunnel junction to realize a giant electroresistance. It functions as a ferroelectric tunnel junction at low resistance state and as a Schottky junction at high resistance state, due to interface engineering through the field-induced migration of oxygen vacancies. An extremely large electroresistance with ON/OFF ratios of 5.1×107 at room temperature and 2.1×109 at 10 K is achieved, using an ultrathin BaTiO3-δ layer as the ferroelectric barrier and a semiconducting Nb-doped SrTiO3 substrate as the bottom electrode. The results point toward an appealing way for the design of high-performance resistive switching devices based on ultrathin oxide heterostructures by ionic controlled interface engineering.

Control of Synaptic Plasticity Learning of Ferroelectric Tunnel Memristor by Nanoscale Interface Engineering

Brain-inspired computing is an emerging field, which intends to extend the capabilities of information technology beyond digital logic. The progress of the field relies on artificial synaptic devices as the building block for brainlike computing systems. Here, we report an electronic synapse based on a ferroelectric tunnel memristor, where its synaptic plasticity learning property can be controlled by nanoscale interface engineering. The effect of the interface engineering on the device performance was studied. Different memristor interfaces lead to an opposite virgin resistance state of the devices. More importantly, nanoscale interface engineering could tune the intrinsic band alignment of the ferroelectric/metal-semiconductor heterostructure over a large range of 1.28 eV, which eventually results in different memristive and spike-timing-dependent plasticity (STDP) properties of the devices. Bidirectional and unidirectional gradual resistance modulation of the devices could therefore be controlled by tuning the band alignment. This study gives useful insights on tuning device functionalities through nanoscale interface engineering. The diverse STDP forms of the memristors with different interfaces may play different specific roles in various spike neural networks.

Electronic-Reconstruction-Enhanced Tunneling Conductance at Terrace Edges of Ultrathin Oxide Films

Quantum mechanical tunneling of electrons across ultrathin insulating oxide barriers has been studied extensively for decades due to its great potential in electronic-device applications. In the few-nanometers-thick epitaxial oxide films, atomic-scale structural imperfections, such as the ubiquitously existed one-unit-cell-high terrace edges, can dramatically affect the tunneling probability and device performance. However, the underlying physics has not been investigated adequately. Here, taking ultrathin BaTiO₃ films as a model system, an intrinsic tunneling-conductance enhancement is reported near the terrace edges. Scanning-probe-microscopy results demonstrate the existence of highly conductive regions (tens of nanometers wide) near the terrace edges. First-principles calculations suggest that the terrace-edge geometry can trigger an electronic reconstruction, which reduces the effective tunneling barrier width locally. Furthermore, such tunneling-conductance enhancement can be discovered in other transition metal oxides and controlled by surface-termination engineering. The controllable electronic reconstruction can facilitate the implementation of oxide electronic devices and discovery of exotic low-dimensional quantum phases.