Intrinsic memory function of carbon nanotube-based ferroelectric field-effect transistor

One-Dimensional MoS2 Nanoscrolls as Miniaturized Memories

Dimensionality of materials is closely related to their physical properties. For two-dimensional (2D) semiconductors such as monolayer molybdenum disulfide (MoS2), converting them from 2D nanosheets to one-dimensional (1D) nanoscrolls could contribute to remarkable electronic and optoelectronic properties, yet the rolling-up process still lacks sufficient controllability, which limits the development of their device applications. Herein we report a modified solvent evaporation-induced rolling process that halts at intermediate states and achieve MoS2 nanoscrolls with high yield and decent axial uniformity. The accordingly fabricated nanoscroll memories exhibit an on/off ratio of ∼104 and a retention time exceeding 103 s and can realize multilevel storage with pulsed gate voltages. Such open-end, high-curvature, and hollow 1D nanostructures provide new possibilities to manipulate the hysteresis windows and, consequently, the charge storage characteristics of nanoscale field-effect transistors, thereby holding great promise for the development of miniaturized memories.

Carbon Nanotube-Based Flexible Ferroelectric Synaptic Transistors for Neuromorphic Computing

Biological nervous systems evolved in nature have marvelous information processing capacities, which have great reference value for modern information technologies. To expand the function of electronic devices with applications in smart health monitoring and treatment, wearable energy-efficient computing, neuroprosthetics, etc., flexible artificial synapses for neuromorphic computing will play a crucial role. Here, carbon nanotube-based ferroelectric synaptic transistors are realized on ultrathin flexible substrates via a low-temperature approach not exceeding 90 °C to grow ferroelectric dielectrics in which the single-pulse, paired-pulse, and repetitive-pulse responses testify to well-mimicked plasticity in artificial synapses. The long-term potentiation and long-term depression processes in the device demonstrate a dynamic range as large as 2000×, and 360 distinguishable conductance states are achieved with a weight increase/decrease nonlinearity of no more than 1 by applying stepped identical pulses. The stability of the device is verified by the almost unchanged performance after the device is kept in ambient conditions without additional passivation for 240 days. An artificial neural network-based simulation is conducted to benchmark the hardware performance of the neuromorphic devices in which a pattern recognition accuracy of 95.24% is achieved.

Emerging Opportunities for 2D Semiconductor/Ferroelectric Transistor-Structure Devices

Semiconductor technology, which is rapidly evolving, is poised to enter a new era for which revolutionary innovations are needed to address fundamental limitations on material and working principle level. 2D semiconductors inherently holding novel properties at the atomic limit show great promise to tackle challenges imposed by traditional bulk semiconductor materials. Synergistic combination of 2D semiconductors with functional ferroelectrics further offers new working principles, and is expected to deliver massively enhanced device performance for existing complementary metal-oxide-semiconductor (CMOS) technologies and add unprecedented applications for next-generation electronics. Herein, recent demonstrations of novel device concepts based on 2D semiconductor/ferroelectric heterostructures are critically reviewed covering their working mechanisms, device construction, applications, and challenges. In particular, emerging opportunities of CMOS-process-compatible 2D semiconductor/ferroelectric transistor structure devices for the development of a rich variety of applications are discussed, including beyond-Boltzmann transistors, nonvolatile memories, neuromorphic devices, and reconfigurable nanodevices such as p-n homojunctions and self-powered photodetectors. It is concluded that 2D semiconductor/ferroelectric heterostructures, as an emergent heterogeneous platform, could drive many more exciting innovations for modern electronics, beyond the capability of ubiquitous silicon systems.

Single-Walled Carbon Nanotube Dominated Micron-Wide Stripe Patterned-Based Ferroelectric Field-Effect Transistors with HfO2 Defect Control Layer

Ferroelectric field-effect transistors (FeFETs) with single-walled carbon nanotube (SWCNT) dominated micron-wide stripe patterned as channel, (Bi,Nd)₄Ti₃O₁₂ films as insulator, and HfO₂ films as defect control layer were developed and fabricated. The prepared SWCNT-FeFETs possess excellent properties such as large channel conductance, high on/off current ratio, high channel carrier mobility, great fatigue endurance performance, and data retention. Despite its thin capacitance equivalent thickness, the gate insulator with HfO₂ defect control layer shows a low leakage current density of 3.1 × 10^-9 A/cm² at a gate voltage of - 3 V.

Electro-optical switching of liquid crystals sandwiched between ion-beam-spurted graphene quantum dots-doped PEDOT:PSS composite layers

Graphene quantum dots (GQDs)-doped

PEDOT

PSS composite layers were utilized to align liquid crystals (LCs) via an ion-beam (IB)-spurting pre-treatment process. LCs were homogeneously aligned between sandwiched GQDs/

PEDOT

PSS composite thin layers, and the alignment of LCs was found to be affected by both the quantity of doped GQDs and IB-spurting intensity. Competitive electro-optical switching properties and non-residual DC performance of the cell equipped with GQDs/

PEDOT

PSS composite alignment layers were obtained because of the enhanced field effect and charge transport induced by doped GQDs. Notably, using IB-spurted GQDs/

PEDOT

PSS layers as alignment layers for next generation high-performance liquid crystal display (LCD) is promising.

Tunable threshold voltage of an n-type Si nanowire ferroelectric-gate field effect transistor for high-performance nonvolatile memory applications

We successfully fabricated ferroelectric-gate field effect transistor (FEFET)-based nonvolatile memory devices using an n-type Si nanowire coated with omega-shaped-gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) via a low-temperature fabrication process. Our FEFET memory devices with controllable threshold voltage via adjustment of the doping concentration exhibit excellent memory characteristics with ultra-low ON state power dissipation (≤3 nW), a large modulation in channel conductance between the ON and OFF states exceeding 10(5), a long retention time of over 3 × 10(4) s and a high endurance of over 10(5) programming cycles whilst maintaining an I ON/I OFF ratio higher than 10(3). This result may be promising for next-generation nonvolatile memory on flexible substrate applications.

Emerging Applications of Liquid Crystals Based on Nanotechnology

Diverse functionalities of liquid crystals (LCs) offer enormous opportunities for their potential use in advanced mobile and smart displays, as well as novel non-display applications. Here, we present snapshots of the research carried out on emerging applications of LCs ranging from electronics to holography and self-powered systems. In addition, we will show our recent results focused on the development of new LC applications, such as programmable transistors, a transparent and active-type two-dimensional optical array and self-powered display systems based on LCs, and will briefly discuss their novel concepts and basic operating principles. Our research will give insights not only into comprehensively understanding technical and scientific applications of LCs, but also developing new discoveries of other LC-based devices.

Flexible graphene-PZT ferroelectric nonvolatile memory

We report the fabrication of a flexible graphene-based nonvolatile memory device using Pb(Zr0.35,Ti0.65)O3 (PZT) as the ferroelectric material. The graphene and PZT ferroelectric layers were deposited using chemical vapor deposition and sol–gel methods, respectively. Such PZT films show a high remnant polarization (Pr) of 30 μC cm−2 and a coercive voltage (Vc) of 3.5 V under a voltage loop over ±11 V. The graphene–PZT ferroelectric nonvolatile memory on a plastic substrate displayed an on/off current ratio of 6.7, a memory window of 6 V and reliable operation. In addition, the device showed one order of magnitude lower operation voltage range than organic-based ferroelectric nonvolatile memory after removing the anti-ferroelectric behavior incorporating an electrolyte solution. The devices showed robust operation in bent states of bending radii up to 9 mm and in cycling tests of 200 times. The devices exhibited remarkable mechanical properties and were readily integrated with plastic substrates for the production of flexible circuits.

Nonvolatile analog memory transistor based on carbon nanotubes and C60 molecules

A nonvolatile analog memory transistor is demonstrated by integrating C60 molecules as charge storage molecules in the transistor gate, and carbon nanotubes (CNTs) in the transistor channel. The currents through the CNT channel can be tuned quantitatively and reversibly to analog values by controlling the number of electrons trapped in the C60 molecules. After tuning, the electrons trapped in the C60 molecules in the gate, and the current through the CNT channel, can be preserved in a nonvolatile manner, indicating the characteristics of the nonvolatile analog memory.

Ferroelectric memory based on nanostructures

In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs.

Carbon nanotube memory by the self-assembly of silicon nanocrystals as charge storage nodes

A memory structure based on self-aligned silicon nanocrystals (Si NCs) grown over Al(2)O(3)-covered parallel-aligned carbon nanotubes (CNTs) by gas source molecular beam epitaxy is reported. Electrostatic force microscopy characterizations directly prove the charging and discharging of discrete NCs through the Al(2)O(3) layer covering the CNTs. A CNT field effect transistor based on the NC/CNT structure is fabricated and characterized, demonstrating evident memory characteristics. Direct tunneling and Fowler-Nordheim tunneling phenomena are observed at different programming/erasing voltages. Retention is demonstrated to be on the order of 10(4) s. Although there is still plenty of room to enhance the performance, the results suggest that CNT-based NC memory with diminutive CNTs and NCs could be an alternative structure to replace traditional floating gate memory.

Ferroelectric gated electrical transport in CdS nanotetrapods

Complex nanostructures such as branched semiconductor nanotetrapods are promising building blocks for next-generation nanoelectronics. Here we report on the electrical transport properties of individual CdS tetrapods in a field effect transistor (FET) configuration with a ferroelectric Ba(0.7)Sr(0.3)TiO(3) film as high-k, switchable gate dielectric. A cryogenic four-probe scanning tunneling microscopy (STM) is used to probe the electrical transport through individual nanotetrapods at different temperatures. A p-type field effect is observed at room temperature, owing to the enhanced gate capacitance coupling. And the reversible remnant polarization of the ferroelectric gate dielectric leads to a well-defined nonvolatile memory effect. The field effect is shown to originate from the channel tuning in the arm/core/arm junctions of nanotetrapods. At low temperature (8.5 K), the nanotetrapod devices exhibit a ferroelectric-modulated single-electron transistor (SET) behavior. The results illustrate how the characteristics of a ferroelectric such as switchable polarization and high dielectric constant can be exploited to control the functionality of individual three-dimensional nanoarchitectures.

A nonvolatile memory device made of a ferroelectric polymer gate nanodot and a single-walled carbon nanotube

We demonstrate a field-effect nonvolatile memory device made of a ferroelectric copolymer gate nanodot and a single-walled carbon nanotube (SW-CNT). A position-controlled dip-pen nanolithography was performed to deposit a poly(vinylidene fluoride-ran-trifluoroethylene) (PVDF-TrFE) nanodot onto the SW-CNT channel with both a source and drain for field-effect transistor (FET) function. PVDF-TrFE was chosen as a gate dielectric nanodot in order to efficiently exploit its bipolar chemical nature. A piezoelectric force microscopy study confirmed the canonical ferroelectric responses of the PVDF-TrFE nanodot fabricated at the center of the SW-CNT channel. The two distinct ferroelectric polarization states with the stable current retention and fatigue-resistant characteristics make the present PVDF-TrFE-based FET suitable for nonvolatile memory applications.

Novel nonvolatile memory with multibit storage based on a ZnO nanowire transistor

We demonstrate a room temperature processed ferroelectric (FE) nonvolatile memory based on a ZnO nanowire (NW) FET where the NW channel is coated with FE nanoparticles. A single device exhibits excellent memory characteristics with the large modulation in channel conductance between ON and OFF states exceeding 10(4), a long retention time of over 4 × 10(4) s, and multibit memory storage ability. Our findings provide a viable way to create new functional high-density nonvolatile memory devices compatible with simple processing techniques at low temperature for flexible devices made on plastic substrates.

Imaging the operation of a carbon nanotube charge sensor at the nanoscale

Carbon nanotube field effect transistors (CNTFETs) are of great interest for nanoelectronics applications such as nonvolatile memory elements (NVMEs) or charge sensors. In this work, we use a scanning-probe approach based on a local charge perturbation of CNTFET-based NVMEs and investigate their fundamental operation from combined transport, electrostatic scanning probe techniques and atomistic simulations. We experimentally demonstrate operating devices with threshold voltages shifts opposite to conventional gating and with almost unchanged hysteresis. The former effect is quantitatively understood as the emission of a delocalized image charge pattern in the nanotube environment, in response to local charge storage, while the latter effect points out the dominant dipolar nature of hysteresis in CNTFETs. We propose a simple model for charge sensing using CNTFETs, based on the redistribution of the nanotube image charges. This model could be extended to gas or biosensing, for example.

Nanoscale memory devices

This article reviews the current status and future prospects for the use of nanomaterials and devices in memory technology. First, the status and continuing scaling trends of the flash memory are discussed. Then, a detailed discussion on technologies trying to replace flash in the near-term is provided. This includes phase change random access memory, Fe random access memory and magnetic random access memory. The long-term nanotechnology prospects for memory devices include carbon-nanotube-based memory, molecular electronics and memristors based on resistive materials such as TiO(2).

Field emission properties of patterned boron nanocones

Large area patterned boron nanocones with low turn-on electric field of 2.8 V microm(-1) and low threshold electric field of 3.8 V microm(-1) were synthesized by a pre-manipulation to pattern the catalyst with a grid template as mask. The good field emission performance of patterned boron nanocones arise from the decreased screening effect and a favorable orientation of the nanocones. These results show that the patterned growth is a highly efficient way to enhance the field emission performance of boron nanocones, which have a great potential of application in flat panel displays and electron emission nanodevices.

Nanotube devices based crossbar architecture: toward neuromorphic computing

Nanoscale devices such as carbon nanotube and nanowires based transistors, memristors and molecular devices are expected to play an important role in the development of new computing architectures. While their size represents a decisive advantage in terms of integration density, it also raises the critical question of how to efficiently address large numbers of densely integrated nanodevices without the need for complex multi-layer interconnection topologies similar to those used in CMOS technology. Two-terminal programmable devices in crossbar geometry seem particularly attractive, but suffer from severe addressing difficulties due to cross-talk, which implies complex programming procedures. Three-terminal devices can be easily addressed individually, but with limited gain in terms of interconnect integration. We show how optically gated carbon nanotube devices enable efficient individual addressing when arranged in a crossbar geometry with shared gate electrodes. This topology is particularly well suited for parallel programming or learning in the context of neuromorphic computing architectures.

Two-terminal nonvolatile memories based on single-walled carbon nanotubes

Reproducible current hysteresis is observed in semiconducting single-walled carbon nanotubes (SWCNTs) measured in a two-terminal configuration without a gate electrode. On the basis of this hysteresis, a two-terminal nonvolatile memory is realized by applying voltage pulses of opposite polarities across the SWCNT. Charge trapping at the SWCNT/SiO(2) interface is proposed to account for the observed phenomena; this explanation is supported by the direct correlation between the switching behaviors and SWCNT carrier types. In particular, a change in dominant carrier type induced by adsorbates in air leads to the direct transition of hysteresis evolution in the same device, providing further evidence for the proposed mechanism.

Two-bit ferroelectric field-effect transistor memories assembled on individual nanotubes

Carbon nanotube (CNT) ferroelectric field-effect transistors (FeFETs) with well-defined memory switch behaviors are promising for nonvolatile, nondestructive read-out (NDRO) memory operation and ultralow power consumption. Here, we report two-bit CNT-FeFET memories by assembling two top gates on individual nanotubes coated with ferroelectric thin films. Each bit of the nanotube transistor memory exhibits a controllable memory switching behavior induced by the reversible remnant polarization of the ferroelectric films, and its NDRO operation is demonstrated. The low driving voltage of 2 V, high carrier mobility over 1000 cm2 V(-1) s(-1), and potential ultrahigh integration density over 200 Gbit inch(-2) of the two-bit FeFET memory are highlighted in this paper.