Contact-engineered reconfigurable two-dimensional Schottky junction field-effect transistor with low leakage currents

Emerging 2D Ferroelectric Devices for In-Sensor and In-Memory Computing

The quantity of sensor nodes within current computing systems is rapidly increasing in tandem with the sensing data. The presence of a bottleneck in data transmission between the sensors, computing, and memory units obstructs the system's efficiency and speed. To minimize the latency of data transmission between units, novel in-memory and in-sensor computing architectures are proposed as alternatives to the conventional von Neumann architecture, aiming for data-intensive sensing and computing applications. The integration of 2D materials and 2D ferroelectric materials has been expected to build these novel sensing and computing architectures due to the dangling-bond-free surface, ultra-fast polarization flipping, and ultra-low power consumption of the 2D ferroelectrics. Here, the recent progress of 2D ferroelectric devices for in-sensing and in-memory neuromorphic computing is reviewed. Experimental and theoretical progresses on 2D ferroelectric devices, including passive ferroelectrics-integrated 2D devices and active ferroelectrics-integrated 2D devices, are reviewed followed by the integration of perception, memory, and computing application. Notably, 2D ferroelectric devices have been used to simulate synaptic weights, neuronal model functions, and neural networks for image processing. As an emerging device configuration, 2D ferroelectric devices have the potential to expand into the sensor-memory and computing integration application field, leading to new possibilities for modern electronics.

Nonvolatile Reconfigurable Logic Device Based on Photoinduced Interfacial Charge Trapping in van der Waals Gap

Due to the increasing complexity in miniaturization of electronic devices, reconfigurable field-effect transistors (RFETs) have emerged as a solution. Although the foundational concepts of RFETs have matured over two decades, ongoing breakthroughs are needed to address challenges such as improving the device performance as well as achieving balanced symmetry between n-type and p-type transport modes with long-term stability. Herein, we present a nonvolatile WSe2-based RFET that utilizes photoassisted interfacial charge trapping at the h-BN and SiO2 interface. Unlike typical RFETs with two gate electrodes, our RFETs achieved polarity control with a single operating gate activated exclusively under white-light exposure. The threshold voltage was tunable, ranging from 27.4 (-31.6 V) to 0.9 (+19.5 V), allowing selective activation of n-type (p-type) operation at VGS = 0 V. Additionally, our WSe2-based RFETs show superior repeatability and long-term stability. Leveraging these advantages, various reconfigurable logic circuits were successfully demonstrated, including complementary inverters and switch circuits as well as pull-up and pull-down circuits, highlighting the potential of WSe2 FETs for future advancements of integrated circuits.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

Drain-Induced Multifunctional Ambipolar Electronics Based on Junctionless MoS2

Applying a drain bias to a strongly gate-coupled semiconductor influences the carrier density of the channel. However, practical applications of this drain-bias-induced effect in the advancement of switching electronics have remained elusive due to the limited capabilities of its current modulation known to date. Here, we show strategies to largely control the current by utilizing drain-bias-induced carrier type switching in an ambipolar molybdenum disulfide (MoS2) field-effect transistor with Pt bottom contacts. Our CMOS-compatible device architecture, incorporating a partially gate-coupled p-n junction, achieves multifunctionality. The ambipolar MoS2 device operates as an ambipolar transistor (on/off ratios exceeding 107 for both NMOS and PMOS), a rectifier (rectification ratio of ∼3 × 106), a reversible negative breakdown diode with an adjustable breakdown voltage (on/off ratio exceeding 109 with a maximum current as high as 10-4 A), and a photodetector. Finally, we demonstrate a complementary inverter (gain of ∼24 at Vdd = 1.5 V), which is highly facile to fabricate without the need for complex heterostructures and doping processes. Our study provides strategies to achieve high-performance ambipolar MoS2 devices and to effectively utilize drain bias for electrical switching.

2D Dual Gate Field-Effect Transistor Enabled Versatile Functions

Advanced computing technologies such as distributed computing and the Internet of Things require highly integrated and multifunctional electronic devices. Beyond the Si technology, 2D-materials-based dual-gate transistors are expected to meet these demands due to the ultra-thin body and the dangling-bond-free surface. In this work, a molybdenum disulfide (MoS2 ) asymmetric-dual-gate field-effect transistor (ADGFET) with an In2 Se3 top gate and a global bottom gate is designed. The independently controlled double gates enable the device to achieve an on/off ratio of 106 with a low subthreshold swing of 94.3 mV dec-1 while presenting a logic function. The coupling effect between the double gates allows the top gate to work as a charge-trapping layer, realizing nonvolatile memory (105 on/off ratio with retention time over 104 s) and six-level memory states. Additionally, ADGFET displays a tunable photodetection with the responsivity reaching the highest value of 857 A W-1 , benefiting from the interface coupling between the double gates. Meanwhile, the photo-memory property of ADGFET is also verified by using the varying exposure dosages-dependent illumination. The multifunctional applications demonstrate that the ADGFET provides an alternative way to integrate logic, memory, and sensing into one device architecture.