Interface studies of well-controlled polymer bilayers and field-effect transistors prepared by a mixed-solvent method

A high-performance organic thin-film transistor with Parylene/PMMA bilayer insulation based on P3HT

This work introduces a pioneering approach in the development of organic thin-film transistors (OTFTs), featuring a double-layer dielectric structure that combines poly(para-xylylene)s (Parylene) and poly(methyl methacrylate) (PMMA) to leverage the high insulation properties and high surface polarity of Parylene with the low insulation properties and low surface polarity of PMMA. This combination results in devices that showcase significantly enhanced electrical performance, including superior charge carrier mobility, increased current on/off ratios, and greater transconductance. Utilizing poly(3-hexylthiophene) (P3HT) for the active layer, the study demonstrates the advantage of the dual dielectric layers in minimizing hysteresis in the transfer curve, thereby facilitating the systematic growth of the organic active layer and enhancing electrical conductivity over single-layer alternatives. The superior performance of the Parylene/PMMA double-layer insulating structure opens new avenues for the advancement of organic electronics, presenting methodologies for performance optimization and expanding the application spectrum of OTFTs.

N-Type Doping of Naphthalenediimide-Based Random Donor-Acceptor Copolymers to Enhance Transistor Performance and Structural Crystallinity

An integrated strategy of molecular design and conjugated polymer doping is proposed to improve the electronic characteristics for organic field effect transistor (OFET) applications. Here, a series of soluble naphthalene diimide (NDI)-based random donor-acceptor copolymers with selenophene π-conjugated linkers and four acceptors with different electron-withdrawing strengths (named as rNDI-N/S/NN/SS) are synthesized, characterized, and used for OFETs. N-type doping of NDI-based random copolymers using (12a,18a)-5,6,12,12a,13,18,18a,19-octahydro-5,6-dimethyl-13,18[1',2']-benzenobisbenzimidazo[1,2-b:2',1'-d]benzo[i][2.5]benzodiazocine potassium triflate adduct (DMBI-BDZC) is successfully demonstrated. The undoped rNDI-N, rNDI-NN, and rNDI-SS samples exhibit ambipolar charge transport, while rNDI-S presents only a unipolar n-type characteristic. Doping with DMBI-BDZC significantly modulates the performance of rNDI-N/S OFETs, with a 3- to 6-fold increase in electron mobility (μ_e) for 1 wt % doped device due to simultaneous trap mitigation, lower contact resistance (R_C), and activation energy (E_A), and enhanced crystallinity and edge-on orientation for charge transport. However, the doping of intrinsic pro-quinoidal rNDI-NN/SS films exhibits unchanged or even reduced device performance. These findings allow us to manipulate the energy levels by developing conjugated copolymers based on various acceptors and quinoids and to optimize the dopant-polymer semiconductor interactions and their impacts on the film morphology and molecular orientation for enhanced charge transport.

Low-Operating-Voltage Two-Dimensional Tin Perovskite Field-Effect Transistors with Multilayer Gate Dielectrics Based on a Fluorinated Copolymer

The fabrication of organic-inorganic perovskite field-effect transistors (FETs) with polymer gate dielectrics is challenging because of the solvent corrosion and wettability issues at interfaces. A few polymers have been integrated into perovskite transistors; however, these devices have high operating voltages due to low dielectric constants. Herein, poly(vinylidenefluoride-co-trifluoroethylene) (PVDF-TrFE) with a high dielectric constant is introduced into bottom-gate phenylethylammonium tin iodide perovskite [(PEA)₂SnI₄] FETs. Polytetrafluoroethylene (PTFE) and cross-linked poly(4-vinylphenol) (PVP) (CL-PVP) are used to address the issues of solvent corrosion and wettability. We design the PVDF-TrFE/PTFE and PVDF-TrFE/PTFE/CL-PVP dielectric layers, where the ferroelectric properties of PVDF-TrFE are reduced by PTFE. The (PEA)₂SnI₄ FETs operate at relatively low gate voltages, exhibiting good overall performance with average hole mobilities of 0.42 and 0.36 cm² V^-1 s^-1. Our findings provide a feasible strategy for constructing low-operating-voltage perovskite FETs with large-dielectric-constant ferroelectric polymers as gate dielectrics by a solution processing technique.

Effects of Charge Traps on Hysteresis in Organic Field-Effect Transistors and Their Charge Trap Cause Analysis through Causal Inference Techniques

Hysteresis in organic field-effect transistors is attributed to the well-known bias stress effects. This is a phenomenon in which the measured drain-source current varies when sweeping the gate voltage from on to off or from off to on. Hysteresis is caused by various factors, and one of the most common is charge trapping. A charge trap is a defect that occurs in an interface state or part of a semiconductor, and it refers to an electronic state that appears distributed in the semiconductor's energy band gap. Extensive research has been conducted recently on obtaining a better understanding of charge traps for hysteresis. However, it is still difficult to accurately measure or characterize them, and their effects on the hysteresis of organic transistors remain largely unknown. In this study, we conduct a literature survey on the hysteresis caused by charge traps from various perspectives. We first analyze the driving principle of organic transistors and introduce various types of hysteresis. Subsequently, we analyze charge traps and determine their influence on hysteresis. In particular, we analyze various estimation models for the traps and the dynamics of the hysteresis generated through these traps. Lastly, we conclude this study by explaining the causal inference approach, which is a machine learning technique typically used for current data analysis, and its implementation for the quantitative analysis of the causal relationship between the hysteresis and the traps.

Utilizing the Diffusion of Fluorinated Polymers to Modify the Semiconductor/Dielectric Interface in Solution-Processed Conjugated Polymer Field-Effect Transistors

It has been demonstrated that tailoring the properties of semiconductor/dielectric interfaces with fluorinated polymers yields better performance for organic field-effect transistors (OFETs). However, it remains a challenge to fabricate bottom-gate OFET devices on fluorinated dielectrics using solution-processed methods due to the poor wettability of fluorinated dielectrics. Here, we utilized the diffusion of fluorinated poly(methyl methacrylate) (PMMA) to construct the fluorine-rich semiconductor/dielectric interface to achieve the fabrication of bottom-gate OFETs with a solution-processed poly(3-hexylthiophene) (P3HT) semiconductor layer. The consequences indicate that the fluorinated dielectrics can effectively decrease the charge traps density at the semiconductor/dielectric interface and promote the edge-on orientation of P3HT on the dielectric surface. Thus, the devices based on fluorinated PMMA modified dielectrics exhibit higher carrier mobility and electrical stability than those of the fluorine-free devices. Our investigation affords a new strategy for the design and interface optimization of devices, which may further advance the performance of OFET devices.

Organic single crystals of cyano-substituted p-phenylene vinylene derivatives as transistors with low surface trap density

We obtained two high-quality lamellar crystals of cayno-substituted p-phenylene vinylene derivatives and fabricated their transistors. The transistors demonstrated hysteresis-free, low subthreshold swing values of 0.15 and 0.10 V dec-1, and high mobilities of 0.56 and 2.73 cm2 V-1 s-1, respectively. More importantly, the low defect density of 1 per 9.22 × 103 and 1.82 × 104 molecules, respectively, confirmed their high crystal quality.

Filamentary Resistive Switching and Capacitance-Voltage Characteristics of the a-IGZO/TiO2 Memory

In this study, molybdenum tungsten/amorphous InGaZnO (a-IGZO)/TiO₂/n-type Si-based resistive random access memory (ReRAM) is manufactured. After deposition of the a-IGZO, annealing was performed at 200, 300, 400, and 500 °C for approximately 1 h in order to analyze the effect of temperature change on the ReRAM after post annealing in a furnace. As a result of measuring the current-voltage curve, the a-IGZO/TiO₂-based ReRAM annealed at 400 °C reached compliance current in a low-resistance state, and showed the most complete hysteresis curve. In the a-IGZO layer annealed at 400 °C, the O₁/O_total value increased most significantly, to approximately 78.2%, and the O₃/O_total value decreased the most, to approximately 2.6%. As a result, the a-IGZO/TiO₂-based ReRAM annealed at 400 °C reduced conductivity and prevented an increase in leakage current caused by oxygen vacancies with sufficient recovery of the metal-oxygen bond. Scanning electron microscopy analysis revealed that the a-IGZO surface showed hillocks at a high post annealing temperature of 500 °C, which greatly increased the surface roughness and caused the surface area performance to deteriorate. Finally, as a result of measuring the capacitance-voltage curve in the a-IGZO/TiO₂-based ReRAM in the range of −2 V to 4 V, the accumulation capacitance value of the ReRAM annealed at 400 °C increased most in a nonvolatile behavior.

Flexible Bottom-Gated Organic Field-Effect Transistors Utilizing Stamped Polymer Layers from the Surface of Water

The facile sequential deposition of functional organic thin films by solution processes is critical for the development of a variety of high-performance organic devices without restriction in terms of materials and processes. Herein, we propose a simple fabrication process that entails stacking multiple layers of functional polymers to fabricate organic field-effect transistors (OFETs). The process involves stamping organic semiconducting layers formed on the surface of water onto a commonly used polymeric dielectric layer. Our scheme makes it possible to independently optimize organic semiconductor films by controlling the solvent evaporation time during the process of film formation on the surface of water. This approach eliminates the need to be concerned about any interference with adjacent layers. Utilizing this process, the fabrication of high-performance bottom-gated OFETs is demonstrated on a glass and a flexible substrate. The OFETs consist of a vertically stacked diketopyrrolopyrrole-based polymer semiconducting layer on the poly(methyl methacrylate) film with a maximum hole mobility of 0.85 cm²/V s.