A mechanism for Frenkel defect creation in amorphous SiO2 facilitated by electron injection

A non-defect precursor gate oxide breakdown model

Understanding defect creation is central to efforts to comprehend gate dielectric breakdown in metal-oxide-semiconductor-field-effect-transistors (MOSFETs). While gate dielectrics other than SiO2 are now popular, models develop for SiO2 breakdown are used for these dielectrics too. Considering that the Si-O bond is very strong, modeling efforts have focused in ways to weaken it so that defect creation (bond-breaking) is commensurate with experimental observations. So far, bond-breaking models rely on defect-precursors to make the energetics manageable. Here it is argued that the success of the percolation model for gate oxide breakdown precludes the role of defect precursors in gate oxide breakdown. It is proposed that defect creation involves "normal" Si-O bonds. This new model relies on the fact that hole transport in SiO2 is in the form of a small polaron - meaning that it creates a transient local distortion as it travels. It is this transient distortion that enables normal Si-O bonds to be weakened (albeit transiently) enough that breaking the bonds at a rate commensurate with measurements becomes possible without the help of the externally applied field.

Atomic scale memristive photon source

Memristive devices are an emerging new type of devices operating at the scale of a few or even single atoms. They are currently used as storage elements and are investigated for performing in-memory and neuromorphic computing. Amongst these devices, Ag/amorphous-SiO_x/Pt memristors are among the most studied systems, with the electrically induced filament growth and dynamics being thoroughly investigated both theoretically and experimentally. In this paper, we report the observation of a novel feature in these devices: The appearance of new photoluminescent centers in SiO_x upon memristive switching, and photon emission correlated with the conductance changes. This observation might pave the way towards an intrinsically memristive atomic scale light source with applications in neural networks, optical interconnects, and quantum communication.

High-kerbium oxide film prepared by sol-gel method for low-voltage thin-film transistor

In this work, high-dielectric-constant (high-k) erbium oxide（Er₂O₃）film is fabricated using the spin coating method, and annealed at a series of temperatures (from 400 °C to 700 °C). The effect of annealing temperature on the microstructural and electrical properties of Er₂O₃nanofilm is investigated. To demonstrate the applicability of the Er₂O₃film, the indium oxide (In₂O₃) thin film transistor (TFT)-based amorphous Er₂O₃dielectric film is fabricated at different temperatures. The TFT-based EO-600 shows a low-operating voltage and good electrical properties. The inverter demonstrates that the Er₂O₃nanofilm synthesized by the sol-gel method could be a promising candidate as the dielectric layer in a low-voltage electronic device.

The mechanism underlying silicon oxide based resistive random-access memory (ReRAM)

In this work, we have inspected the theoretical resistive switching properties of two ReRAM models based on heterojunction structures of Cu/SiO _x nanoparticles (NPs)/Si and Si/SiO _x NPs/Si, in which dielectric layers of the silica nanoparticles present dislocations at bicrystal interfaces. To validate the theoretical model, a charge storage device with the structure Cu/SiO _x /Si was fabricated and its ReRAM properties were studied. Our examinations on the electrical, thermal and structural aspects of resistive switching uncovered the switching behavior relies upon the material properties and electrical characteristics of the switching layers, as well as the metal electrodes and the interfacial structure of grains within the dielectric materials. We also determined that the application of an external electric field at Grain Boundaries (GB) is crucial to resistive switching behavior. Moreover, we have demonstrated that the switching behavior is influenced by variations in the atomic structure and electronic properties, at the atomic length scale and picosecond timescale. Our findings furnish a useful reference for the future development and optimization of materials used in this technology.

Modeling of Diffusion and Incorporation of Interstitial Oxygen Ions at the TiN/SiO2 Interface

Silica-based resistive random access memory devices have become an active research area due to complementary metal-oxide-semiconductor compatibility and recent dramatic increases in their performance and endurance. In spite of both experimental and theoretical insights gained into the electroforming process, many atomistic aspects of the set and reset operation of these devices are still poorly understood. Recently a mechanism of electroforming process based on the formation of neutral oxygen vacancies (V_O⁰) and interstitial O ions (O_i^2-) facilitated by electron injection into the oxide has been proposed. In this work, we extend the description of the bulk (O_i^2-) migration to the interface of amorphous SiO₂ with the polycrystaline TiN electrode, using density functional theory simulations. The results demonstrate a strong kinetic and thermodynamic drive for the movement of O_i^2- to the interface, with dramatically reduced incorporation energies and migration barriers close to the interface. The arrival of O_i^2- at the interface is accompanied by preferential oxidation of undercoordinated Ti sites at the interface, forming a Ti-O layer. We investigate how O ions incorporate into a perfect and defective ∑5(012)[100] grain boundary (GB) in TiN oriented perpendicular to the interface. Our simulations demonstrate the preferential incorporation of O_i at defects within the TiN GB and their fast diffusion along a passivated grain boundary. They explain how, as a result of electroforming, the system undergoes very significant structural changes with the oxide being significantly reduced, interface being oxidized, and part of the oxygen leaving the system.

All Nonmetal Resistive Random Access Memory

Traditional Resistive Random Access Memory (RRAM) is a metal-insulator-metal (MIM) structure, in which metal oxide is usually used as an insulator. The charge transport mechanism of traditional RRAM is attributed to a metallic filament inside the RRAM. In this paper, we demonstrated a novel RRAM device with no metal inside. The N⁺-Si/SiO_x/P⁺-Si combination forms a N⁺IP⁺ diode structure that is different from traditional MIM RRAM. A large high-resistance/low-resistance window of 1.9 × 10⁴ was measured at room temperature. A favorable retention memory window of 1.2 × 10³ was attained for 10⁴ s at 85 °C. The charge transport mechanism of virgin, high- and low-resistance states can be well modeled by the single Shklovskii-Efros percolation mechanism rather than the charge transport in metallic filament. X-ray photoelectron spectroscopy demonstrated that the value of x in SiO_x was 0.62, which provided sufficient oxygen vacancies for set/reset RRAM functions.

Silicon Oxide (SiOx ): A Promising Material for Resistance Switching?

Interest in resistance switching is currently growing apace. The promise of novel high-density, low-power, high-speed nonvolatile memory devices is appealing enough, but beyond that there are exciting future possibilities for applications in hardware acceleration for machine learning and artificial intelligence, and for neuromorphic computing. A very wide range of material systems exhibit resistance switching, a number of which-primarily transition metal oxides-are currently being investigated as complementary metal-oxide-semiconductor (CMOS)-compatible technologies. Here, the case is made for silicon oxide, perhaps the most CMOS-compatible dielectric, yet one that has had comparatively little attention as a resistance-switching material. Herein, a taxonomy of switching mechanisms in silicon oxide is presented, and the current state of the art in modeling, understanding fundamental switching mechanisms, and exciting device applications is summarized. In conclusion, silicon oxide is an excellent choice for resistance-switching technologies, offering a number of compelling advantages over competing material systems.

Intrinsic Resistance Switching in Amorphous Silicon Suboxides: The Role of Columnar Microstructure

We studied intrinsic resistance switching behaviour in sputter-deposited amorphous silicon suboxide (a-SiO_x) films with varying degrees of roughness at the oxide-electrode interface. By combining electrical probing measurements, atomic force microscopy (AFM), and scanning transmission electron microscopy (STEM), we observe that devices with rougher oxide-electrode interfaces exhibit lower electroforming voltages and more reliable switching behaviour. We show that rougher interfaces are consistent with enhanced columnar microstructure in the oxide layer. Our results suggest that columnar microstructure in the oxide will be a key factor to consider for the optimization of future SiOx-based resistance random access memory.