High performance printed oxide field-effect transistors processed using photonic curing

Recent Advances in the Photonic Curing of the Hole Transport Layer, the Electron Transport Layer, and the Perovskite Layers to Improve the Performance of Perovskite Solar Cells

Perovskite solar cells (PSCs) have attracted increasing research interest, but their performance depends on both the choice of materials and the process used. The materials can typically be treated in solution, which makes them well suited for roll-to-roll processing methods, but their deposition under ambient conditions requires overcoming some challenges to improve stability and efficiency. In this review, we highlight the latest advancements in photonic curing (PC) for perovskite materials, as well as for hole transport layer (HTL) and electron transport layer (ETL) materials. We present how PC parameters can be used to control the optical, electrical, morphological, and structural properties of perovskite HTL and ETL layers. Emphasizing the significance of these advancements for perovskite solar cells could further highlight the importance of this research and underline its essential role in creating more efficient and sustainable solar technology.

A versatile chemical vapor synthesis reactor for in situ x-ray scattering and spectroscopy

We describe a versatile reactor system for chemical vapor synthesis of nanoparticles, which enables in situ investigations of high temperature gas phase particle formation and transformation processes by x-ray scattering and x-ray absorption spectroscopy. The system employs an inductively heated hot wall reactor as the energy source to start nanoparticle formation from a mixture of precursor vapor and oxygen. By use of a modular set of susceptor segments, it is especially possible to change solely the residence time of the gas mixture while keeping all other process parameters (temperature, gas flow, pressure) constant. Corresponding time-temperature profiles are supported by computational fluid dynamics simulations. The operation of the system is demonstrated for two example studies: tin oxide nanoparticle formation studied by small angle x-ray scattering and iron oxide nanoparticle formation by x-ray absorption spectroscopy.

Photonic Curing of Solution-Processed Oxide Semiconductors with Efficient Gate Absorbers and Minimal Substrate Heating for High-Performance Thin-Film Transistors

In this study, photonic curing is used to rapidly and effectively convert metal-oxide sol-gels to realize high-quality thin-film transistors (TFTs). Photonic curing offers advantages over conventional thermal processing methods such as ultrashort processing time and compatibility with low-temperature substrates. However, previous work on photonically cured TFTs often results in significant heating of the entire substrate rather than just the thin film at the surface. Here, sol-gel indium zinc oxide (IZO)-based TFTs are photonically cured with efficient gate absorbers requiring as few as five pulses using intense white light delivering radiant energy up to 6 J cm^-2. Simulations indicate that the IZO film reaches a peak temperature of ∼590 °C while the back of the substrate stays below 30 °C. The requirements and design guidelines for photonic curing metal-oxide semiconductors for high-performance TFT applications are discussed, focusing on the importance of effective gate absorbers and optimized pulse designs to efficiently and effectively cure sol-gel films. This process yields TFTs with a field-effect mobility of 21.8 cm² V^-1 s^-1 and an I _on/I _off ratio approaching 10⁸, which exceeds the performance of samples annealed at 500 °C for 1 h. This is the best performance and highest metal-oxide conversion for photonically cured oxide TFTs achieved to date that does not significantly heat the entire thickness of the substrate. Importantly, the conversion from sol-gel precursors to the semiconducting metal-oxide phase during photonic curing is on par with thermal annealing, which is a significant improvement over previous pulsed-light processing work. The use of efficient gate absorbers also allows for the reduction in the number of pulses and efficient sol-gel conversion.

Hybrid low-voltage physical unclonable function based on inkjet-printed metal-oxide transistors

Modern society is striving for digital connectivity that demands information security. As an emerging technology, printed electronics is a key enabler for novel device types with free form factors, customizability, and the potential for large-area fabrication while being seamlessly integrated into our everyday environment. At present, information security is mainly based on software algorithms that use pseudo random numbers. In this regard, hardware-intrinsic security primitives, such as physical unclonable functions, are very promising to provide inherent security features comparable to biometrical data. Device-specific, random intrinsic variations are exploited to generate unique secure identifiers. Here, we introduce a hybrid physical unclonable function, combining silicon and printed electronics technologies, based on metal oxide thin film devices. Our system exploits the inherent randomness of printed materials due to surface roughness, film morphology and the resulting electrical characteristics. The security primitive provides high intrinsic variation, is non-volatile, scalable and exhibits nearly ideal uniqueness.

Simultaneously Defined Semiconducting Channel Layer Using Electrohydrodynamic Jet Printing of a Passivation Layer for Oxide Thin-Film Transistors

A simple fabrication method for homojunction-structured Al-doped indium-tin oxide (ITO) thin-film transistors (TFTs) using an electrohydrodynamic (EHD) jet-printed Al₂O₃ passivation layer with specific line (W_Al2O3) is proposed. After EHD jet printing, the specific region of the ITO film below the Al₂O₃ passivation layer changes from a conducting electrode to a semiconducting channel layer simultaneously upon the formation of the passivation layer during thermal annealing. The channel length of the fabricated TFTs is defined by W_Al2O3, which can be easily changed with varying EHD jet printing conditions, i.e., no need of replacing the mask for varying patterns. Accordingly, the drain current and resistance of the fabricated TFTs can be modified by varying the W_Al2O3. Using the proposed method, a transparent n-type metal-oxide-semiconductor (NMOS) inverter with an enhancement load can be fabricated; the effective resistance of load and drive TFTs is easily tuned by varying the processing conditions using this simple method. The fabricated NMOS inverter exhibits an output voltage gain of 7.13 with a supply voltage of 10 V. Thus, the proposed approach is promising as a low-cost and flexible manufacturing system for multi-item small-lot-sized production of Internet of Things devices.

Rapid Photonic Processing of High-Electron-Mobility PbS Colloidal Quantum Dot Transistors

Recent advances in solution-processable semiconducting colloidal quantum dots (CQDs) have enabled their use in a range of (opto)electronic devices. In most of these studies, device fabrication relied almost exclusively on thermal annealing to remove organic residues and enhance inter-CQD electronic coupling. Despite its widespread use, however, thermal annealing is a lengthy process, while its effectiveness to eliminate organic residues remains limited. Here, we exploit the use of xenon flash lamp sintering to post-treat solution-deposited layers of lead sulfide (PbS) CQDs and their application in n-channel thin-film transistors (TFTs). The process is simple, fast, and highly scalable and allows for efficient removal of organic residues while preserving both quantum confinement and high channel current modulation. Bottom-gate, top-contact PbS CQD TFTs incorporating SiO₂ as the gate dielectric exhibit a maximum electron mobility of 0.2 cm² V^-1 s^-1, a value higher than that of control transistors (≈10^-2 cm² V^-1 s^-1) processed via thermal annealing for 30 min at 120 °C. Replacing SiO₂ with a polymeric dielectric improves the transistor's channel interface, leading to a significant increase in electron mobility to 3.7 cm² V^-1 s^-1. The present work highlights the potential of flash lamp annealing as a promising method for the rapid manufacture of PbS CQD-based (opto)electronic devices and circuits.

Effect of semiconductor surface homogeneity and interface quality on electrical performance of inkjet-printed oxide field-effect transistors

In semiconductor technology, the crystallite size of semiconductors is often directly correlated with their superior intrinsic and device mobility. However, when solution-processed, large crystals may bring in higher surface roughness and layer inhomogeneity, which can deteriorate the interface quality and device performance. Along this line, a thorough study on printed oxide field-effect transistors (FETs) has been performed, where the relative significance of crystallite size, surface roughness and spatial homogeneity are evaluated. The comprehensive investigations suggest the spatial homogeneity to be more important than crystallite size in solution processed/printed devices. It is demonstrated that the addition of a small amount of high boiling point polyol in the precursor ink can create large nucleation sites, resulting in reduced average crystallite size, superior inter-particle neck formation, and high spatial homogeneity. Interestingly, carefully estimated device mobility of these polyol-derived In₂O₃ FETs (∼50-55 cm² V^-1 s^-1) is found to be larger than the FETs prepared without polyols, although the crystallite size of the former is an order of magnitude smaller. The high spatial homogeneity and the large mobility values of the polyol-derived In₂O₃ transistors, as compared to the amorphous oxide FETs, lowers the importance of the latter, at least within the solution-processed/printed electronics domain.

Solution-processed metal-oxide thin-film transistors: a review of recent developments

Driven by the rapid development of novel active-matrix displays, thin-film transistors (TFTs) based on metal-oxide (MO) semiconductors have drawn great attention during recent years. N-type MO TFTs manufactured through vacuum-based processes have the advantages of higher mobility compared to the amorphous silicon TFTs, better uniformity and lower processing temperature compared to the polysilicon TFTs, and visible light transparency which is suitable for transparent electronic devices, etc. However, the fabrication cost is high owing to the expensive and complicated vacuum-based systems. In contrast, solution process has the advantages of low cost, high throughput, and easy chemical composition control. In the first part of this review, a brief introduction of solution-processed MO TFTs is given, and the main issues and challenges encountered in this field are discussed. The recent advances in channel layer engineering to obtain the state-of-the-art solution-processed MO TFTs are reviewed and summarized. Afterward, a detailed discussion of the direct patterning methods is presented, including the direct photopatterning and printing techniques. Next, the effect of gate dielectric materials and their interfaces on the performance of the resulting TFTs are surveyed. The last topic is the various applications of solution-processed MO TFTs, from novel displays to sensing, memory devices, etc. Finally, conclusions are drawn and future expectations for solution-processed MO TFTs and their applications are described.

Progress Report on "From Printed Electrolyte-Gated Metal-Oxide Devices to Circuits"

Printed electrolyte-gated oxide electronics is an emerging electronic technology in the low voltage regime (≤1 V). Whereas in the past mainly dielectrics have been used for gating the transistors, many recent approaches employ the advantages of solution processable, solid polymer electrolytes, or ion gels that provide high gate capacitances produced by a Helmholtz double layer, allowing for low-voltage operation. Herein, with special focus on work performed at KIT recent advances in building electronic circuits based on indium oxide, n-type electrolyte-gated field-effect transistors (EGFETs) are reviewed. When integrated into ring oscillator circuits a digital performance ranging from 250 Hz at 1 V up to 1 kHz is achieved. Sequential circuits such as memory cells are also demonstrated. More complex circuits are feasible but remain challenging also because of the high variability of the printed devices. However, the device inherent variability can be even exploited in security circuits such as physically unclonable functions (PUFs), which output a reliable and unique, device specific, digital response signal. As an overall advantage of the technology all the presented circuits can operate at very low supply voltages (0.6 V), which is crucial for low-power printed electronics applications.