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Jeon K, Ryu JJ, Im S, Seo HK, Eom T, Ju H, Yang MK, Jeong DS, Kim GH. Purely self-rectifying memristor-based passive crossbar array for artificial neural network accelerators. Nat Commun 2024; 15:129. [PMID: 38167379 PMCID: PMC10761713 DOI: 10.1038/s41467-023-44620-1] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 09/05/2023] [Accepted: 12/21/2023] [Indexed: 01/05/2024] Open
Abstract
Memristor-integrated passive crossbar arrays (CAs) could potentially accelerate neural network (NN) computations, but studies on these devices are limited to software-based simulations owing to their poor reliability. Herein, we propose a self-rectifying memristor-based 1 kb CA as a hardware accelerator for NN computations. We conducted fully hardware-based single-layer NN classification tasks involving the Modified National Institute of Standards and Technology database using the developed passive CA, and achieved 100% classification accuracy for 1500 test sets. We also investigated the influences of the defect-tolerance capability of the CA, impact of the conductance range of the integrated memristors, and presence or absence of selection functionality in the integrated memristors on the image classification tasks. We offer valuable insights into the behavior and performance of CA devices under various conditions and provide evidence of the practicality of memristor-integrated passive CAs as hardware accelerators for NN applications.
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Affiliation(s)
- Kanghyeok Jeon
- Division of Materials Science and Engineering, Hanyang University, Seoul, 04763, Republic of Korea
- Division of Advanced Materials, Korea Research Institute of Chemical Technology (KRICT), Daejeon, 34114, Republic of Korea
| | - Jin Joo Ryu
- Division of Advanced Materials, Korea Research Institute of Chemical Technology (KRICT), Daejeon, 34114, Republic of Korea
- Department of Materials Science and Engineering, Yonsei University, Seoul, 03722, Republic of Korea
| | - Seongil Im
- Center for Opto-Electronic Materials and Devices, Korea Institute of Science and Technology (KIST), Seoul, 02792, Republic of Korea
| | - Hyun Kyu Seo
- Intelligent Electronic Device Lab, Sahmyook University, 815 Hwarang-ro, Nowon-Gu, Seoul, 01795, Republic of Korea
| | - Taeyong Eom
- Division of Advanced Materials, Korea Research Institute of Chemical Technology (KRICT), Daejeon, 34114, Republic of Korea
| | - Hyunsu Ju
- Center for Opto-Electronic Materials and Devices, Korea Institute of Science and Technology (KIST), Seoul, 02792, Republic of Korea.
| | - Min Kyu Yang
- Intelligent Electronic Device Lab, Sahmyook University, 815 Hwarang-ro, Nowon-Gu, Seoul, 01795, Republic of Korea.
| | - Doo Seok Jeong
- Division of Materials Science and Engineering, Hanyang University, Seoul, 04763, Republic of Korea.
| | - Gun Hwan Kim
- Department of Materials Science and Engineering, Yonsei University, Seoul, 03722, Republic of Korea.
- Department of System Semiconductor Engineering, Yonsei University, Seoul, 03722, Republic of Korea.
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Lee Y, Jang J, Jeon B, Lee K, Chung D, Kim S. Resistive Switching Characteristics of Alloyed AlSiO x Insulator for Neuromorphic Devices. MATERIALS (BASEL, SWITZERLAND) 2022; 15:7520. [PMID: 36363111 PMCID: PMC9656227 DOI: 10.3390/ma15217520] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 08/30/2022] [Revised: 10/14/2022] [Accepted: 10/24/2022] [Indexed: 06/16/2023]
Abstract
Charge-based memories, such as NAND flash and dynamic random-access memory (DRAM), have reached scaling limits and various next-generation memories are being studied to overcome their issues. Resistive random-access memory (RRAM) has advantages in structural scalability and long retention characteristics, and thus has been studied as a next-generation memory application and neuromorphic system area. In this paper, AlSiOx, which was used as an alloyed insulator, was used to secure stable switching. We demonstrate synaptic characteristics, as well as the basic resistive switching characteristics with multi-level cells (MLC) by applying the DC sweep and pulses. Conduction mechanism analysis for resistive switching characteristics was conducted to understand the resistive switching properties of the device. MLC, retention, and endurance are evaluated and potentiation/depression curves are mimicked for a neuromorphic device.
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Affiliation(s)
- Yunseok Lee
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
| | - Jiung Jang
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
| | - Beomki Jeon
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
| | - Kisong Lee
- Department of Information and Communication Engineering, Dongguk University, Seoul 04620, Korea
| | - Daewon Chung
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
| | - Sungjun Kim
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
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Lee Y, Park J, Chung D, Lee K, Kim S. Multi-level Cells and Quantized Conductance Characteristics of Al 2O 3-Based RRAM Device for Neuromorphic System. NANOSCALE RESEARCH LETTERS 2022; 17:84. [PMID: 36057011 PMCID: PMC9440974 DOI: 10.1186/s11671-022-03722-3] [Citation(s) in RCA: 9] [Impact Index Per Article: 4.5] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 06/26/2022] [Accepted: 08/24/2022] [Indexed: 06/15/2023]
Abstract
Recently, various resistance-based memory devices are being studied to replace charge-based memory devices to satisfy high-performance memory requirements. Resistance random access memory (RRAM) shows superior performances such as fast switching speed, structural scalability, and long retention. This work presented the different filament control by the DC voltages and verified its characteristics as a synaptic device by pulse measurement. Firstly, two current-voltage (I-V) curves are characterized by controlling a range of DC voltages. The retention and endurance for each different I-V curve were measured to prove the reliability of the RRAM device. The detailed voltage manipulation confirmed the characteristics of multi-level cell (MLC) and conductance quantization. Lastly, synaptic functions such as potentiation and depression, paired-pulse depression, excitatory post-synaptic current, and spike-timing-dependent plasticity were verified. Collectively, we concluded that Pt/Al2O3/TaN is appropriate for the neuromorphic device.
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Affiliation(s)
- Yunseok Lee
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul, 04620, Republic of Korea
| | - Jongmin Park
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul, 04620, Republic of Korea
| | - Daewon Chung
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul, 04620, Republic of Korea
| | - Kisong Lee
- Department of Information and Communication Engineering, Dongguk University, Seoul, 04620, Republic of Korea
| | - Sungjun Kim
- Division of Electronics and Electrical Engineering, Dongguk University, Seoul, 04620, Republic of Korea.
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Chee MY, Dananjaya PA, Lim GJ, Du Y, Lew WS. Frequency-Dependent Synapse Weight Tuning in 1S1R with a Short-Term Plasticity TiO x-Based Exponential Selector. ACS APPLIED MATERIALS & INTERFACES 2022; 14:35959-35968. [PMID: 35892238 DOI: 10.1021/acsami.2c11016] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/15/2023]
Abstract
Short-term plasticity (STP) is an important synaptic characteristic in the hardware implementation of artificial neural networks (ANN), as it enables the temporal information processing (TIP) capability. However, the STP feature is rather challenging to reproduce from a single nonvolatile resistive random-access memory (RRAM) element, as it requires a certain degree of volatility. In this work, a Pt/TiOx/Pt exponential selector is introduced not only to suppress the sneak current but also to enable the TIP feature in a one selector-one RRAM (1S1R) synaptic device. Our measurements reveal that the exponential selector exhibits the STP characteristic, while a Pt/HfOx/Ti RRAM enables the long-term memory capability of the synapse. Thereafter, we experimentally demonstrated pulse frequency-dependent multilevel switching in the 1S1R device, exhibiting the TIP capability of the developed 1S1R synapse. The observed STP of the selector is strongly influenced by the bottom metal-oxide interface, in which Ar plasma treatment on the bottom Pt electrode resulted in the annihilation of the STP feature in the selector. A mechanism is thus proposed to explain the observed STP, using the local electric field enhancement induced at the metal-oxide interface coupled with the drift-diffusion model of mobile O2- and Ti3+ ions. This work therefore provides a reliable means of producing the STP feature in a 1S1R device, which demonstrates the TIP capability sought after in hardware-based ANN.
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Affiliation(s)
- Mun Yin Chee
- School of Physical and Mathematical Sciences, Nanyang Technological University, 21 Nanyang Link, Singapore 637371, Singapore
| | - Putu Andhita Dananjaya
- School of Physical and Mathematical Sciences, Nanyang Technological University, 21 Nanyang Link, Singapore 637371, Singapore
| | - Gerard Joseph Lim
- School of Physical and Mathematical Sciences, Nanyang Technological University, 21 Nanyang Link, Singapore 637371, Singapore
| | - Yuanmin Du
- School of Physical and Mathematical Sciences, Nanyang Technological University, 21 Nanyang Link, Singapore 637371, Singapore
| | - Wen Siang Lew
- School of Physical and Mathematical Sciences, Nanyang Technological University, 21 Nanyang Link, Singapore 637371, Singapore
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Lanza M, Waser R, Ielmini D, Yang JJ, Goux L, Suñe J, Kenyon AJ, Mehonic A, Spiga S, Rana V, Wiefels S, Menzel S, Valov I, Villena MA, Miranda E, Jing X, Campabadal F, Gonzalez MB, Aguirre F, Palumbo F, Zhu K, Roldan JB, Puglisi FM, Larcher L, Hou TH, Prodromakis T, Yang Y, Huang P, Wan T, Chai Y, Pey KL, Raghavan N, Dueñas S, Wang T, Xia Q, Pazos S. Standards for the Characterization of Endurance in Resistive Switching Devices. ACS NANO 2021; 15:17214-17231. [PMID: 34730935 DOI: 10.1021/acsnano.1c06980] [Citation(s) in RCA: 35] [Impact Index Per Article: 11.7] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 05/25/2023]
Abstract
Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.
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Affiliation(s)
- Mario Lanza
- Physical Science and Engineering Division, King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia
| | - Rainer Waser
- Peter-Grünberg-Institut (PGI-7), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
- Peter-Grünberg-Institut (PGI-10), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
- Institut für Werkstoffe der Elektrotechnik 2 (IWE2), RWTH Aachen University, Aachen 52074, Germany
| | - Daniele Ielmini
- Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano and IU.NET, Piazza L. da Vinci 32, Milano, 20133, Italy
| | - J Joshua Yang
- Department of Electrical and Computer Engineering, University of Southern California, Los Angeles, California 90089, United States
| | | | - Jordi Suñe
- Departament d'Enginyeria Electrònica, Universitat Autònoma de Barcelona, Barcelona 08193, Spain
| | - Anthony Joseph Kenyon
- Department of Electronic and Electrical Engineering, University College London, Torrington Place, London WC1E 7JE, United Kingdom
| | - Adnan Mehonic
- Department of Electronic and Electrical Engineering, University College London, Torrington Place, London WC1E 7JE, United Kingdom
| | - Sabina Spiga
- CNR-IMM, Unit of Agrate Brianza, Via C. Olivetti 2, Agrate Brianza (MB) 20864, Italy
| | - Vikas Rana
- Peter-Grünberg-Institut (PGI-10), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
| | - Stefan Wiefels
- Peter-Grünberg-Institut (PGI-7), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
| | - Stephan Menzel
- Peter-Grünberg-Institut (PGI-7), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
| | - Ilia Valov
- Peter-Grünberg-Institut (PGI-7), Forschungszentrum Jülich GmbH, 52425 Jülich, Germany
| | - Marco A Villena
- Applied Materials Inc., Via Ruini, Reggio Emilia 74L 42122, Italy
| | - Enrique Miranda
- Departament d'Enginyeria Electrònica, Universitat Autònoma de Barcelona, Barcelona 08193, Spain
| | - Xu Jing
- School of Materials Science and Engineering, Jiangsu Key Laboratory of Advanced Metallic Materials, Southeast University, Nanjing 211189, China
| | - Francesca Campabadal
- Institut de Microelectrònica de Barcelona-Centre Nacional de Microelectrònica, Consejo Superior de Investigaciones Científicas, Bellaterra 08193, Spain
| | - Mireia B Gonzalez
- Institut de Microelectrònica de Barcelona-Centre Nacional de Microelectrònica, Consejo Superior de Investigaciones Científicas, Bellaterra 08193, Spain
| | - Fernando Aguirre
- Unidad de Investigación y Desarrollo de las Ingenierías-CONICET, Facultad Regional Buenos Aires, Universidad Tecnológica Nacional (UIDI-CONICET/FRBA-UTN), Buenos Aires, Medrano 951(C1179AAQ), Argentina
| | - Felix Palumbo
- Unidad de Investigación y Desarrollo de las Ingenierías-CONICET, Facultad Regional Buenos Aires, Universidad Tecnológica Nacional (UIDI-CONICET/FRBA-UTN), Buenos Aires, Medrano 951(C1179AAQ), Argentina
| | - Kaichen Zhu
- Physical Science and Engineering Division, King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia
| | - Juan Bautista Roldan
- Departamento de Electrónica y Tecnología de Computadores, Facultad de Ciencias, Universidad de Granada, Avd. Fuentenueva s/n, Granada 18071, Spain
| | - Francesco Maria Puglisi
- Dipartimento di Ingegneria "Enzo Ferrari", Università di Modena e Reggio Emilia, Via P. Vivarelli 10/1, Modena 41125, Italy
| | - Luca Larcher
- Applied Materials Inc., Via Ruini, Reggio Emilia 74L 42122, Italy
| | - Tuo-Hung Hou
- Department of Electronics Engineering and Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan
| | - Themis Prodromakis
- Centre for Electronics Frontiers, University of Southampton, Southampton SO171BJ, United Kingdom
| | - Yuchao Yang
- Key Laboratory of Microelectronic Devices and Circuits (MOE), Department of Micro/nanoelectronics, Peking University, Beijing 100871, China
| | - Peng Huang
- Key Laboratory of Microelectronic Devices and Circuits (MOE), Department of Micro/nanoelectronics, Peking University, Beijing 100871, China
| | - Tianqing Wan
- Department of Applied Physics, The Hong Kong Polytechnic University, Kowloon, Hong Kong
| | - Yang Chai
- Department of Applied Physics, The Hong Kong Polytechnic University, Kowloon, Hong Kong
| | - Kin Leong Pey
- Engineering Product Development, Singapore University of Technology and Design (SUTD), 8 Somapah Road, 487372 Singapore
| | - Nagarajan Raghavan
- Engineering Product Development, Singapore University of Technology and Design (SUTD), 8 Somapah Road, 487372 Singapore
| | - Salvador Dueñas
- Department of Electronics, University of Valladolid, Paseo de Belén 15, Valladolid E-47011, Spain
| | - Tao Wang
- Institute of Functional Nano and Soft Materials (FUNSOM), Collaborative Innovation Center of Suzhou Nano Science and Technology, Soochow University 199 Ren-Ai Road, Suzhou 215123, China
| | - Qiangfei Xia
- Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, Massachusetts 01003-9292, United States
| | - Sebastian Pazos
- Physical Science and Engineering Division, King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia
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